From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Cc: "Vinod Koul" <vkoul@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Rob Herring" <robh@kernel.org>,
linuxarm@huawei.com, mauro.chehab@huawei.com,
"Krzysztof Wilczyński" <kw@linux.com>,
"Binghui Wang" <wangbinghui@hisilicon.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Wei Xu" <xuwei5@hisilicon.com>,
"Xiaowei Song" <songxiaowei@hisilicon.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v7 08/10] arm64: dts: HiSilicon: Add support for HiKey 970 PCIe controller hardware
Date: Sat, 24 Jul 2021 09:41:50 +0530 [thread overview]
Message-ID: <20210724041150.GA4053@thinkpad> (raw)
In-Reply-To: <20210723085318.243f155f@coco.lan>
On Fri, Jul 23, 2021 at 08:53:18AM +0200, Mauro Carvalho Chehab wrote:
> Em Thu, 22 Jul 2021 19:06:28 +0530
> Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> escreveu:
>
> > On Wed, Jul 21, 2021 at 10:39:10AM +0200, Mauro Carvalho Chehab wrote:
> > > From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > >
> > > Add DTS bindings for the HiKey 970 board's PCIe hardware.
> > >
> > > Co-developed-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
> > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > > Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
> > > ---
> > > arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 71 +++++++++++++++++++
> > > .../boot/dts/hisilicon/hikey970-pmic.dtsi | 1 -
> > > drivers/pci/controller/dwc/pcie-kirin.c | 12 ----
> > > 3 files changed, 71 insertions(+), 13 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
> > > index 1f228612192c..6dfcfcfeedae 100644
> > > --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
> > > +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
> > > @@ -177,6 +177,12 @@ sctrl: sctrl@fff0a000 {
> > > #clock-cells = <1>;
> > > };
> > >
> > > + pmctrl: pmctrl@fff31000 {
> > > + compatible = "hisilicon,hi3670-pmctrl", "syscon";
> > > + reg = <0x0 0xfff31000 0x0 0x1000>;
> > > + #clock-cells = <1>;
> > > + };
> > > +
> >
> > Irrelevant change to this patch.
>
> Huh?
>
> This is used by PCIe PHY, as part of the power on procedures:
>
> +static int hi3670_pcie_noc_power(struct hi3670_pcie_phy *phy, bool enable)
> +{
> + struct device *dev = phy->dev;
> + u32 time = 100;
> + unsigned int val = NOC_PW_MASK;
> + int rst;
> +
> + if (enable)
> + val = NOC_PW_MASK | NOC_PW_SET_BIT;
> + else
> + val = NOC_PW_MASK;
> + rst = enable ? 1 : 0;
> +
> + regmap_write(phy->pmctrl, NOC_POWER_IDLEREQ_1, val);
>
>
Ah... you're hardcoding the syscon compatible in driver. Sorry missed that.
But if these syscon nodes are independent memory regions or belong to non
PCI/PHY memory map, you could've fetched the reference through a DT property
along with the offset then used it in driver.
Like,
pcie_phy: pcie-phy@fc000000 {
...
hisilicon,noc-power-regs = <&pmctrl 0x38c>;
hisilicon,sctrl-cmos-regs = <&sctrl 0x60>;
...
};
The benefit of doing this way is, if the pmctrl, sctrl register layout changes
in future, you can handle it without any issues.
>
> >
> > > iomcu: iomcu@ffd7e000 {
> > > compatible = "hisilicon,hi3670-iomcu", "syscon";
> > > reg = <0x0 0xffd7e000 0x0 0x1000>;
> > > @@ -660,6 +666,71 @@ gpio28: gpio@fff1d000 {
> > > clock-names = "apb_pclk";
> > > };
> > >
> >
> > [...]
> >
> > > + #interrupt-cells = <1>;
> > > + interrupts = <0 283 4>;
> >
> > Use the DT flag for interrupts instead of hardcoded value
>
> Do you mean like this?
>
> interrupts = <0 283 IRQ_TYPE_LEVEL_HIGH>;
>
yes but you could also use,
interrupts = <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>;
Thanks,
Mani
next prev parent reply other threads:[~2021-07-24 4:12 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-21 8:39 [PATCH v7 00/10] Add support for Hikey 970 PCIe Mauro Carvalho Chehab
2021-07-21 8:39 ` [PATCH v7 01/10] PCI: kirin: Reorganize the PHY logic inside the driver Mauro Carvalho Chehab
2021-07-21 8:39 ` [PATCH v7 02/10] PCI: kirin: Add support for a PHY layer Mauro Carvalho Chehab
2021-07-21 8:39 ` [PATCH v7 03/10] PCI: kirin: Use regmap for APB registers Mauro Carvalho Chehab
2021-07-21 8:39 ` [PATCH v7 04/10] PCI: kirin: Add MODULE_* macros Mauro Carvalho Chehab
2021-07-21 8:39 ` [PATCH v7 05/10] dt-bindings: PCI: kirin: Fix compatible string Mauro Carvalho Chehab
2021-07-21 8:39 ` [PATCH v7 07/10] phy: HiSilicon: Add driver for Kirin 970 PCIe PHY Mauro Carvalho Chehab
2021-07-21 8:39 ` [PATCH v7 08/10] arm64: dts: HiSilicon: Add support for HiKey 970 PCIe controller hardware Mauro Carvalho Chehab
2021-07-22 13:36 ` Manivannan Sadhasivam
2021-07-23 6:53 ` Mauro Carvalho Chehab
2021-07-24 4:11 ` Manivannan Sadhasivam [this message]
2021-08-03 4:25 ` Mauro Carvalho Chehab
2021-08-16 18:26 ` Rob Herring
2021-07-21 8:39 ` [PATCH v7 09/10] dt-bindings: PCI: kirin-pcie.txt: Convert it to yaml Mauro Carvalho Chehab
2021-07-23 22:56 ` Rob Herring
2021-07-21 10:15 ` [PATCH v7 11/10] PCI: kirin: Allow building it as a module Mauro Carvalho Chehab
2021-07-21 11:55 ` Arnd Bergmann
2021-07-21 13:10 ` Mauro Carvalho Chehab
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