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* [PATCH v5 0/4] Apple M1 PCIe DT bindings
@ 2021-09-21 18:34 Mark Kettenis
  2021-09-21 18:34 ` [PATCH v5 1/4] dt-bindings: interrupt-controller: Convert MSI controller to json-schema Mark Kettenis
                   ` (3 more replies)
  0 siblings, 4 replies; 8+ messages in thread
From: Mark Kettenis @ 2021-09-21 18:34 UTC (permalink / raw)
  To: devicetree
  Cc: maz, robin.murphy, sven, alyssa, Mark Kettenis, Thomas Gleixner,
	Rob Herring, Hector Martin, Bjorn Helgaas,
	Nicolas Saenz Julienne, Florian Fainelli,
	bcm-kernel-feedback-list, Jim Quinlan, Daire McNamara,
	Saenz Julienne, linux-kernel, linux-arm-kernel, linux-pci,
	linux-rpi-kernel

This small series adds bindings for the PCIe controller found on the
Apple M1 SoC.

At this point, the primary consumer for these bindings is U-Boot.
With these bindings U-Boot can bring up the links for the root ports
of the PCIe root complex.  A simple OS driver can then provide
standard ECAM access and manage MSI interrupts to provide access
to the built-in Ethernet and XHCI controllers of the Mac mini.

The Apple controller incorporates Synopsys Designware PCIe logic
to implement its root port.  But unlike other hardware currently
supported by U-Boot and the Linux kernel the Apple hardware
integrates multiple root ports.  As such the existing bindings
for the DWC PCIe interface can't be used.  There is a single ECAM
space for all root space, but separate GPIOs to take the PCI devices
on those ports out of reset.  Therefore the standard "reset-gpio" and
"max-link-speed" properties appear on the child nodes representing
the PCI devices that correspond to the individual root ports.

MSIs are handled by the PCIe controller and translated into "regular
interrupts".  A range of 32 MSIs is provided.  These 32 MSIs can be
distributed over the root ports as the OS sees fit by programming the
PCIe controller port registers.

This now adds an MSI controller binding schema and uses the generic
msi-ranges property to specify how the MSIs are mapped to interrupts
on the AIC.  I copied some of the description text in the MSI
controller binding schema from msi.txt but it may need some further
tweaks to make sense.

Patch 4/4 of this series depends on the pinctrl series I sent earlier
and will probably go through Hector Martin's Apple M1 SoC tree.


Changelog:

v5: - Use correct license for MSI controller binding schema
    - Use power-domains instead of clocks as we figured out
      that the hardware actually does power gating.
    - Fix sizes of the "reg" property.
    - Improve constraints.
    - Improve descriptions.

v4: - Convert MSI controller binding to YAML
    - Add generic msi-ranges property to MSI controller binding
    - Fix typos/formatting in apple,pcie binding
    - Use generic MSI controller binding in apple,pcie

v3: - Remove unneeded include in example

v2: - Adjust name for ECAM in "reg-names"
    - Drop "phy" registers
    - Expand description
    - Add description for "interrupts"
    - Fix incorrect minItems for "interrupts"
    - Fix incorrect MaxItems for "reg-names"
    - Document the use of "msi-controller", "msi-parent", "iommu-map" and
      "iommu-map-mask"
    - Fix "bus-range" and "iommu-map" properties in the example

Mark Kettenis (4):
  dt-bindings: interrupt-controller: Convert MSI controller to
    json-schema
  dt-bindings: interrupt-controller: msi: Add msi-ranges property
  dt-bindings: pci: Add DT bindings for apple,pcie
  arm64: apple: Add PCIe node

 .../interrupt-controller/msi-controller.yaml  |  46 +++++
 .../devicetree/bindings/pci/apple,pcie.yaml   | 161 ++++++++++++++++++
 .../bindings/pci/brcm,stb-pcie.yaml           |   1 +
 .../bindings/pci/microchip,pcie-host.yaml     |   1 +
 MAINTAINERS                                   |   1 +
 arch/arm64/boot/dts/apple/t8103.dtsi          |  63 +++++++
 6 files changed, 273 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/msi-controller.yaml
 create mode 100644 Documentation/devicetree/bindings/pci/apple,pcie.yaml

-- 
2.33.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v5 1/4] dt-bindings: interrupt-controller: Convert MSI controller to json-schema
  2021-09-21 18:34 [PATCH v5 0/4] Apple M1 PCIe DT bindings Mark Kettenis
@ 2021-09-21 18:34 ` Mark Kettenis
  2021-09-27 16:54   ` Rob Herring
  2021-09-21 18:34 ` [PATCH v5 2/4] dt-bindings: interrupt-controller: msi: Add msi-ranges property Mark Kettenis
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 8+ messages in thread
From: Mark Kettenis @ 2021-09-21 18:34 UTC (permalink / raw)
  To: devicetree
  Cc: maz, robin.murphy, sven, alyssa, Mark Kettenis, Thomas Gleixner,
	Rob Herring, Hector Martin, Bjorn Helgaas,
	Nicolas Saenz Julienne, Jim Quinlan, Florian Fainelli,
	bcm-kernel-feedback-list, Daire McNamara, Saenz Julienne,
	linux-kernel, linux-arm-kernel, linux-pci, linux-rpi-kernel

Split the MSI controller bindings from the MSI binding document
into DT schema format using json-schema.

Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
---
 .../interrupt-controller/msi-controller.yaml  | 38 +++++++++++++++++++
 .../bindings/pci/brcm,stb-pcie.yaml           |  1 +
 .../bindings/pci/microchip,pcie-host.yaml     |  1 +
 3 files changed, 40 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/msi-controller.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/msi-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/msi-controller.yaml
new file mode 100644
index 000000000000..58d898d5b943
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/msi-controller.yaml
@@ -0,0 +1,38 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/msi-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MSI controller
+
+maintainers:
+  - Marc Zyngier <maz@kernel.org>
+
+description: |
+  An MSI controller signals interrupts to a CPU when a write is made
+  to an MMIO address by some master. An MSI controller may feature a
+  number of doorbells.
+
+properties:
+  "#msi-cells":
+    description: |
+      The number of cells in an msi-specifier, required if not zero.
+
+      Typically this will encode information related to sideband data,
+      and will not encode doorbells or payloads as these can be
+      configured dynamically.
+
+      The meaning of the msi-specifier is defined by the device tree
+      binding of the specific MSI controller.
+    enum: [0, 1]
+
+  msi-controller:
+    description:
+      Identifies the node as an MSI controller.
+    $ref: /schemas/types.yaml#/definitions/flag
+
+dependencies:
+  "#msi-cells": [ msi-controller ]
+
+additionalProperties: true
diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
index b9589a0daa5c..1fe102743f82 100644
--- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
@@ -88,6 +88,7 @@ required:
 
 allOf:
   - $ref: /schemas/pci/pci-bus.yaml#
+  - $ref: /schemas/interrupt-controller/msi-controller.yaml#
   - if:
       properties:
         compatible:
diff --git a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
index fb95c276a986..7b0776457178 100644
--- a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
@@ -11,6 +11,7 @@ maintainers:
 
 allOf:
   - $ref: /schemas/pci/pci-bus.yaml#
+  - $ref: /schemas/interrupt-controller/msi-controller.yaml#
 
 properties:
   compatible:
-- 
2.33.0


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH v5 2/4] dt-bindings: interrupt-controller: msi: Add msi-ranges property
  2021-09-21 18:34 [PATCH v5 0/4] Apple M1 PCIe DT bindings Mark Kettenis
  2021-09-21 18:34 ` [PATCH v5 1/4] dt-bindings: interrupt-controller: Convert MSI controller to json-schema Mark Kettenis
@ 2021-09-21 18:34 ` Mark Kettenis
  2021-09-27 16:55   ` Rob Herring
  2021-09-21 18:34 ` [PATCH v5 3/4] dt-bindings: pci: Add DT bindings for apple,pcie Mark Kettenis
  2021-09-21 18:34 ` [PATCH v5 4/4] arm64: apple: Add PCIe node Mark Kettenis
  3 siblings, 1 reply; 8+ messages in thread
From: Mark Kettenis @ 2021-09-21 18:34 UTC (permalink / raw)
  To: devicetree
  Cc: maz, robin.murphy, sven, alyssa, Mark Kettenis, Thomas Gleixner,
	Rob Herring, Hector Martin, Bjorn Helgaas, Florian Fainelli,
	bcm-kernel-feedback-list, Nicolas Saenz Julienne, Jim Quinlan,
	Daire McNamara, Saenz Julienne, linux-kernel, linux-arm-kernel,
	linux-pci, linux-rpi-kernel

Update the MSI controller binding to add an msi-ranges property
that specifies how MSIs map onto regular interrupts on some other
interrupt controller.

Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
---
 .../bindings/interrupt-controller/msi-controller.yaml     | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/msi-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/msi-controller.yaml
index 58d898d5b943..449d6067ec88 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/msi-controller.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/msi-controller.yaml
@@ -32,6 +32,14 @@ properties:
       Identifies the node as an MSI controller.
     $ref: /schemas/types.yaml#/definitions/flag
 
+  msi-ranges:
+    description:
+      A list of <phandle intspec span> tuples, where "phandle" is the
+      parent interrupt controller, "intspec" is the starting/base
+      interrupt specifier and "span" is the size of the
+      range. Multiple ranges can be provided.
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+
 dependencies:
   "#msi-cells": [ msi-controller ]
 
-- 
2.33.0


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH v5 3/4] dt-bindings: pci: Add DT bindings for apple,pcie
  2021-09-21 18:34 [PATCH v5 0/4] Apple M1 PCIe DT bindings Mark Kettenis
  2021-09-21 18:34 ` [PATCH v5 1/4] dt-bindings: interrupt-controller: Convert MSI controller to json-schema Mark Kettenis
  2021-09-21 18:34 ` [PATCH v5 2/4] dt-bindings: interrupt-controller: msi: Add msi-ranges property Mark Kettenis
@ 2021-09-21 18:34 ` Mark Kettenis
  2021-09-27 17:03   ` Rob Herring
  2021-09-21 18:34 ` [PATCH v5 4/4] arm64: apple: Add PCIe node Mark Kettenis
  3 siblings, 1 reply; 8+ messages in thread
From: Mark Kettenis @ 2021-09-21 18:34 UTC (permalink / raw)
  To: devicetree
  Cc: maz, robin.murphy, sven, alyssa, Mark Kettenis, Thomas Gleixner,
	Rob Herring, Hector Martin, Bjorn Helgaas, Jim Quinlan,
	Nicolas Saenz Julienne, Florian Fainelli,
	bcm-kernel-feedback-list, Daire McNamara, Saenz Julienne,
	linux-kernel, linux-arm-kernel, linux-pci, linux-rpi-kernel

The Apple PCIe host controller is a PCIe host controller with
multiple root ports present in Apple ARM SoC platforms, including
various iPhone and iPad devices and the "Apple Silicon" Macs.

Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
---
 .../devicetree/bindings/pci/apple,pcie.yaml   | 161 ++++++++++++++++++
 MAINTAINERS                                   |   1 +
 2 files changed, 162 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/apple,pcie.yaml

diff --git a/Documentation/devicetree/bindings/pci/apple,pcie.yaml b/Documentation/devicetree/bindings/pci/apple,pcie.yaml
new file mode 100644
index 000000000000..f17a8fe39e6b
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/apple,pcie.yaml
@@ -0,0 +1,161 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/apple,pcie.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Apple PCIe host controller
+
+maintainers:
+  - Mark Kettenis <kettenis@openbsd.org>
+
+description: |
+  The Apple PCIe host controller is a PCIe host controller with
+  multiple root ports present in Apple ARM SoC platforms, including
+  various iPhone and iPad devices and the "Apple Silicon" Macs.
+  The controller incorporates Synopsys DesigWare PCIe logic to
+  implements its root ports.  But the ATU found on most DesignWare
+  PCIe host bridges is absent.
+
+  All root ports share a single ECAM space, but separate GPIOs are
+  used to take the PCI devices on those ports out of reset.  Therefore
+  the standard "reset-gpios" and "max-link-speed" properties appear on
+  the child nodes that represent the PCI bridges that correspond to
+  the individual root ports.
+
+  MSIs are handled by the PCIe controller and translated into regular
+  interrupts.  A range of 32 MSIs is provided.  These 32 MSIs can be
+  distributed over the root ports as the OS sees fit by programming
+  the PCIe controller's port registers.
+
+allOf:
+  - $ref: /schemas/pci/pci-bus.yaml#
+  - $ref: /schemas/interrupt-controller/msi-controller.yaml#
+
+properties:
+  compatible:
+    items:
+      - const: apple,t8103-pcie
+      - const: apple,pcie
+
+  reg:
+    minItems: 3
+    maxItems: 5
+
+  reg-names:
+    minItems: 3
+    maxItems: 5
+    items:
+      - const: config
+      - const: rc
+      - const: port0
+      - const: port1
+      - const: port2
+
+  ranges:
+    minItems: 2
+    maxItems: 2
+
+  interrupts:
+    description:
+      Interrupt specifiers, one for each root port.
+    minItems: 1
+    maxItems: 3
+
+  msi-parent: true
+
+  msi-ranges:
+    maxItems: 1
+
+  iommu-map: true
+  iommu-map-mask: true
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - bus-range
+  - interrupts
+  - msi-controller
+  - msi-parent
+  - msi-ranges
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/apple-aic.h>
+
+    soc {
+      #address-cells = <2>;
+      #size-cells = <2>;
+
+      pcie0: pcie@690000000 {
+        compatible = "apple,t8103-pcie", "apple,pcie";
+        device_type = "pci";
+
+        reg = <0x6 0x90000000 0x0 0x1000000>,
+              <0x6 0x80000000 0x0 0x100000>,
+              <0x6 0x81000000 0x0 0x4000>,
+              <0x6 0x82000000 0x0 0x4000>,
+              <0x6 0x83000000 0x0 0x4000>;
+        reg-names = "config", "rc", "port0", "port1", "port2";
+
+        interrupt-parent = <&aic>;
+        interrupts = <AIC_IRQ 695 IRQ_TYPE_LEVEL_HIGH>,
+                     <AIC_IRQ 698 IRQ_TYPE_LEVEL_HIGH>,
+                     <AIC_IRQ 701 IRQ_TYPE_LEVEL_HIGH>;
+
+        msi-controller;
+        msi-parent = <&pcie0>;
+        msi-ranges = <&aic AIC_IRQ 704 IRQ_TYPE_EDGE_RISING 32>;
+
+        iommu-map = <0x100 &dart0 1 1>,
+                    <0x200 &dart1 1 1>,
+                    <0x300 &dart2 1 1>;
+        iommu-map-mask = <0xff00>;
+
+        bus-range = <0 3>;
+        #address-cells = <3>;
+        #size-cells = <2>;
+        ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>,
+                 <0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>;
+
+        power-domains = <&ps_apcie>, <&ps_apcie_gp>, <&ps_pcie_ref>;
+        pinctrl-0 = <&pcie_pins>;
+        pinctrl-names = "default";
+
+        pci@0,0 {
+          device_type = "pci";
+          reg = <0x0 0x0 0x0 0x0 0x0>;
+          reset-gpios = <&pinctrl_ap 152 0>;
+          max-link-speed = <2>;
+
+          #address-cells = <3>;
+          #size-cells = <2>;
+          ranges;
+        };
+
+        pci@1,0 {
+          device_type = "pci";
+          reg = <0x800 0x0 0x0 0x0 0x0>;
+          reset-gpios = <&pinctrl_ap 153 0>;
+          max-link-speed = <2>;
+
+          #address-cells = <3>;
+          #size-cells = <2>;
+          ranges;
+        };
+
+        pci@2,0 {
+          device_type = "pci";
+          reg = <0x1000 0x0 0x0 0x0 0x0>;
+          reset-gpios = <&pinctrl_ap 33 0>;
+          max-link-speed = <1>;
+
+          #address-cells = <3>;
+          #size-cells = <2>;
+          ranges;
+        };
+      };
+    };
diff --git a/MAINTAINERS b/MAINTAINERS
index c6b8a720c0bc..30bea4042e7e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1694,6 +1694,7 @@ C:	irc://chat.freenode.net/asahi-dev
 T:	git https://github.com/AsahiLinux/linux.git
 F:	Documentation/devicetree/bindings/arm/apple.yaml
 F:	Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
+F:	Documentation/devicetree/bindings/pci/apple,pcie.yaml
 F:	Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml
 F:	arch/arm64/boot/dts/apple/
 F:	drivers/irqchip/irq-apple-aic.c
-- 
2.33.0


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH v5 4/4] arm64: apple: Add PCIe node
  2021-09-21 18:34 [PATCH v5 0/4] Apple M1 PCIe DT bindings Mark Kettenis
                   ` (2 preceding siblings ...)
  2021-09-21 18:34 ` [PATCH v5 3/4] dt-bindings: pci: Add DT bindings for apple,pcie Mark Kettenis
@ 2021-09-21 18:34 ` Mark Kettenis
  3 siblings, 0 replies; 8+ messages in thread
From: Mark Kettenis @ 2021-09-21 18:34 UTC (permalink / raw)
  To: devicetree
  Cc: maz, robin.murphy, sven, alyssa, Mark Kettenis, Thomas Gleixner,
	Rob Herring, Hector Martin, Bjorn Helgaas, Florian Fainelli,
	bcm-kernel-feedback-list, Jim Quinlan, Nicolas Saenz Julienne,
	Daire McNamara, Saenz Julienne, linux-kernel, linux-arm-kernel,
	linux-pci, linux-rpi-kernel

Add node corresponding to the apcie,t8103 node in the
Apple device tree for the Mac mini (M1, 2020).

Power domain references and DART (IOMMU) references are left out
at the moment and will be added once the appropriate bindings have
been settled upon.

Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
---
 arch/arm64/boot/dts/apple/t8103.dtsi | 63 ++++++++++++++++++++++++++++
 1 file changed, 63 insertions(+)

diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi
index 503a76fc30e6..10956859b4bb 100644
--- a/arch/arm64/boot/dts/apple/t8103.dtsi
+++ b/arch/arm64/boot/dts/apple/t8103.dtsi
@@ -214,5 +214,68 @@ pinctrl_smc: pinctrl@23e820000 {
 				     <AIC_IRQ 396 IRQ_TYPE_LEVEL_HIGH>,
 				     <AIC_IRQ 397 IRQ_TYPE_LEVEL_HIGH>;
 		};
+
+		pcie0: pcie@690000000 {
+			compatible = "apple,t8103-pcie", "apple,pcie";
+			device_type = "pci";
+
+			reg = <0x6 0x90000000 0x0 0x1000000>,
+			      <0x6 0x80000000 0x0 0x100000>,
+			      <0x6 0x81000000 0x0 0x4000>,
+			      <0x6 0x82000000 0x0 0x4000>,
+			      <0x6 0x83000000 0x0 0x4000>;
+			reg-names = "config", "rc", "port0", "port1", "port2";
+
+			interrupt-parent = <&aic>;
+			interrupts = <AIC_IRQ 695 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 698 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 701 IRQ_TYPE_LEVEL_HIGH>;
+
+			msi-controller;
+			msi-parent = <&pcie0>;
+			msi-ranges = <&aic AIC_IRQ 704 IRQ_TYPE_EDGE_RISING 32>;
+
+			bus-range = <0 3>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>,
+				 <0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>;
+
+			pinctrl-0 = <&pcie_pins>;
+			pinctrl-names = "default";
+
+			pci@0,0 {
+				device_type = "pci";
+				reg = <0x0 0x0 0x0 0x0 0x0>;
+				reset-gpios = <&pinctrl_ap 152 0>;
+				max-link-speed = <2>;
+
+				#address-cells = <3>;
+				#size-cells = <2>;
+				ranges;
+			};
+
+			pci@1,0 {
+				device_type = "pci";
+				reg = <0x800 0x0 0x0 0x0 0x0>;
+				reset-gpios = <&pinctrl_ap 153 0>;
+				max-link-speed = <2>;
+
+				#address-cells = <3>;
+				#size-cells = <2>;
+				ranges;
+			};
+
+			pci@2,0 {
+				device_type = "pci";
+				reg = <0x1000 0x0 0x0 0x0 0x0>;
+				reset-gpios = <&pinctrl_ap 33 0>;
+				max-link-speed = <1>;
+
+				#address-cells = <3>;
+				#size-cells = <2>;
+				ranges;
+			};
+		};
 	};
 };
-- 
2.33.0


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH v5 1/4] dt-bindings: interrupt-controller: Convert MSI controller to json-schema
  2021-09-21 18:34 ` [PATCH v5 1/4] dt-bindings: interrupt-controller: Convert MSI controller to json-schema Mark Kettenis
@ 2021-09-27 16:54   ` Rob Herring
  0 siblings, 0 replies; 8+ messages in thread
From: Rob Herring @ 2021-09-27 16:54 UTC (permalink / raw)
  To: Mark Kettenis
  Cc: sven, Nicolas Saenz Julienne, Daire McNamara, Bjorn Helgaas,
	Hector Martin, bcm-kernel-feedback-list, linux-rpi-kernel,
	Thomas Gleixner, Florian Fainelli, alyssa, Rob Herring,
	devicetree, linux-kernel, linux-arm-kernel, maz, robin.murphy,
	linux-pci, Jim Quinlan, Saenz Julienne

On Tue, 21 Sep 2021 20:34:12 +0200, Mark Kettenis wrote:
> Split the MSI controller bindings from the MSI binding document
> into DT schema format using json-schema.
> 
> Acked-by: Marc Zyngier <maz@kernel.org>
> Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
> ---
>  .../interrupt-controller/msi-controller.yaml  | 38 +++++++++++++++++++
>  .../bindings/pci/brcm,stb-pcie.yaml           |  1 +
>  .../bindings/pci/microchip,pcie-host.yaml     |  1 +
>  3 files changed, 40 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/msi-controller.yaml
> 

Applied, thanks!

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v5 2/4] dt-bindings: interrupt-controller: msi: Add msi-ranges property
  2021-09-21 18:34 ` [PATCH v5 2/4] dt-bindings: interrupt-controller: msi: Add msi-ranges property Mark Kettenis
@ 2021-09-27 16:55   ` Rob Herring
  0 siblings, 0 replies; 8+ messages in thread
From: Rob Herring @ 2021-09-27 16:55 UTC (permalink / raw)
  To: Mark Kettenis
  Cc: Thomas Gleixner, linux-arm-kernel, linux-pci, Bjorn Helgaas,
	bcm-kernel-feedback-list, linux-rpi-kernel, Saenz Julienne, sven,
	Florian Fainelli, devicetree, maz, Rob Herring, Daire McNamara,
	linux-kernel, alyssa, robin.murphy, Nicolas Saenz Julienne,
	Jim Quinlan, Hector Martin

On Tue, 21 Sep 2021 20:34:13 +0200, Mark Kettenis wrote:
> Update the MSI controller binding to add an msi-ranges property
> that specifies how MSIs map onto regular interrupts on some other
> interrupt controller.
> 
> Acked-by: Marc Zyngier <maz@kernel.org>
> Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
> ---
>  .../bindings/interrupt-controller/msi-controller.yaml     | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 

Applied, thanks!

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v5 3/4] dt-bindings: pci: Add DT bindings for apple,pcie
  2021-09-21 18:34 ` [PATCH v5 3/4] dt-bindings: pci: Add DT bindings for apple,pcie Mark Kettenis
@ 2021-09-27 17:03   ` Rob Herring
  0 siblings, 0 replies; 8+ messages in thread
From: Rob Herring @ 2021-09-27 17:03 UTC (permalink / raw)
  To: Mark Kettenis
  Cc: Thomas Gleixner, linux-kernel, Hector Martin, Saenz Julienne,
	maz, Rob Herring, Jim Quinlan, linux-rpi-kernel, robin.murphy,
	Nicolas Saenz Julienne, alyssa, linux-arm-kernel, devicetree,
	Bjorn Helgaas, Florian Fainelli, bcm-kernel-feedback-list,
	Daire McNamara, linux-pci, sven

On Tue, 21 Sep 2021 20:34:14 +0200, Mark Kettenis wrote:
> The Apple PCIe host controller is a PCIe host controller with
> multiple root ports present in Apple ARM SoC platforms, including
> various iPhone and iPad devices and the "Apple Silicon" Macs.
> 
> Acked-by: Marc Zyngier <maz@kernel.org>
> Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
> ---
>  .../devicetree/bindings/pci/apple,pcie.yaml   | 161 ++++++++++++++++++
>  MAINTAINERS                                   |   1 +
>  2 files changed, 162 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pci/apple,pcie.yaml
> 

Applied, thanks!

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2021-09-27 17:04 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-09-21 18:34 [PATCH v5 0/4] Apple M1 PCIe DT bindings Mark Kettenis
2021-09-21 18:34 ` [PATCH v5 1/4] dt-bindings: interrupt-controller: Convert MSI controller to json-schema Mark Kettenis
2021-09-27 16:54   ` Rob Herring
2021-09-21 18:34 ` [PATCH v5 2/4] dt-bindings: interrupt-controller: msi: Add msi-ranges property Mark Kettenis
2021-09-27 16:55   ` Rob Herring
2021-09-21 18:34 ` [PATCH v5 3/4] dt-bindings: pci: Add DT bindings for apple,pcie Mark Kettenis
2021-09-27 17:03   ` Rob Herring
2021-09-21 18:34 ` [PATCH v5 4/4] arm64: apple: Add PCIe node Mark Kettenis

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