From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: "Marek Behún" <kabel@kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org, pali@kernel.org
Subject: Re: [PATCH 10/14] PCI: aardvark: Enable MSI-X support
Date: Wed, 27 Oct 2021 15:12:46 +0100 [thread overview]
Message-ID: <20211027141246.GA27543@lpieralisi> (raw)
In-Reply-To: <20211012164145.14126-11-kabel@kernel.org>
On Tue, Oct 12, 2021 at 06:41:41PM +0200, Marek Behún wrote:
> From: Pali Rohár <pali@kernel.org>
>
> According to PCI 3.0 specification, sending both MSI and MSI-X interrupts
> is done by DWORD memory write operation to doorbell message address. The
> write operation for MSI has zero upper 16 bits and the MSI interrupt number
> in the lower 16 bits, while the write operation for MSI-X contains a 32-bit
> value from MSI-X table.
>
> Since the driver only uses interrupt numbers from range 0..31, the upper
> 16 bits of the DWORD memory write operation to doorbell message address
> are zero even for MSI-X interrupts. Thus we can enable MSI-X interrupts.
It is the controller driver that defines the MSI-X data field yes, what
I don't get is why we have to add this comment in the commit log.
Basically Aardvark can support MSI-X up to 32 MSI-X vectors and you
are enabling them with this patch.
Is there anything *else* I am missing wrt 16-bit/32-bit data fields
that we need to know ?
> Testing proves that kernel can correctly receive MSI-X interrupts from
> PCIe cards which supports both MSI and MSI-X interrupts.
I don't understand what you want to convey with this commit log.
To me, the whole comment does not add anything (if I understood it),
please let me know what you want to express with it.
To me this patch enables MSI-X support because the HW can support them,
that's it.
Lorenzo
> Signed-off-by: Pali Rohár <pali@kernel.org>
> Reviewed-by: Marek Behún <kabel@kernel.org>
> Signed-off-by: Marek Behún <kabel@kernel.org>
> ---
> drivers/pci/controller/pci-aardvark.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> index b703b271c6b1..337b61508799 100644
> --- a/drivers/pci/controller/pci-aardvark.c
> +++ b/drivers/pci/controller/pci-aardvark.c
> @@ -1274,7 +1274,7 @@ static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie)
>
> msi_di = &pcie->msi_domain_info;
> msi_di->flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
> - MSI_FLAG_MULTI_PCI_MSI;
> + MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX;
> msi_di->chip = msi_ic;
>
> pcie->msi_inner_domain =
> --
> 2.32.0
>
next prev parent reply other threads:[~2021-10-27 14:12 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-12 16:41 [PATCH 00/14] PCI: aardvark controller fixes BATCH 2 Marek Behún
2021-10-12 16:41 ` [PATCH 01/14] PCI: pci-bridge-emul: Fix emulation of W1C bits Marek Behún
2021-10-12 16:41 ` [PATCH 02/14] PCI: aardvark: Fix return value of MSI domain .alloc() method Marek Behún
2021-10-27 11:26 ` Lorenzo Pieralisi
2021-10-27 11:31 ` Pali Rohár
2021-10-12 16:41 ` [PATCH 03/14] PCI: aardvark: Read all 16-bits from PCIE_MSI_PAYLOAD_REG Marek Behún
2021-10-12 16:41 ` [PATCH 04/14] PCI: aardvark: Fix support for MSI interrupts Marek Behún
2021-10-12 16:41 ` [PATCH 05/14] PCI: aardvark: Fix reading MSI interrupt number Marek Behún
2021-10-12 16:41 ` [PATCH 06/14] PCI: aardvark: Clear all MSIs at setup Marek Behún
2021-10-12 16:41 ` [PATCH 07/14] PCI: aardvark: Refactor unmasking summary MSI interrupt Marek Behún
2021-10-12 16:41 ` [PATCH 08/14] PCI: aardvark: Fix masking MSI interrupts Marek Behún
2021-10-12 16:41 ` [PATCH 09/14] PCI: aardvark: Fix setting MSI address Marek Behún
2021-10-12 16:41 ` [PATCH 10/14] PCI: aardvark: Enable MSI-X support Marek Behún
2021-10-27 14:12 ` Lorenzo Pieralisi [this message]
2021-10-27 14:23 ` Pali Rohár
2021-10-28 11:08 ` Lorenzo Pieralisi
2021-10-28 11:13 ` Pali Rohár
2021-10-28 11:30 ` Lorenzo Pieralisi
2021-10-28 11:37 ` Pali Rohár
2021-10-28 15:24 ` Marc Zyngier
2021-10-28 15:29 ` Pali Rohár
2021-10-28 15:51 ` Marek Behún
2021-10-28 16:22 ` Marc Zyngier
2021-10-28 16:25 ` Marek Behún
2021-10-28 17:00 ` Marc Zyngier
2021-10-28 17:47 ` Lorenzo Pieralisi
2021-10-28 18:24 ` Marek Behún
2021-10-12 16:41 ` [PATCH 11/14] PCI: aardvark: Fix support for bus mastering and PCI_COMMAND on emulated bridge Marek Behún
2021-10-12 16:41 ` [PATCH 12/14] PCI: aardvark: Set PCI Bridge Class Code to PCI Bridge Marek Behún
2021-10-28 18:30 ` Lorenzo Pieralisi
2021-10-28 18:45 ` Pali Rohár
2021-10-28 20:43 ` Bjorn Helgaas
2021-10-12 16:41 ` [PATCH 13/14] PCI: aardvark: Fix support for PCI_BRIDGE_CTL_BUS_RESET on emulated bridge Marek Behún
2021-10-12 16:41 ` [PATCH 14/14] PCI: aardvark: Fix support for PCI_ROM_ADDRESS1 " Marek Behún
2021-10-19 18:36 ` [PATCH 00/14] PCI: aardvark controller fixes BATCH 2 Pali Rohár
2021-10-28 18:33 ` Lorenzo Pieralisi
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