Re: [PATCH 21/25] dmaengine: dw-edma: Drop DT-region allocation

From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: "Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
	"Vinod Koul" <vkoul@kernel.org>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Frank Li" <Frank.Li@nxp.com>,
	"Serge Semin" <fancer.lancer@gmail.com>,
	"Alexey Malahov" <Alexey.Malahov@baikalelectronics.ru>,
	"Pavel Parkhomenko" <Pavel.Parkhomenko@baikalelectronics.ru>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	linux-pci@vger.kernel.org, dmaengine@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 21/25] dmaengine: dw-edma: Drop DT-region allocation
Date: Fri, 25 Mar 2022 14:03:05 +0530	[thread overview]
Message-ID: <20220325083305.GI4675@thinkpad> (raw)
In-Reply-To: <20220324014836.19149-22-Sergey.Semin@baikalelectronics.ru>

On Thu, Mar 24, 2022 at 04:48:32AM +0300, Serge Semin wrote:
> There is no point in allocating an additional memory for the data target
> regions passed then to the client drivers. Just use the already available
> structures defined in the dw_edma_chip instance.
> 
> Note these regions are unused in normal circumstances since they are
> specific to the case of eDMA being embedded into the DW PCIe End-point and
> having it's CSRs accessible over a End-point' BAR. This case is only known
> to be implemented as a part of the Synopsys PCIe EndPoint IP prototype
> kit.
> 
> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

Thanks,
Mani

> ---
>  drivers/dma/dw-edma/dw-edma-core.c | 21 ++++-----------------
>  1 file changed, 4 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-edma-core.c
> index bc530f0a2468..dbe1119fd1d2 100644
> --- a/drivers/dma/dw-edma/dw-edma-core.c
> +++ b/drivers/dma/dw-edma/dw-edma-core.c
> @@ -744,7 +744,6 @@ static void dw_edma_free_chan_resources(struct dma_chan *dchan)
>  static int dw_edma_channel_setup(struct dw_edma_chip *chip, u32 wr_alloc,
>  				 u32 rd_alloc)
>  {
> -	struct dw_edma_region *dt_region;
>  	struct device *dev = chip->dev;
>  	struct dw_edma *dw = chip->dw;
>  	struct dw_edma_chan *chan;
> @@ -761,12 +760,6 @@ static int dw_edma_channel_setup(struct dw_edma_chip *chip, u32 wr_alloc,
>  	for (i = 0; i < ch_cnt; i++) {
>  		chan = &dw->chan[i];
>  
> -		dt_region = devm_kzalloc(dev, sizeof(*dt_region), GFP_KERNEL);
> -		if (!dt_region)
> -			return -ENOMEM;
> -
> -		chan->vc.chan.private = dt_region;
> -
>  		chan->dw = dw;
>  
>  		if (i < dw->wr_ch_cnt) {
> @@ -814,17 +807,11 @@ static int dw_edma_channel_setup(struct dw_edma_chip *chip, u32 wr_alloc,
>  			 chan->msi.data);
>  
>  		chan->vc.desc_free = vchan_free_desc;
> -		vchan_init(&chan->vc, dma);
> +		chan->vc.chan.private = chan->dir == EDMA_DIR_WRITE ?
> +					&dw->chip->dt_region_wr[chan->id] :
> +					&dw->chip->dt_region_rd[chan->id];
>  
> -		if (chan->dir == EDMA_DIR_WRITE) {
> -			dt_region->paddr = chip->dt_region_wr[chan->id].paddr;
> -			dt_region->vaddr = chip->dt_region_wr[chan->id].vaddr;
> -			dt_region->sz = chip->dt_region_wr[chan->id].sz;
> -		} else {
> -			dt_region->paddr = chip->dt_region_rd[chan->id].paddr;
> -			dt_region->vaddr = chip->dt_region_rd[chan->id].vaddr;
> -			dt_region->sz = chip->dt_region_rd[chan->id].sz;
> -		}
> +		vchan_init(&chan->vc, dma);
>  
>  		dw_edma_v0_core_device_config(chan);
>  	}
> -- 
> 2.35.1
>