Re: [RFC/RFT v2 09/11] dt-bindings: pci: add lane-map to rockchip PCIe binding

From: Bjorn Helgaas <helgaas@kernel.org>
To: Frank Wunderlich <linux@fw-web.de>
Cc: linux-rockchip@lists.infradead.org,
	"Frank Wunderlich" <frank-w@public-files.de>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Kishon Vijay Abraham I" <kishon@ti.com>,
	"Vinod Koul" <vkoul@kernel.org>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Johan Jonker" <jbx6244@gmail.com>,
	"Peter Geis" <pgwipeout@gmail.com>,
	"Michael Riesch" <michael.riesch@wolfvision.net>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org
Subject: Re: [RFC/RFT v2 09/11] dt-bindings: pci: add lane-map to rockchip PCIe binding
Date: Tue, 26 Apr 2022 11:04:09 -0500	[thread overview]
Message-ID: <20220426160409.GA1731042@bhelgaas> (raw)
In-Reply-To: <20220426132139.26761-10-linux@fw-web.de>

On Tue, Apr 26, 2022 at 03:21:37PM +0200, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@public-files.de>
> 
> Create new property for (rockchip) PCIe controller binding to
> define lane mapping.
> 
> Rockchip driver uses this for bifurcation (true/false) based
> on lanes should be splitted across controllers or not.
> 
> On rk3568 there are 2 PCIe Controllers which share 2 PCIe lanes.
> 
> pcie3x1: pcie@fe270000 //lane1 when using 1+1
> pcie3x2: pcie@fe280000 //lane0 when using 1+1
> 
> This ends up in one Controller (pcie3x1) uses lane-map = <0 1>; and
> the other lane-map = <1 0>; (pcie3x2)
> 
> This means there are 2 lanes (count of numbers), one (by position)
> is mapped to the first controller, the other one is used on the other
> controller.
> 
> In rockchip PCIe driver the lane-map is simply converted to the
> bifurcation bool instead of direct mapping a specific lane to a
> controller.
> 
> There is not yet any slot mapping below one controller.
> But for binding this may be possible like:
> 
> lane-map = <1 2 3 3 4 4 4 4>;
>             | | | ...
>         lane0 | |
>           lane1 |
>             lane2
> 
> on a 8-lane phy.
> 
> This can map lane0 to port1 (number used at this position),
> lane1 to port2, lanes 2+3 to port 3 and lanes 4,5,6,7 to port 4.
> 
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> ---
> v2:
> - new patch
> ---
>  Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> index a992970e8b85..998b20b3a9dc 100644
> --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> @@ -52,6 +52,8 @@ properties:
>        - const: pclk
>        - const: aux
>  
> +  lane-map: true
> +
>    msi-map: true
>  
>    num-lanes: true
> @@ -74,8 +76,6 @@ properties:
>    reset-names:
>      const: pipe
>  
> -  bifurcation: true
> -

Why are you adding "bifurcation" earlier in the series, then
immediately removing it?  Why not just add "lane-map" directly and
never mention "bifurcation" in the DT at all?

>    vpcie3v3-supply: true
>  
>  required:
> @@ -115,6 +115,7 @@ examples:
>                            "aclk_dbi", "pclk",
>                            "aux";
>              device_type = "pci";
> +            lane-map = <0 1>;
>              linux,pci-domain = <2>;
>              max-link-speed = <2>;
>              msi-map = <0x2000 &its 0x2000 0x1000>;
> -- 
> 2.25.1
> 
> 
> -- 
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