linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Lukas Wunner <lukas@wunner.de>
To: "Marek Behún" <kabel@kernel.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Bjorn Helgaas <helgaas@kernel.org>,
	Krzysztof Wilczy??ski <kw@linux.com>,
	Marc Zyngier <maz@kernel.org>,
	pali@kernel.org, linux-pci@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Gregory CLEMENT <gregory.clement@bootlin.com>
Subject: Re: [PATCH 07/18] PCI: pciehp: Enable Command Completed Interrupt only if supported
Date: Mon, 9 May 2022 06:01:39 +0200	[thread overview]
Message-ID: <20220509040139.GB26780@wunner.de> (raw)
In-Reply-To: <20220220193346.23789-8-kabel@kernel.org>

On Sun, Feb 20, 2022 at 08:33:35PM +0100, Marek Behún wrote:
> The No Command Completed Support bit in the Slot Capabilities register
> indicates whether Command Completed Interrupt Enable is unsupported.
> 
> Enable this interrupt only in the case it is supported.
[...]
> --- a/drivers/pci/hotplug/pciehp_hpc.c
> +++ b/drivers/pci/hotplug/pciehp_hpc.c
> @@ -817,7 +817,9 @@ static void pcie_enable_notification(struct controller *ctrl)
>  	else
>  		cmd |= PCI_EXP_SLTCTL_PDCE;
>  	if (!pciehp_poll_mode)
> -		cmd |= PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE;
> +		cmd |= PCI_EXP_SLTCTL_HPIE;
> +	if (!pciehp_poll_mode && !NO_CMD_CMPL(ctrl))
> +		cmd |= PCI_EXP_SLTCTL_CCIE;

Looks okay to me in principle, I'm just wondering why this change is
necessary, i.e. what issue are you seeing without it?

Thanks,

Lukas

  reply	other threads:[~2022-05-09  4:09 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-20 19:33 [PATCH 00/18] PCI: aardvark controller changes BATCH 5 Marek Behún
2022-02-20 19:33 ` [PATCH 01/18] PCI: pci-bridge-emul: Re-arrange register tests Marek Behún
2022-02-20 19:33 ` [PATCH 02/18] PCI: pci-bridge-emul: Add support for PCIe extended capabilities Marek Behún
2022-02-20 19:33 ` [PATCH 03/18] PCI: aardvark: Add support for AER registers on emulated bridge Marek Behún
2022-02-20 19:33 ` [PATCH 04/18] PCI: Add PCI_EXP_SLTCAP_*_SHIFT macros Marek Behún
2022-04-28 11:09   ` Lorenzo Pieralisi
2022-04-28 11:16     ` Pali Rohár
2022-05-18 19:23   ` Bjorn Helgaas
2022-05-18 19:26     ` Pali Rohár
2022-05-18 20:05       ` Marek Behún
2022-05-18 20:27         ` Bjorn Helgaas
2022-02-20 19:33 ` [PATCH 05/18] PCI: aardvark: Fix reporting Slot capabilities on emulated bridge Marek Behún
2022-02-20 19:33 ` [PATCH 06/18] PCI: pciehp: Enable DLLSC interrupt only if supported Marek Behún
2022-05-09  3:42   ` Lukas Wunner
2022-05-13 16:57     ` Pali Rohár
2022-05-14  9:14       ` Lukas Wunner
2022-08-18 12:22         ` Marek Behún
2022-02-20 19:33 ` [PATCH 07/18] PCI: pciehp: Enable Command Completed Interrupt " Marek Behún
2022-05-09  4:01   ` Lukas Wunner [this message]
2022-05-13 16:59     ` Pali Rohár
2022-02-20 19:33 ` [PATCH 08/18] PCI: aardvark: Add support for DLLSC and hotplug interrupt Marek Behún
2022-02-20 19:33 ` [PATCH 09/18] PCI: Add PCI_EXP_SLTCTL_ASPL_DISABLE macro Marek Behún
2022-02-20 19:33 ` [PATCH 10/18] PCI: Add function for parsing `slot-power-limit-milliwatt` DT property Marek Behún
2022-02-20 19:33 ` [PATCH 11/18] dt-bindings: PCI: aardvark: Describe slot-power-limit-milliwatt Marek Behún
2022-02-20 19:33 ` [PATCH 12/18] PCI: aardvark: Send Set_Slot_Power_Limit message Marek Behún
2022-02-20 19:33 ` [PATCH 13/18] arm64: dts: armada-3720-turris-mox: Define slot-power-limit-milliwatt for PCIe Marek Behún
2022-02-20 19:33 ` [PATCH 14/18] PCI: aardvark: Add clock support Marek Behún
2022-02-20 19:33 ` [PATCH 15/18] arm64: dts: marvell: armada-37xx: Add clock to PCIe node Marek Behún
2022-02-28 15:52   ` Gregory CLEMENT
2022-02-20 19:33 ` [PATCH 16/18] PCI: aardvark: Add suspend to RAM support Marek Behún
2022-04-12 11:14   ` Lorenzo Pieralisi
2022-02-20 19:33 ` [PATCH 17/18] PCI: aardvark: Run link training in separate worker Marek Behún
2022-04-12 15:25   ` Lorenzo Pieralisi
2022-04-12 17:55     ` Pali Rohár
2022-04-13  9:16       ` Lorenzo Pieralisi
2022-05-04 14:02         ` Marek Behún
2022-02-20 19:33 ` [PATCH 18/18] PCI: aardvark: Optimize PCIe card reset via GPIO Marek Behún
2022-04-11 15:36 ` [PATCH 00/18] PCI: aardvark controller changes BATCH 5 Lorenzo Pieralisi
2022-04-11 16:53   ` Pali Rohár
2022-05-13 10:33 ` Lorenzo Pieralisi
2022-05-13 16:48   ` Pali Rohár
2022-05-18 15:54 ` (subset) " Lorenzo Pieralisi
2022-08-16 16:25 ` Lorenzo Pieralisi
2022-08-18 13:56   ` Marek Behún

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220509040139.GB26780@wunner.de \
    --to=lukas@wunner.de \
    --cc=gregory.clement@bootlin.com \
    --cc=helgaas@kernel.org \
    --cc=kabel@kernel.org \
    --cc=kw@linux.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=maz@kernel.org \
    --cc=pali@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).