From: kernel test robot <lkp@intel.com>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzk@kernel.org>,
Jingoo Han <jingoohan1@gmail.com>,
Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <helgaas@kernel.org>,
Stanimir Varbanov <svarbanov@mm-sol.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: kbuild-all@lists.01.org, Vinod Koul <vkoul@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v12 6/8] PCI: dwc: Implement special ISR handler for split MSI IRQ setup
Date: Tue, 24 May 2022 08:18:39 +0800 [thread overview]
Message-ID: <202205240801.7l6SF2Hv-lkp@intel.com> (raw)
In-Reply-To: <20220523181836.2019180-7-dmitry.baryshkov@linaro.org>
Hi Dmitry,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on helgaas-pci/next]
[cannot apply to robh/for-next v5.18]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/intel-lab-lkp/linux/commits/Dmitry-Baryshkov/PCI-qcom-Fix-higher-MSI-vectors-handling/20220524-024956
base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
config: mips-allyesconfig (https://download.01.org/0day-ci/archive/20220524/202205240801.7l6SF2Hv-lkp@intel.com/config)
compiler: mips-linux-gcc (GCC) 11.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/35aa0471e2ee4f0f21b01fbcfe6a4a425e968596
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Dmitry-Baryshkov/PCI-qcom-Fix-higher-MSI-vectors-handling/20220524-024956
git checkout 35aa0471e2ee4f0f21b01fbcfe6a4a425e968596
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=mips SHELL=/bin/bash drivers/pci/controller/dwc/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/pci/controller/dwc/pcie-designware-host.c: In function 'dw_split_msi_isr':
>> drivers/pci/controller/dwc/pcie-designware-host.c:116:25: warning: variable 'pci' set but not used [-Wunused-but-set-variable]
116 | struct dw_pcie *pci;
| ^~~
vim +/pci +116 drivers/pci/controller/dwc/pcie-designware-host.c
108
109 static void dw_split_msi_isr(struct irq_desc *desc)
110 {
111 struct irq_chip *chip = irq_desc_get_chip(desc);
112 int irq = irq_desc_get_irq(desc);
113 struct pcie_port *pp;
114 int i;
115 u32 num_ctrls;
> 116 struct dw_pcie *pci;
117
118 chained_irq_enter(chip, desc);
119
120 pp = irq_desc_get_handler_data(desc);
121 pci = to_dw_pcie_from_pp(pp);
122
123 /*
124 * Unlike generic dw_handle_msi_irq(), we can determine which group of
125 * MSIs triggered the IRQ, so process just that group.
126 */
127 num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL;
128
129 for (i = 0; i < num_ctrls; i++) {
130 if (pp->msi_irq[i] == irq) {
131 dw_handle_single_msi_group(pp, i);
132 break;
133 }
134 }
135
136 WARN_ON_ONCE(i == num_ctrls);
137
138 chained_irq_exit(chip, desc);
139 }
140
--
0-DAY CI Kernel Test Service
https://01.org/lkp
next prev parent reply other threads:[~2022-05-24 0:19 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-23 18:18 [PATCH v12 0/8] PCI: qcom: Fix higher MSI vectors handling Dmitry Baryshkov
2022-05-23 18:18 ` [PATCH v12 1/8] PCI: qcom: Revert "PCI: qcom: Add support for handling MSIs from 8 endpoints" Dmitry Baryshkov
2022-05-23 18:18 ` [PATCH v12 2/8] PCI: dwc: Correct msi_irq condition in dw_pcie_free_msi() Dmitry Baryshkov
2022-06-02 13:42 ` Johan Hovold
2022-05-23 18:18 ` [PATCH v12 3/8] PCI: dwc: Convert msi_irq to the array Dmitry Baryshkov
2022-05-26 18:05 ` Rob Herring
2022-06-02 13:45 ` Johan Hovold
2022-05-23 18:18 ` [PATCH v12 4/8] PCI: dwc: split MSI IRQ parsing/allocation to a separate function Dmitry Baryshkov
2022-05-26 18:09 ` Rob Herring
2022-05-26 20:57 ` Dmitry Baryshkov
2022-06-02 13:55 ` Johan Hovold
2022-05-23 18:18 ` [PATCH v12 5/8] PCI: dwc: Handle MSIs routed to multiple GIC interrupts Dmitry Baryshkov
2022-05-26 18:17 ` Rob Herring
2022-06-02 14:18 ` Johan Hovold
2022-05-23 18:18 ` [PATCH v12 6/8] PCI: dwc: Implement special ISR handler for split MSI IRQ setup Dmitry Baryshkov
2022-05-24 0:18 ` kernel test robot [this message]
2022-05-26 18:42 ` Rob Herring
2022-05-26 20:29 ` Dmitry Baryshkov
2022-05-23 18:18 ` [PATCH v12 7/8] dt-bindings: PCI: qcom: Support additional MSI interrupts Dmitry Baryshkov
2022-05-26 18:19 ` Rob Herring
2022-05-23 18:18 ` [PATCH v12 8/8] arm64: dts: qcom: sm8250: provide " Dmitry Baryshkov
2022-05-24 14:52 ` [PATCH v12 0/8] PCI: qcom: Fix higher MSI vectors handling Bjorn Helgaas
2022-05-24 16:17 ` Dmitry Baryshkov
2022-05-24 16:35 ` Bjorn Helgaas
2022-06-02 14:21 ` Johan Hovold
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