From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: "Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
Serge Semin <fancer.lancer@gmail.com>,
Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
Frank Li <Frank.Li@nxp.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: [PATCH RESEND v5 11/18] PCI: dwc: Organize local variables usage
Date: Fri, 24 Jun 2022 17:34:21 +0300 [thread overview]
Message-ID: <20220624143428.8334-12-Sergey.Semin@baikalelectronics.ru> (raw)
In-Reply-To: <20220624143428.8334-1-Sergey.Semin@baikalelectronics.ru>
There are several places in the common DW PCIe code with incoherent local
variables usage: a variable is defined and initialized with a structure
field, but the structure pointer is de-referenced to access that field
anyway; the local variable is defined and initialized but either used just
once or not used afterwards in the main part of the subsequent method.
It's mainly concerns the pcie_port.dev field. Let's fix that in the
relevant places.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Changelog v4:
- This is a new patch created on the v4 lap of the series.
---
drivers/pci/controller/dwc/pcie-designware-host.c | 12 ++++++------
drivers/pci/controller/dwc/pcie-designware.c | 8 +++-----
2 files changed, 9 insertions(+), 11 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 9a4922b714e5..54257874c154 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -296,7 +296,7 @@ int dw_pcie_host_init(struct pcie_port *pp)
struct resource *cfg_res;
int ret;
- raw_spin_lock_init(&pci->pp.lock);
+ raw_spin_lock_init(&pp->lock);
cfg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "config");
if (cfg_res) {
@@ -388,15 +388,15 @@ int dw_pcie_host_init(struct pcie_port *pp)
dw_chained_msi_isr,
pp);
- ret = dma_set_mask(pci->dev, DMA_BIT_MASK(32));
+ ret = dma_set_mask(dev, DMA_BIT_MASK(32));
if (ret)
- dev_warn(pci->dev, "Failed to set DMA mask to 32-bit. Devices with only 32-bit MSI support may not work properly\n");
+ dev_warn(dev, "Failed to set DMA mask to 32-bit. Devices with only 32-bit MSI support may not work properly\n");
- pp->msi_data = dma_map_single_attrs(pci->dev, &pp->msi_msg,
+ pp->msi_data = dma_map_single_attrs(dev, &pp->msi_msg,
sizeof(pp->msi_msg),
DMA_FROM_DEVICE,
DMA_ATTR_SKIP_CPU_SYNC);
- ret = dma_mapping_error(pci->dev, pp->msi_data);
+ ret = dma_mapping_error(dev, pp->msi_data);
if (ret) {
dev_err(pci->dev, "Failed to map MSI data\n");
pp->msi_data = 0;
@@ -633,7 +633,7 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
}
if (pci->num_ob_windows <= atu_idx)
- dev_warn(pci->dev, "Resources exceed number of ATU entries (%d)\n",
+ dev_warn(dev, "Resources exceed number of ATU entries (%d)\n",
pci->num_ob_windows);
}
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index f9613835212b..ce01187947c9 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -677,8 +677,7 @@ static void dw_pcie_iatu_detect_regions(struct dw_pcie *pci)
void dw_pcie_iatu_detect(struct dw_pcie *pci)
{
- struct device *dev = pci->dev;
- struct platform_device *pdev = to_platform_device(dev);
+ struct platform_device *pdev = to_platform_device(pci->dev);
pci->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pci);
if (pci->iatu_unroll_enabled) {
@@ -687,7 +686,7 @@ void dw_pcie_iatu_detect(struct dw_pcie *pci)
platform_get_resource_byname(pdev, IORESOURCE_MEM, "atu");
if (res) {
pci->atu_size = resource_size(res);
- pci->atu_base = devm_ioremap_resource(dev, res);
+ pci->atu_base = devm_ioremap_resource(pci->dev, res);
}
if (!pci->atu_base || IS_ERR(pci->atu_base))
pci->atu_base = pci->dbi_base + DEFAULT_DBI_ATU_OFFSET;
@@ -711,9 +710,8 @@ void dw_pcie_iatu_detect(struct dw_pcie *pci)
void dw_pcie_setup(struct dw_pcie *pci)
{
+ struct device_node *np = pci->dev->of_node;
u32 val;
- struct device *dev = pci->dev;
- struct device_node *np = dev->of_node;
if (pci->link_gen > 0)
dw_pcie_link_set_max_speed(pci, pci->link_gen);
--
2.35.1
next prev parent reply other threads:[~2022-06-24 14:35 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-24 14:34 [PATCH RESEND v5 00/18] PCI: dwc: Various fixes and cleanups Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 01/18] PCI: dwc: Stop link in the host init error and de-initialization Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 02/18] PCI: dwc: Add unroll iATU space support to the regions disable method Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 03/18] PCI: dwc: Disable outbound windows for controllers with iATU Serge Semin
2022-06-27 22:40 ` Bjorn Helgaas
2022-06-28 11:42 ` Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 04/18] PCI: dwc: Set INCREASE_REGION_SIZE flag based on limit address Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 05/18] PCI: dwc: Deallocate EPC memory on EP init error Serge Semin
2022-06-28 6:35 ` Manivannan Sadhasivam
2022-06-24 14:34 ` [PATCH RESEND v5 06/18] PCI: dwc: Enable CDM-check independently from the num_lanes value Serge Semin
2022-06-28 6:37 ` Manivannan Sadhasivam
2022-06-24 14:34 ` [PATCH RESEND v5 07/18] PCI: dwc: Add braces to the multi-line if-else statements Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 08/18] PCI: dwc: Add trailing new-line literals to the log messages Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 09/18] PCI: dwc: Discard IP-core version checking on unrolled iATU detection Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 10/18] PCI: dwc: Convert Link-up status method to using dw_pcie_readl_dbi() Serge Semin
2022-06-24 14:34 ` Serge Semin [this message]
2022-06-28 6:38 ` [PATCH RESEND v5 11/18] PCI: dwc: Organize local variables usage Manivannan Sadhasivam
2022-06-28 23:33 ` Bjorn Helgaas
2022-06-29 2:03 ` Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 12/18] PCI: dwc: Re-use local pointer to the resource data Serge Semin
2022-06-28 6:39 ` Manivannan Sadhasivam
2022-06-24 14:34 ` [PATCH RESEND v5 13/18] PCI: dwc: Add start_link/stop_link inliners Serge Semin
2022-06-28 6:43 ` Manivannan Sadhasivam
2022-06-24 14:34 ` [PATCH RESEND v5 14/18] PCI: dwc: Move io_cfg_atu_shared to the Root Port descriptor Serge Semin
2022-06-28 6:44 ` Manivannan Sadhasivam
2022-06-24 14:34 ` [PATCH RESEND v5 15/18] PCI: dwc: Add dw_ prefix to the pcie_port structure name Serge Semin
2022-06-27 11:47 ` Jesper Nilsson
2022-06-27 12:16 ` Neil Armstrong
2022-06-28 6:46 ` Manivannan Sadhasivam
2022-06-24 14:34 ` [PATCH RESEND v5 16/18] PCI: dwc-plat: Simplify the probe method return value handling Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 17/18] PCI: dwc-plat: Discard unused regmap pointer Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 18/18] PCI: dwc-plat: Drop dw_plat_pcie_of_match forward declaration Serge Semin
2022-06-28 6:58 ` [PATCH RESEND v5 00/18] PCI: dwc: Various fixes and cleanups Manivannan Sadhasivam
2022-06-28 11:57 ` Serge Semin
2022-06-28 23:35 ` Bjorn Helgaas
2022-06-29 1:38 ` Serge Semin
2022-07-11 18:40 ` Serge Semin
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