linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Bjorn Helgaas <helgaas@kernel.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: wangseok.lee@samsung.com,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
	"kishon@ti.com" <kishon@ti.com>,
	"vkoul@kernel.org" <vkoul@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"jesper.nilsson@axis.com" <jesper.nilsson@axis.com>,
	"lars.persson@axis.com" <lars.persson@axis.com>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"linux-phy@lists.infradead.org" <linux-phy@lists.infradead.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	"kw@linux.com" <kw@linux.com>,
	"linux-arm-kernel@axis.com" <linux-arm-kernel@axis.com>,
	"kernel@axis.com" <kernel@axis.com>,
	Moon-Ki Jun <moonki.jun@samsung.com>,
	Sang Min Kim <hypmean.kim@samsung.com>,
	Dongjin Yang <dj76.yang@samsung.com>,
	Yeeun Kim <yeeun119.kim@samsung.com>
Subject: Re: [PATCH v4 3/5] PCI: axis: Add ARTPEC-8 PCIe controller driver
Date: Thu, 21 Jul 2022 15:58:19 -0500	[thread overview]
Message-ID: <20220721205819.GA1753070@bhelgaas> (raw)
In-Reply-To: <226ac31e-2ac4-cb73-ab67-62f86d5e5783@linaro.org>

On Thu, Jul 21, 2022 at 11:04:00AM +0200, Krzysztof Kozlowski wrote:
> On 20/07/2022 08:01, Wangseok Lee wrote:
> > Add support Axis, ARTPEC-8 SoC. ARTPEC-8 is the SoC platform of Axis
> > Communications. This is based on arm64 and support GEN4 & 2lane. This
> > PCIe controller is based on DesignWare Hardware core and uses DesignWare
> > core functions to implement the driver. "pcie-artpec6. c" supports artpec6
> > and artpec7 H/W. artpec8 can not be expanded because H/W configuration is
> > completely different from artpec6/7. PHY and sub controller are different.
> > 
> > Signed-off-by: Wangseok Lee <wangseok.lee@samsung.com>
> > Signed-off-by: Jaeho Cho <jaeho79.cho@samsung.com>
> > ---
> > v3->v4 :
> > -Remove unnecessary enum type
> > -Fix indentation
> > 
> 
> Thanks for the changes. This starts to look good, however I am not going
> to ack it. This is also not a strong NAK, as I would respect Bjorn and
> other maintainers decision.
> 
> I don't like the approach of creating only Artpec-8 specific driver.
> Samsung heavily reuses its block in all Exynos devices. Now it re-uses
> them for other designs as well. Therefore, even if merging with existing
> Exynos PCIe driver is not feasible (we had such discussions), I expect
> this to cover all Samsung Foundry PCIe devices. From all current designs
> up to future licensed blocks, including some new Samsung Exynos SoC. Or
> at least be ready for it.

I would certainly prefer fewer drivers but I don't know enough about
the underlying IP and the places it's integrated to to know what's
practical.  The only way I could figure that out would be by manually
comparing the drivers for similarity.  I assume/expect all driver
authors are doing that.

Bjorn

  reply	other threads:[~2022-07-21 20:58 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20220720055108epcms2p563c65b3de6333ccbc68386aa2471a800@epcms2p5>
2022-07-20  5:51 ` [PATCH v4 0/5] Add support for Axis, ARTPEC-8 PCIe driver Wangseok Lee
     [not found]   ` <CGME20220720055108epcms2p563c65b3de6333ccbc68386aa2471a800@epcms2p6>
2022-07-20  5:54     ` [PATCH v4 1/5] dt-bindings: pci: Add ARTPEC-8 PCIe controller Wangseok Lee
2022-07-20 14:17       ` Rob Herring
2022-07-21  8:55       ` Krzysztof Kozlowski
2022-07-20  5:57     ` [PATCH v4 2/5] dt-bindings: phy: Add ARTPEC-8 PCIe phy Wangseok Lee
2022-07-21  9:13       ` Krzysztof Kozlowski
2022-07-25 22:17       ` Rob Herring
     [not found]   ` <CGME20220720055108epcms2p563c65b3de6333ccbc68386aa2471a800@epcms2p3>
2022-07-20  6:01     ` [PATCH v4 3/5] PCI: axis: Add ARTPEC-8 PCIe controller driver Wangseok Lee
2022-07-21  9:04       ` Krzysztof Kozlowski
2022-07-21 20:58         ` Bjorn Helgaas [this message]
2022-07-22 17:36           ` Krzysztof Kozlowski
2022-07-22 19:46           ` Rob Herring
2022-07-21 20:56       ` Bjorn Helgaas
2022-07-22 20:31       ` Rob Herring
     [not found]   ` <CGME20220720055108epcms2p563c65b3de6333ccbc68386aa2471a800@epcms2p8>
2022-07-20  6:04     ` [PATCH v4 4/5] phy: Add ARTPEC-8 PCIe PHY driver Wangseok Lee
2022-07-20  6:18 ` [PATCH v4 5/5] MAINTAINERS: Add Axis ARTPEC-8 PCIe PHY maintainers Wangseok Lee

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220721205819.GA1753070@bhelgaas \
    --to=helgaas@kernel.org \
    --cc=bhelgaas@google.com \
    --cc=devicetree@vger.kernel.org \
    --cc=dj76.yang@samsung.com \
    --cc=hypmean.kim@samsung.com \
    --cc=jesper.nilsson@axis.com \
    --cc=kernel@axis.com \
    --cc=kishon@ti.com \
    --cc=krzk+dt@kernel.org \
    --cc=krzysztof.kozlowski@linaro.org \
    --cc=kw@linux.com \
    --cc=lars.persson@axis.com \
    --cc=linux-arm-kernel@axis.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-phy@lists.infradead.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=moonki.jun@samsung.com \
    --cc=robh+dt@kernel.org \
    --cc=vkoul@kernel.org \
    --cc=wangseok.lee@samsung.com \
    --cc=yeeun119.kim@samsung.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).