* [PATCH v4 10/71] PCI: PM: Switch to new Intel CPU model defines
[not found] <20240424181245.41141-1-tony.luck@intel.com>
@ 2024-04-24 18:14 ` Tony Luck
2024-04-24 18:15 ` [PATCH v4 42/71] x86/PCI: " Tony Luck
1 sibling, 0 replies; 2+ messages in thread
From: Tony Luck @ 2024-04-24 18:14 UTC (permalink / raw)
To: Borislav Petkov, linux-kernel
Cc: Bjorn Helgaas, linux-pci, patches, Tony Luck
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/pci-mid.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pci-mid.c b/drivers/pci/pci-mid.c
index fbfd78127123..bed9f0755271 100644
--- a/drivers/pci/pci-mid.c
+++ b/drivers/pci/pci-mid.c
@@ -38,8 +38,8 @@ pci_power_t mid_pci_get_power_state(struct pci_dev *pdev)
* arch/x86/platform/intel-mid/pwr.c.
*/
static const struct x86_cpu_id lpss_cpu_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, NULL),
+ X86_MATCH_VFM(INTEL_ATOM_SALTWELL_MID, NULL),
+ X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, NULL),
{}
};
--
2.44.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [PATCH v4 42/71] x86/PCI: Switch to new Intel CPU model defines
[not found] <20240424181245.41141-1-tony.luck@intel.com>
2024-04-24 18:14 ` [PATCH v4 10/71] PCI: PM: Switch to new Intel CPU model defines Tony Luck
@ 2024-04-24 18:15 ` Tony Luck
1 sibling, 0 replies; 2+ messages in thread
From: Tony Luck @ 2024-04-24 18:15 UTC (permalink / raw)
To: Borislav Petkov, Thomas Gleixner, Ingo Molnar, Dave Hansen, x86
Cc: Bjorn Helgaas, H. Peter Anvin, linux-pci, linux-kernel, patches,
Tony Luck
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <tony.luck@intel.com>
---
arch/x86/pci/intel_mid_pci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c
index 8edd62206604..933ff795e53e 100644
--- a/arch/x86/pci/intel_mid_pci.c
+++ b/arch/x86/pci/intel_mid_pci.c
@@ -216,7 +216,7 @@ static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
}
static const struct x86_cpu_id intel_mid_cpu_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, NULL),
+ X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, NULL),
{}
};
@@ -243,7 +243,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
model = id->model;
switch (model) {
- case INTEL_FAM6_ATOM_SILVERMONT_MID:
+ case VFM_MODEL(INTEL_ATOM_SILVERMONT_MID):
polarity_low = false;
/* Special treatment for IRQ0 */
--
2.44.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
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2024-04-24 18:14 ` [PATCH v4 10/71] PCI: PM: Switch to new Intel CPU model defines Tony Luck
2024-04-24 18:15 ` [PATCH v4 42/71] x86/PCI: " Tony Luck
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