From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Niklas Cassel <cassel@kernel.org>
Cc: "Jingoo Han" <jingoohan1@gmail.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Heiko Stuebner" <heiko@sntech.de>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Arnd Bergmann" <arnd@arndb.de>,
"Damien Le Moal" <dlemoal@kernel.org>,
"Jon Lin" <jon.lin@rock-chips.com>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Simon Xue" <xxm@rock-chips.com>,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v2 09/14] PCI: dw-rockchip: Refactor the driver to prepare for EP mode
Date: Sat, 4 May 2024 22:49:46 +0530 [thread overview]
Message-ID: <20240504171946.GF4315@thinkpad> (raw)
In-Reply-To: <20240430-rockchip-pcie-ep-v1-v2-9-a0f5ee2a77b6@kernel.org>
On Tue, Apr 30, 2024 at 02:01:06PM +0200, Niklas Cassel wrote:
> This refactors the driver to prepare for EP mode.
> Add of-match data to the existing compatible, and explicitly define it as
> DW_PCIE_RC_TYPE. This way, we will be able to add EP mode in a follow-up
> patch in a much less intrusive way, which makes the follup-up patches
> much easier to review.
>
Same comment as previous patch.
> No functional change intended.
>
> Signed-off-by: Niklas Cassel <cassel@kernel.org>
> ---
> drivers/pci/controller/dwc/pcie-dw-rockchip.c | 72 +++++++++++++++++++++------
> 1 file changed, 57 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> index 4023fd86176f..f985539fb00a 100644
> --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> @@ -58,6 +58,11 @@ struct rockchip_pcie {
> struct gpio_desc *rst_gpio;
> struct regulator *vpcie3v3;
> struct irq_domain *irq_domain;
> + enum dw_pcie_device_mode mode;
> +};
> +
> +struct rockchip_pcie_of_data {
> + enum dw_pcie_device_mode mode;
> };
>
> static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip, u32 reg)
> @@ -195,7 +200,6 @@ static int rockchip_pcie_host_init(struct dw_pcie_rp *pp)
> struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);
> struct device *dev = rockchip->pci.dev;
> - u32 val = HIWORD_UPDATE_BIT(PCIE_LTSSM_ENABLE_ENHANCE);
> int irq, ret;
>
> irq = of_irq_get_byname(dev->of_node, "legacy");
> @@ -209,12 +213,6 @@ static int rockchip_pcie_host_init(struct dw_pcie_rp *pp)
> irq_set_chained_handler_and_data(irq, rockchip_pcie_intx_handler,
> rockchip);
>
> - /* LTSSM enable control mode */
> - rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL);
> -
> - rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_RC_MODE,
> - PCIE_CLIENT_GENERAL_CONTROL);
> -
> return 0;
> }
>
> @@ -288,13 +286,41 @@ static const struct dw_pcie_ops dw_pcie_ops = {
> .start_link = rockchip_pcie_start_link,
> };
>
> +static int rockchip_pcie_configure_rc(struct rockchip_pcie *rockchip)
> +{
> + struct dw_pcie_rp *pp;
> + u32 val;
> +
> + if (!IS_ENABLED(CONFIG_PCIE_ROCKCHIP_DW_HOST))
> + return -ENODEV;
Right now this driver is only selected using CONFIG_PCIE_ROCKCHIP_DW_HOST. So
this check is not valid in _this_patch.
- Mani
--
மணிவண்ணன் சதாசிவம்
next prev parent reply other threads:[~2024-05-04 17:19 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-30 12:00 [PATCH v2 00/14] PCI: dw-rockchip: Add endpoint mode support Niklas Cassel
2024-04-30 12:00 ` [PATCH v2 01/14] dt-bindings: PCI: snps,dw-pcie-ep: Add vendor specific reg-name Niklas Cassel
2024-04-30 12:00 ` [PATCH v2 02/14] dt-bindings: PCI: snps,dw-pcie-ep: Add vendor specific interrupt-names Niklas Cassel
2024-04-30 12:01 ` [PATCH v2 03/14] dt-bindings: PCI: snps,dw-pcie-ep: Add tx_int{a,b,c,d} legacy irqs Niklas Cassel
2024-04-30 12:01 ` [PATCH v2 04/14] dt-bindings: PCI: rockchip-dw-pcie: Prepare for Endpoint mode support Niklas Cassel
2024-05-07 15:48 ` Rob Herring (Arm)
2024-04-30 12:01 ` [PATCH v2 05/14] dt-bindings: PCI: rockchip-dw-pcie: Fix description of legacy irq Niklas Cassel
2024-05-07 15:49 ` Rob Herring (Arm)
2024-04-30 12:01 ` [PATCH v2 06/14] dt-bindings: rockchip: Add DesignWare based PCIe Endpoint controller Niklas Cassel
2024-05-07 15:49 ` Rob Herring (Arm)
2024-04-30 12:01 ` [PATCH v2 07/14] PCI: dw-rockchip: Fix weird indentation Niklas Cassel
2024-05-04 17:10 ` Manivannan Sadhasivam
2024-04-30 12:01 ` [PATCH v2 08/14] PCI: dw-rockchip: Add rockchip_pcie_ltssm() helper Niklas Cassel
2024-05-04 17:13 ` Manivannan Sadhasivam
2024-05-07 23:55 ` Niklas Cassel
2024-04-30 12:01 ` [PATCH v2 09/14] PCI: dw-rockchip: Refactor the driver to prepare for EP mode Niklas Cassel
2024-05-04 17:19 ` Manivannan Sadhasivam [this message]
2024-04-30 12:01 ` [PATCH v2 10/14] PCI: dw-rockchip: Add explicit rockchip,rk3588-pcie compatible Niklas Cassel
2024-05-04 17:20 ` Manivannan Sadhasivam
2024-04-30 12:01 ` [PATCH v2 11/14] PCI: dw-rockchip: Add endpoint mode support Niklas Cassel
2024-05-04 17:32 ` Manivannan Sadhasivam
2024-05-07 23:50 ` Niklas Cassel
2024-04-30 12:01 ` [PATCH v2 12/14] misc: pci_endpoint_test: Add support for rockchip rk3588 Niklas Cassel
2024-05-04 17:33 ` Manivannan Sadhasivam
2024-04-30 12:01 ` [PATCH v2 13/14] arm64: dts: rockchip: Add PCIe endpoint mode support Niklas Cassel
2024-05-04 17:34 ` Manivannan Sadhasivam
2024-05-07 23:51 ` Niklas Cassel
2024-04-30 12:01 ` [PATCH v2 14/14] arm64: dts: rockchip: Add rock5b overlays for PCIe endpoint mode Niklas Cassel
2024-05-04 17:37 ` Manivannan Sadhasivam
2024-05-05 12:14 ` Heiko Stübner
2024-05-07 23:52 ` Niklas Cassel
2024-05-04 17:05 ` [PATCH v2 00/14] PCI: dw-rockchip: Add endpoint mode support Manivannan Sadhasivam
2024-05-07 23:48 ` Niklas Cassel
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