linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Niklas Cassel <cassel@kernel.org>
Cc: "Jingoo Han" <jingoohan1@gmail.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Arnd Bergmann" <arnd@arndb.de>,
	"Damien Le Moal" <dlemoal@kernel.org>,
	"Jon Lin" <jon.lin@rock-chips.com>,
	"Shawn Lin" <shawn.lin@rock-chips.com>,
	"Simon Xue" <xxm@rock-chips.com>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v2 12/14] misc: pci_endpoint_test: Add support for rockchip rk3588
Date: Sat, 4 May 2024 23:03:00 +0530	[thread overview]
Message-ID: <20240504173300.GI4315@thinkpad> (raw)
In-Reply-To: <20240430-rockchip-pcie-ep-v1-v2-12-a0f5ee2a77b6@kernel.org>

On Tue, Apr 30, 2024 at 02:01:09PM +0200, Niklas Cassel wrote:
> Rockchip rk3588 requires 64k alignment.
> While there is an existing device_id:vendor_id in the driver with 64k
> alignment, that device_id:vendor_id is am654, which uses BAR2 instead of
> BAR0 as the test_reg_bar, and also has special is_am654_pci_dev() checks
> in the driver to disallow BAR0. In order to allow testing all BARs, add a
> new rk3588 entry in the driver.
> 
> We intentionally do not add the vendor id to pci_ids.h, since the policy
> for that file is that the vendor id has to be used by multiple drivers.
> 
> Hopefully, this new entry will be short-lived, as there is a series on the
> mailing list which intends to move the address alignment restrictions from
> this driver to the endpoint side.
> 
> Add a new entry for rk3588 in order to allow us to test all BARs.
> 
> Signed-off-by: Niklas Cassel <cassel@kernel.org>

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

- Mani

> ---
>  drivers/misc/pci_endpoint_test.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c
> index c38a6083f0a7..a7f593b4e3b3 100644
> --- a/drivers/misc/pci_endpoint_test.c
> +++ b/drivers/misc/pci_endpoint_test.c
> @@ -84,6 +84,9 @@
>  #define PCI_DEVICE_ID_RENESAS_R8A774E1		0x0025
>  #define PCI_DEVICE_ID_RENESAS_R8A779F0		0x0031
>  
> +#define PCI_VENDOR_ID_ROCKCHIP			0x1d87
> +#define PCI_DEVICE_ID_ROCKCHIP_RK3588		0x3588
> +
>  static DEFINE_IDA(pci_endpoint_test_ida);
>  
>  #define to_endpoint_test(priv) container_of((priv), struct pci_endpoint_test, \
> @@ -980,6 +983,11 @@ static const struct pci_endpoint_test_data j721e_data = {
>  	.irq_type = IRQ_TYPE_MSI,
>  };
>  
> +static const struct pci_endpoint_test_data rk3588_data = {
> +	.alignment = SZ_64K,
> +	.irq_type = IRQ_TYPE_MSI,
> +};
> +
>  static const struct pci_device_id pci_endpoint_test_tbl[] = {
>  	{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA74x),
>  	  .driver_data = (kernel_ulong_t)&default_data,
> @@ -1017,6 +1025,9 @@ static const struct pci_device_id pci_endpoint_test_tbl[] = {
>  	{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_J721S2),
>  	  .driver_data = (kernel_ulong_t)&j721e_data,
>  	},
> +	{ PCI_DEVICE(PCI_VENDOR_ID_ROCKCHIP, PCI_DEVICE_ID_ROCKCHIP_RK3588),
> +	  .driver_data = (kernel_ulong_t)&rk3588_data,
> +	},
>  	{ }
>  };
>  MODULE_DEVICE_TABLE(pci, pci_endpoint_test_tbl);
> 
> -- 
> 2.44.0
> 

-- 
மணிவண்ணன் சதாசிவம்

  reply	other threads:[~2024-05-04 17:33 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-30 12:00 [PATCH v2 00/14] PCI: dw-rockchip: Add endpoint mode support Niklas Cassel
2024-04-30 12:00 ` [PATCH v2 01/14] dt-bindings: PCI: snps,dw-pcie-ep: Add vendor specific reg-name Niklas Cassel
2024-04-30 12:00 ` [PATCH v2 02/14] dt-bindings: PCI: snps,dw-pcie-ep: Add vendor specific interrupt-names Niklas Cassel
2024-04-30 12:01 ` [PATCH v2 03/14] dt-bindings: PCI: snps,dw-pcie-ep: Add tx_int{a,b,c,d} legacy irqs Niklas Cassel
2024-04-30 12:01 ` [PATCH v2 04/14] dt-bindings: PCI: rockchip-dw-pcie: Prepare for Endpoint mode support Niklas Cassel
2024-05-07 15:48   ` Rob Herring (Arm)
2024-04-30 12:01 ` [PATCH v2 05/14] dt-bindings: PCI: rockchip-dw-pcie: Fix description of legacy irq Niklas Cassel
2024-05-07 15:49   ` Rob Herring (Arm)
2024-04-30 12:01 ` [PATCH v2 06/14] dt-bindings: rockchip: Add DesignWare based PCIe Endpoint controller Niklas Cassel
2024-05-07 15:49   ` Rob Herring (Arm)
2024-04-30 12:01 ` [PATCH v2 07/14] PCI: dw-rockchip: Fix weird indentation Niklas Cassel
2024-05-04 17:10   ` Manivannan Sadhasivam
2024-04-30 12:01 ` [PATCH v2 08/14] PCI: dw-rockchip: Add rockchip_pcie_ltssm() helper Niklas Cassel
2024-05-04 17:13   ` Manivannan Sadhasivam
2024-05-07 23:55     ` Niklas Cassel
2024-04-30 12:01 ` [PATCH v2 09/14] PCI: dw-rockchip: Refactor the driver to prepare for EP mode Niklas Cassel
2024-05-04 17:19   ` Manivannan Sadhasivam
2024-04-30 12:01 ` [PATCH v2 10/14] PCI: dw-rockchip: Add explicit rockchip,rk3588-pcie compatible Niklas Cassel
2024-05-04 17:20   ` Manivannan Sadhasivam
2024-04-30 12:01 ` [PATCH v2 11/14] PCI: dw-rockchip: Add endpoint mode support Niklas Cassel
2024-05-04 17:32   ` Manivannan Sadhasivam
2024-05-07 23:50     ` Niklas Cassel
2024-04-30 12:01 ` [PATCH v2 12/14] misc: pci_endpoint_test: Add support for rockchip rk3588 Niklas Cassel
2024-05-04 17:33   ` Manivannan Sadhasivam [this message]
2024-04-30 12:01 ` [PATCH v2 13/14] arm64: dts: rockchip: Add PCIe endpoint mode support Niklas Cassel
2024-05-04 17:34   ` Manivannan Sadhasivam
2024-05-07 23:51     ` Niklas Cassel
2024-04-30 12:01 ` [PATCH v2 14/14] arm64: dts: rockchip: Add rock5b overlays for PCIe endpoint mode Niklas Cassel
2024-05-04 17:37   ` Manivannan Sadhasivam
2024-05-05 12:14     ` Heiko Stübner
2024-05-07 23:52       ` Niklas Cassel
2024-05-04 17:05 ` [PATCH v2 00/14] PCI: dw-rockchip: Add endpoint mode support Manivannan Sadhasivam
2024-05-07 23:48   ` Niklas Cassel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240504173300.GI4315@thinkpad \
    --to=manivannan.sadhasivam@linaro.org \
    --cc=arnd@arndb.de \
    --cc=bhelgaas@google.com \
    --cc=cassel@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dlemoal@kernel.org \
    --cc=heiko@sntech.de \
    --cc=jingoohan1@gmail.com \
    --cc=jon.lin@rock-chips.com \
    --cc=kishon@kernel.org \
    --cc=krzk+dt@kernel.org \
    --cc=kw@linux.com \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-rockchip@lists.infradead.org \
    --cc=lpieralisi@kernel.org \
    --cc=robh@kernel.org \
    --cc=shawn.lin@rock-chips.com \
    --cc=xxm@rock-chips.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).