linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Niklas Cassel <cassel@kernel.org>
To: "Jingoo Han" <jingoohan1@gmail.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Niklas Cassel" <cassel@kernel.org>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Arnd Bergmann" <arnd@arndb.de>,
	"Damien Le Moal" <dlemoal@kernel.org>,
	"Jon Lin" <jon.lin@rock-chips.com>,
	"Shawn Lin" <shawn.lin@rock-chips.com>,
	"Simon Xue" <xxm@rock-chips.com>
Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	 linux-rockchip@lists.infradead.org
Subject: [PATCH v3 05/13] dt-bindings: PCI: rockchip-dw-pcie: Fix description of legacy irq
Date: Wed, 08 May 2024 15:13:36 +0200	[thread overview]
Message-ID: <20240508-rockchip-pcie-ep-v1-v3-5-1748e202b084@kernel.org> (raw)
In-Reply-To: <20240508-rockchip-pcie-ep-v1-v3-0-1748e202b084@kernel.org>

The descriptions of the combined interrupt signals (level1) mention
all the lower interrupt signals (level2) for each combined interrupt,
regardless if the lower (level2) signal is RC or EP specific.

E.g. the description of "Combined system interrupt" includes rbar_update,
which is EP specific, and the description of "Combined message interrupt"
includes obff_idle, obff_obff, obff_cpu_active, which are all EP specific.

The only exception is the "Combined legacy interrupt", which for some
reason does not provide an exhaustive list of the lower (level2) signals.

Add the missing lower interrupt signals: tx_inta, tx_intb, tx_intc, and
tx_intd for the "Combined legacy interrupt", as per the rk3568 and rk3588
Technical Reference Manuals, such that the descriptions of the combined
interrupt signals are consistent.

Signed-off-by: Niklas Cassel <cassel@kernel.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
---
 Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml
index 60d190a77580..ec5e6a3d048e 100644
--- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml
+++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml
@@ -56,7 +56,8 @@ properties:
           pm_pme, pm_to_ack, pm_turnoff, obff_idle, obff_obff, obff_cpu_active
       - description:
           Combined legacy interrupt, which is used to signal the following
-          interrupts - inta, intb, intc, intd
+          interrupts - inta, intb, intc, intd, tx_inta, tx_intb, tx_intc,
+          tx_intd
       - description:
           Combined error interrupt, which is used to signal the following
           interrupts - aer_rc_err, aer_rc_err_msi, rx_cpl_timeout,

-- 
2.44.0


  parent reply	other threads:[~2024-05-08 13:14 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-08 13:13 [PATCH v3 00/13] PCI: dw-rockchip: Add endpoint mode support Niklas Cassel
2024-05-08 13:13 ` [PATCH v3 01/13] dt-bindings: PCI: snps,dw-pcie-ep: Add vendor specific reg-name Niklas Cassel
2024-05-08 13:13 ` [PATCH v3 02/13] dt-bindings: PCI: snps,dw-pcie-ep: Add vendor specific interrupt-names Niklas Cassel
2024-05-08 13:13 ` [PATCH v3 03/13] dt-bindings: PCI: snps,dw-pcie-ep: Add tx_int{a,b,c,d} legacy irqs Niklas Cassel
2024-05-08 13:13 ` [PATCH v3 04/13] dt-bindings: PCI: rockchip-dw-pcie: Prepare for Endpoint mode support Niklas Cassel
2024-05-08 13:13 ` Niklas Cassel [this message]
2024-05-08 13:13 ` [PATCH v3 06/13] dt-bindings: rockchip: Add DesignWare based PCIe Endpoint controller Niklas Cassel
2024-05-08 13:13 ` [PATCH v3 07/13] PCI: dw-rockchip: Fix weird indentation Niklas Cassel
2024-05-08 13:13 ` [PATCH v3 08/13] PCI: dw-rockchip: Add rockchip_pcie_get_ltssm() helper Niklas Cassel
2024-05-08 13:13 ` [PATCH v3 09/13] PCI: dw-rockchip: Refactor the driver to prepare for EP mode Niklas Cassel
2024-05-08 13:13 ` [PATCH v3 10/13] PCI: dw-rockchip: Add endpoint mode support Niklas Cassel
2024-05-08 13:13 ` [PATCH v3 11/13] misc: pci_endpoint_test: Add support for rockchip rk3588 Niklas Cassel
2024-05-08 13:13 ` [PATCH v3 12/13] arm64: dts: rockchip: Add PCIe endpoint mode support Niklas Cassel
2024-05-08 13:13 ` [PATCH v3 13/13] arm64: dts: rockchip: Add rock5b overlays for PCIe endpoint mode Niklas Cassel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240508-rockchip-pcie-ep-v1-v3-5-1748e202b084@kernel.org \
    --to=cassel@kernel.org \
    --cc=arnd@arndb.de \
    --cc=bhelgaas@google.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dlemoal@kernel.org \
    --cc=heiko@sntech.de \
    --cc=jingoohan1@gmail.com \
    --cc=jon.lin@rock-chips.com \
    --cc=kishon@kernel.org \
    --cc=krzk+dt@kernel.org \
    --cc=kw@linux.com \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-rockchip@lists.infradead.org \
    --cc=lpieralisi@kernel.org \
    --cc=manivannan.sadhasivam@linaro.org \
    --cc=robh@kernel.org \
    --cc=shawn.lin@rock-chips.com \
    --cc=xxm@rock-chips.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).