linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
To: linux-rockchip@lists.infradead.org
Cc: linux-rockchip@lists.infradead.org, heiko@sntech.de,
	Peter Geis <pgwipeout@gmail.com>, Marc Zyngier <maz@kernel.org>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Peter Geis <pgwipeout@gmail.com>
Subject: Re: [PATCH v8 0/5] Enable rk356x PCIe controller
Date: Tue, 26 Apr 2022 12:46:56 +0200	[thread overview]
Message-ID: <2599368.pI0oiQkSSZ@archbook> (raw)
In-Reply-To: <20220423152403.1681222-1-pgwipeout@gmail.com>

On Samstag, 23. April 2022 17:23:58 CEST Peter Geis wrote:
> This series enables the DesignWare based PCIe controller on the rk356x
> series of chips.
> We drop the fallback to the core driver due to compatibility issues.
> We reset the PCIe controller at driver probe to prevent issues in the
> future when firmware / kexec leaves the controller in an unknown state.
> We add support for legacy interrupts for cards that lack MSI support
> (which is partially broken currently).
> We then add the device tree nodes to enable PCIe on the Quartz64 Model
> A.

Tested-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>

Tested on a PINE64 Quartz64 Model A. The series was applied to 5.18-rc4,
and two devices were tested:

Device #1: ASMedia Technology Inc. ASM1142 USB 3.1 Host Controller

A USB 3.1 flash drive was plugged into the PCIe USB controller card.
Then, the block device was read. Performance was nominal, no errors
showed up in dmesg.

Device #2: NEC Corporation uPD720200 USB 3.0 Host Controller (rev 03)
behind a PLX Technology, Inc. PEX 8608 8-lane, 8-Port PCI Express Gen 2
(5.0 GT/s) Switch (rev ba) PCIe switch.

(it's a weird card I grabbed off an auction site with both USB and SATA
behind a PCIe switch, it's best not to worry about the twisted mind
that came up with it.)

A USB 3.1 flash drive was plugged into the PCIe controller card's
USB 3.0 port. Then, the block device was read. Performance was nominal,
no errors appeared in dmesg.

512 megabytes of /dev/urandom were redirected into a file. The file was
SHA1 checksummed. The file was then copied onto the mounted USB 3.1 drive
which was connected to the PCIe card. The drive was unmounted, then
re-mounted, and then a sha1sum of the file on the drive was calculated.
The checksums matched.

Based on these tests it is my understanding that this patch series is
functional for the use cases I have covered.

Regards,
Nicolas Frattaroli



      parent reply	other threads:[~2022-04-26 10:48 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-23 15:23 [PATCH v8 0/5] Enable rk356x PCIe controller Peter Geis
2022-04-23 15:23 ` [PATCH v8 1/5] dt-bindings: pci: remove fallback from Rockchip DesignWare binding Peter Geis
2022-04-23 15:24 ` [PATCH v8 2/5] PCI: dwc: rockchip: reset core at driver probe Peter Geis
2022-04-25  9:20   ` Philipp Zabel
2022-04-26 12:17     ` Peter Geis
2022-04-23 15:24 ` [PATCH v8 3/5] PCI: dwc: rockchip: add legacy interrupt support Peter Geis
2022-04-23 15:24 ` [PATCH v8 4/5] arm64: dts: rockchip: add rk3568 pcie2x1 controller Peter Geis
2022-04-23 15:24 ` [PATCH v8 5/5] arm64: dts: rockchip: enable pcie controller on quartz64-a Peter Geis
2022-04-25  1:45 ` [PATCH v8 0/5] Enable rk356x PCIe controller Bjorn Helgaas
2022-04-26 10:46 ` Nicolas Frattaroli [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=2599368.pI0oiQkSSZ@archbook \
    --to=frattaroli.nicolas@gmail.com \
    --cc=devicetree@vger.kernel.org \
    --cc=heiko@sntech.de \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-rockchip@lists.infradead.org \
    --cc=maz@kernel.org \
    --cc=pgwipeout@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).