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From: Arnd Bergmann <arnd@arndb.de>
To: linux-arm-kernel@lists.infradead.org
Cc: suravee.suthikulpanit@amd.com, will.deacon@arm.com,
	liviu.dudau@arm.com, marc.zyngier@arm.com, mark.rutland@arm.com,
	catalin.marinas@arm.com, jason@lakedaemon.net,
	tglx@linutronix.de, robh+dt@kernel.org, bhelgaas@google.com,
	Mark Rutland <Mark.Rutland@arm.com>,
	devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	Marc Zyngier <Marc.Zyngier@arm.com>,
	linux-pci@vger.kernel.org, Will Deacon <Will.Deacon@arm.com>,
	linux-kernel@vger.kernel.org,
	Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>,
	Catalin Marinas <Catalin.Marinas@arm.com>
Subject: Re: [RFC 4/4] irqchip: gicv2m: Add supports for ARM GICv2m MSI(-X)
Date: Mon, 29 Sep 2014 16:42:18 +0200	[thread overview]
Message-ID: <2648363.DSa0NxqRJL@wuerfel> (raw)
In-Reply-To: <1411937610-22125-5-git-send-email-suravee.suthikulpanit@amd.com>

On Sunday 28 September 2014 15:53:30 suravee.suthikulpanit@amd.com wrote:
> +       interrupt-controller@e1101000 {
> +               compatible = "arm,gic-400";
> +               #interrupt-cells = >;
> +               #address-cells = <2>;
> +               #size-cells = <2>;
> +               interrupt-controller;
> +               interrupts = <1 8 0xf04>;
> +               ranges = <0 0 0 0xe1100000 0 0x100000>;
> +               reg = <0x0 0xe1110000 0 0x01000>,
> +                     <0x0 0xe112f000 0 0x02000>,
> +                     <0x0 0xe1140000 0 0x10000>,
> +                     <0x0 0xe1160000 0 0x10000>;
> +               v2m0: v2m@0x8000 {
> +                       compatible = "arm,gic-v2m-frame";
> +                       msi-controller;
> +                       reg = <0x0 0x80000 0 0x1000>;
> +               };
> +
> +               ....
> +
> +               v2mN: v2m@0x9000 {
> +                       compatible = "arm,gic-v2m-frame";
> +                       msi-controller;
> +                       reg = <0x0 0x90000 0 0x1000>;
> +               };
> +       };
> 

Could this just be modeled as a separate msi-controller node
outside of the GIC?

Instead of the arm,msi-base-spi/arm,msi-num-spis properties, how
about using regular "interrupts"/"interrupt-parent" properties listing
the exact interrupts? That would also make it more flexible in
case the same layout is used with a parent other than the GIC.

	ARnd

      parent reply	other threads:[~2014-09-29 14:42 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-28 20:53 [RFC 0/4] Add PCI/MSI(x) support for AMD Seattle Platform suravee.suthikulpanit
2014-09-28 20:53 ` [RFC 1/4] arm64: amd-seattle: Adding device tree for AMD Seattle platform suravee.suthikulpanit
2014-10-10 13:45   ` Mark Rutland
2014-10-24 12:08     ` Suravee Suthikulpanit
2014-09-28 20:53 ` [RFC 2/4] PCI: generic: Add support for ARM64 and MSI(x) suravee.suthikulpanit
2014-09-29 14:36   ` Arnd Bergmann
2014-09-30 12:03     ` Lorenzo Pieralisi
2014-09-30 12:31       ` Arnd Bergmann
2014-09-30 16:12         ` Lorenzo Pieralisi
2014-09-30 16:42           ` Liviu Dudau
2014-09-30 17:35             ` Lorenzo Pieralisi
2014-09-30 17:48               ` Liviu Dudau
2014-09-30 18:54                 ` Arnd Bergmann
2014-09-30 20:01                   ` Arnd Bergmann
2014-10-01  8:46                     ` Liviu Dudau
2014-10-01  9:38                       ` Arnd Bergmann
2014-10-07 12:06                         ` Lorenzo Pieralisi
2014-10-07 13:52                           ` Arnd Bergmann
2014-10-07 14:47                             ` Lorenzo Pieralisi
2014-10-07 21:39                               ` Arnd Bergmann
2014-10-08 10:19                                 ` Lorenzo Pieralisi
2014-10-08 14:47                                   ` Arnd Bergmann
2014-10-09  9:04                                     ` Lorenzo Pieralisi
2014-10-09 10:51                                       ` Arnd Bergmann
2014-10-10 13:58                                         ` Lorenzo Pieralisi
2014-10-10 18:31                                           ` Arnd Bergmann
2014-10-13  9:36                                             ` Lorenzo Pieralisi
2014-10-22 15:59                         ` Lorenzo Pieralisi
2014-10-22 16:49                           ` Bjorn Helgaas
2014-10-22 20:52                           ` Arnd Bergmann
2014-10-23  9:13                             ` Liviu Dudau
2014-10-23 11:27                               ` Lorenzo Pieralisi
2014-10-23 16:52                                 ` Jason Gunthorpe
2014-10-27 16:10                                   ` Lorenzo Pieralisi
2014-10-23 13:33                               ` Arnd Bergmann
2014-10-24 10:04                                 ` Liviu Dudau
2014-11-05 23:40                                 ` Bjorn Helgaas
2014-11-06  0:06                                   ` Arnd Bergmann
2014-12-29 19:32                                 ` Suravee Suthikulpanit
2015-01-02 11:55                                   ` Lorenzo Pieralisi
2015-01-02 18:18                                     ` Suravee Suthikulanit
2015-01-02 21:09                                       ` Arnd Bergmann
2015-01-05 14:48                                         ` Lorenzo Pieralisi
2014-11-05 23:39                             ` Bjorn Helgaas
2014-11-06  0:05                               ` Arnd Bergmann
2014-11-06  9:52                                 ` Lorenzo Pieralisi
2014-09-29 19:19   ` Sunil Kovvuri
2014-09-28 20:53 ` [RFC 3/4] arm64: Do not call enable PCI resources when specify PCI_PROBE_ONLY suravee.suthikulpanit
2014-09-29 14:38   ` Arnd Bergmann
2014-09-29 18:17   ` Bjorn Helgaas
2015-06-23 22:34     ` Benjamin Herrenschmidt
2015-06-23 23:05       ` Russell King - ARM Linux
2015-06-23 22:32   ` Benjamin Herrenschmidt
2014-09-28 20:53 ` [RFC 4/4] irqchip: gicv2m: Add supports for ARM GICv2m MSI(-X) suravee.suthikulpanit
2014-09-28 21:35   ` Suravee Suthikulpanit
2014-09-29 14:23     ` Thomas Gleixner
2014-09-29 14:42   ` Arnd Bergmann [this message]

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