* [PATCH v7 05/14] sizes.h: Add SZ_1T macro
[not found] <cover.1642752946.git.christophe.leroy@csgroup.eu>
@ 2022-01-21 8:42 ` Christophe Leroy
2022-02-24 15:05 ` Lorenzo Pieralisi
0 siblings, 1 reply; 2+ messages in thread
From: Christophe Leroy @ 2022-01-21 8:42 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, alex
Cc: Christophe Leroy, linux-kernel, linuxppc-dev, linux-mm, akpm,
catalin.marinas, will, linux-arm-kernel, Toan Le, linux-pci,
Krzysztof Wilczyński, Bjorn Helgaas
Today drivers/pci/controller/pci-xgene.c defines SZ_1T
Move it into linux/sizes.h so that it can be re-used elsewhere.
Cc: Toan Le <toan@os.amperecomputing.com>
Cc: linux-pci@vger.kernel.org
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/controller/pci-xgene.c | 1 -
include/linux/sizes.h | 2 ++
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/pci-xgene.c b/drivers/pci/controller/pci-xgene.c
index 56d0d50338c8..716dcab5ca47 100644
--- a/drivers/pci/controller/pci-xgene.c
+++ b/drivers/pci/controller/pci-xgene.c
@@ -49,7 +49,6 @@
#define EN_REG 0x00000001
#define OB_LO_IO 0x00000002
#define XGENE_PCIE_DEVICEID 0xE004
-#define SZ_1T (SZ_1G*1024ULL)
#define PIPE_PHY_RATE_RD(src) ((0xc000 & (u32)(src)) >> 0xe)
#define XGENE_V1_PCI_EXP_CAP 0x40
diff --git a/include/linux/sizes.h b/include/linux/sizes.h
index 1ac79bcee2bb..84aa448d8bb3 100644
--- a/include/linux/sizes.h
+++ b/include/linux/sizes.h
@@ -47,6 +47,8 @@
#define SZ_8G _AC(0x200000000, ULL)
#define SZ_16G _AC(0x400000000, ULL)
#define SZ_32G _AC(0x800000000, ULL)
+
+#define SZ_1T _AC(0x10000000000, ULL)
#define SZ_64T _AC(0x400000000000, ULL)
#endif /* __LINUX_SIZES_H__ */
--
2.33.1
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