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From: Joao Pinto <Joao.Pinto@synopsys.com>
To: Kishon Vijay Abraham I <kishon@ti.com>,
	Joao Pinto <Joao.Pinto@synopsys.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Jingoo Han <jingoohan1@gmail.com>
Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-pci@vger.kernel.org, nsekhar@ti.com,
	linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 08/22] PCI: dwc: designware: Add EP mode support
Date: Wed, 8 Mar 2017 15:32:03 +0000	[thread overview]
Message-ID: <650c53fc-482c-feab-faa3-c30689d3d128@synopsys.com> (raw)
In-Reply-To: <58C00798.1030302@ti.com>

=C0s 1:31 PM de 3/8/2017, Kishon Vijay Abraham I escreveu:
> Hi,
> =

> On Wednesday 08 March 2017 05:07 PM, Joao Pinto wrote:
>> =C0s 11:35 AM de 3/8/2017, Kishon Vijay Abraham I escreveu:
>>> Hi,
>>>
>>> On Wednesday 08 March 2017 05:02 PM, Joao Pinto wrote:
>>>>
>>>> Hi Kishon,
>>>>
>>>>>> Can you provide PCIE_GET_ATU_INB_UNR_REG_OFFSET (similar to
>>>>>> PCIE_GET_ATU_OUTB_UNR_REG_OFFSET)?
>>>>>
>>>>> Yes of course, I will send you the definition soon.
>>>>
>>>> As promissed here is the definition for Inbound:
>>>>
>>>> +/* register address builder */
>>>> +#define PCIE_GET_ATU_INB_UNR_REG_ADDR(region, register)		\
>>>> +					((0x3 << 20) | (region << 9) |	\
>>>> +					(0x1 << 8) | (register << 2))
>>>
>>> Cool, thanks!
>>
>> No problem! If you have doubts, please let me know.
> =

> Okay, so this looks slightly different than the outbound macro since it t=
akes
> the register argument. In the case of outbound PCIE_GET_ATU_OUTB_UNR_REG_=
OFFSET
> returns the offset which was used like
> dw_pcie_write_dbi(pci, base, offset + reg, 0x4, val);
> =

> How should the value from PCIE_GET_ATU_INB_UNR_REG_ADDR be used?

My original way was this one:

+/* Register address builder */
+#define PCIE_GET_ATU_OUTB_UNR_REG_ADDR(region, register)		\
+					((0x3 << 20) | (region << 9) |	\
+					(register << 2))

Bjorn then converted to offset:

#define PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(region)  ((0x3 << 20) | (region <<=
 9))

and applied the <<2 shift to the ATU registers.

So you can use:

#define PCIE_GET_ATU_INB_UNR_REG_ADDR(region, register)		\
					((0x3 << 20) | (region << 9) |	\
					(0x1 << 8)

Thanks.

> =

> Thanks
> Kishon
> =



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  reply	other threads:[~2017-03-08 15:32 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-17  9:50 [PATCH v2 00/22] PCI: Support for configurable PCI endpoint Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 01/22] PCI: endpoint: Add EP core layer to enable EP controller and EP functions Kishon Vijay Abraham I
2017-02-17 11:26   ` Joao Pinto
2017-02-17 11:37     ` Kishon Vijay Abraham I
2017-02-17 11:39       ` Joao Pinto
2017-02-17  9:50 ` [PATCH v2 02/22] Documentation: PCI: Guide to use PCI Endpoint Core Layer Kishon Vijay Abraham I
2017-02-17 11:43   ` Joao Pinto
2017-02-17  9:50 ` [PATCH v2 03/22] PCI: endpoint: Introduce configfs entry for configuring EP functions Kishon Vijay Abraham I
2017-02-17 12:01   ` Kishon Vijay Abraham I
2017-02-17 17:04   ` Christoph Hellwig
2017-03-06  9:41     ` Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 04/22] Documentation: PCI: Guide to use pci endpoint configfs Kishon Vijay Abraham I
2017-02-17 13:05   ` Joao Pinto
2017-02-17 17:15   ` Christoph Hellwig
2017-03-06 10:16     ` Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 05/22] Documentation: PCI: Add specification for the *pci test* function device Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 06/22] PCI: endpoint: functions: Add an EP function to test PCI Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 07/22] Documentation: PCI: Add binding documentation for pci-test endpoint function Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 08/22] PCI: dwc: designware: Add EP mode support Kishon Vijay Abraham I
2017-02-17 13:15   ` Kishon Vijay Abraham I
2017-02-17 17:20   ` Joao Pinto
2017-03-06  9:55     ` Kishon Vijay Abraham I
2017-03-07  5:18     ` Kishon Vijay Abraham I
2017-03-07 11:10       ` Joao Pinto
2017-03-08 11:32         ` Joao Pinto
2017-03-08 11:35           ` Kishon Vijay Abraham I
2017-03-08 11:37             ` Joao Pinto
2017-03-08 13:31               ` Kishon Vijay Abraham I
2017-03-08 15:32                 ` Joao Pinto [this message]
2017-03-08 15:33                   ` Joao Pinto
2017-03-08 19:14                   ` Christoph Hellwig
2017-03-09 11:55                     ` Joao Pinto
2017-02-17  9:50 ` [PATCH v2 09/22] dt-bindings: PCI: Add dt bindings for pci designware EP mode Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 10/22] PCI: dwc: dra7xx: Facilitate wrapper and msi interrupts to be enabled independently Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 11/22] PCI: dwc: dra7xx: Add EP mode support Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 12/22] dt-bindings: PCI: dra7xx: Add dt bindings for pci dra7xx EP mode Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 13/22] PCI: dwc: dra7xx: Workaround for errata id i870 Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 14/22] dt-bindings: PCI: dra7xx: Add dt bindings to enable legacy mode Kishon Vijay Abraham I
2017-02-27 16:40   ` Rob Herring
2017-02-28  3:28     ` Kishon Vijay Abraham I
2017-03-06  9:56     ` Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 15/22] PCI: Add device IDs for DRA74x and DRA72x Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 16/22] misc: Add host side pci driver for pci test function device Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 17/22] Documentation: misc-devices: Add Documentation for pci-endpoint-test driver Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 18/22] tools: PCI: Add a userspace tool to test PCI endpoint Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 19/22] tools: PCI: Add sample test script to invoke pcitest Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 20/22] Documentation: PCI: Add userguide for PCI endpoint test function Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 21/22] MAINTAINERS: add PCI EP maintainer Kishon Vijay Abraham I
2017-02-17  9:50 ` [PATCH v2 22/22] ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP Kishon Vijay Abraham I

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