From: "Dey, Megha" <megha.dey@intel.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Dave Jiang <dave.jiang@intel.com>,
vkoul@kernel.org, maz@kernel.org, bhelgaas@google.com,
alex.williamson@redhat.com, jacob.jun.pan@intel.com,
ashok.raj@intel.com, jgg@mellanox.com, yi.l.liu@intel.com,
baolu.lu@intel.com, kevin.tian@intel.com,
sanjay.k.kumar@intel.com, tony.luck@intel.com,
jing.lin@intel.com, dan.j.williams@intel.com,
kwankhede@nvidia.com, eric.auger@redhat.com, parav@mellanox.com,
rafael@kernel.org, netanelg@mellanox.com, shahafs@mellanox.com,
yan.y.zhao@linux.intel.com, pbonzini@redhat.com,
samuel.ortiz@intel.com, mona.hossain@intel.com
Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
x86@kernel.org, linux-pci@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH v3 02/18] iommu/vt-d: Add DEV-MSI support
Date: Thu, 1 Oct 2020 16:26:14 -0700 [thread overview]
Message-ID: <694548eb-9e07-cf1d-72fa-fa29ce78a15c@intel.com> (raw)
In-Reply-To: <87zh57glow.fsf@nanos.tec.linutronix.de>
Hi Thomas,
On 9/30/2020 11:32 AM, Thomas Gleixner wrote:
> On Tue, Sep 15 2020 at 16:27, Dave Jiang wrote:
>> @@ -1303,9 +1303,10 @@ static void intel_irq_remapping_prepare_irte(struct intel_ir_data *data,
>> case X86_IRQ_ALLOC_TYPE_HPET:
>> case X86_IRQ_ALLOC_TYPE_PCI_MSI:
>> case X86_IRQ_ALLOC_TYPE_PCI_MSIX:
>> + case X86_IRQ_ALLOC_TYPE_DEV_MSI:
>> if (info->type == X86_IRQ_ALLOC_TYPE_HPET)
>> set_hpet_sid(irte, info->devid);
>> - else
>> + else if (info->type != X86_IRQ_ALLOC_TYPE_DEV_MSI)
>> set_msi_sid(irte,
>> msi_desc_to_pci_dev(info->desc));
> Gah. this starts to become unreadable.
hmm ok will change it.
>
> diff --git a/drivers/iommu/intel/irq_remapping.c b/drivers/iommu/intel/irq_remapping.c
> index 8f4ce72570ce..0c1ea8ceec31 100644
> --- a/drivers/iommu/intel/irq_remapping.c
> +++ b/drivers/iommu/intel/irq_remapping.c
> @@ -1271,6 +1271,16 @@ static struct irq_chip intel_ir_chip = {
> .irq_set_vcpu_affinity = intel_ir_set_vcpu_affinity,
> };
>
> +static void irte_prepare_msg(struct msi_msg *msg, int index, int subhandle)
> +{
> + msg->address_hi = MSI_ADDR_BASE_HI;
> + msg->data = sub_handle;
> + msg->address_lo = MSI_ADDR_BASE_LO | MSI_ADDR_IR_EXT_INT |
> + MSI_ADDR_IR_SHV |
> + MSI_ADDR_IR_INDEX1(index) |
> + MSI_ADDR_IR_INDEX2(index);
> +}
> +
> static void intel_irq_remapping_prepare_irte(struct intel_ir_data *data,
> struct irq_cfg *irq_cfg,
> struct irq_alloc_info *info,
> @@ -1312,19 +1322,18 @@ static void intel_irq_remapping_prepare_irte(struct intel_ir_data *data,
> break;
>
> case X86_IRQ_ALLOC_TYPE_HPET:
> + set_hpet_sid(irte, info->hpet_id);
> + irte_prepare_msg(msg, index, sub_handle);
> + break;
> +
> case X86_IRQ_ALLOC_TYPE_MSI:
> case X86_IRQ_ALLOC_TYPE_MSIX:
> - if (info->type == X86_IRQ_ALLOC_TYPE_HPET)
> - set_hpet_sid(irte, info->hpet_id);
> - else
> - set_msi_sid(irte, info->msi_dev);
> -
> - msg->address_hi = MSI_ADDR_BASE_HI;
> - msg->data = sub_handle;
> - msg->address_lo = MSI_ADDR_BASE_LO | MSI_ADDR_IR_EXT_INT |
> - MSI_ADDR_IR_SHV |
> - MSI_ADDR_IR_INDEX1(index) |
> - MSI_ADDR_IR_INDEX2(index);
> + set_msi_sid(irte, info->msi_dev);
> + irte_prepare_msg(msg, index, sub_handle);
> + break;
> +
> + case X86_IRQ_ALLOC_TYPE_DEV_MSI:
> + irte_prepare_msg(msg, index, sub_handle);
> break;
>
> default:
>
> Hmm?
ok so I have no clue what happened here. This was the patch that was
sent out:
https://lore.kernel.org/lkml/160021246905.67751.1674517279122764758.stgit@djiang5-desk3.ch.intel.com/
and this does not have the above change. Not sure what happened here.
Anyways, this should not be there.
>
> Thanks,
>
> tglx
next prev parent reply other threads:[~2020-10-01 23:26 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <160021207013.67751.8220471499908137671.stgit@djiang5-desk3.ch.intel.com>
2020-09-15 23:27 ` [PATCH v3 01/18] irqchip: Add IMS (Interrupt Message Storage) driver Dave Jiang
2020-09-30 18:23 ` Thomas Gleixner
2020-10-01 22:59 ` Dey, Megha
2020-09-15 23:27 ` [PATCH v3 02/18] iommu/vt-d: Add DEV-MSI support Dave Jiang
2020-09-30 18:32 ` Thomas Gleixner
2020-10-01 23:26 ` Dey, Megha [this message]
2020-10-02 11:13 ` Thomas Gleixner
2020-10-08 7:54 ` David Woodhouse
2020-10-20 21:42 ` Dey, Megha
2020-09-15 23:28 ` [PATCH v3 05/18] dmaengine: idxd: add IMS support in base driver Dave Jiang
2020-09-30 18:47 ` Thomas Gleixner
2020-09-30 18:51 ` Jason Gunthorpe
2020-09-30 21:48 ` Thomas Gleixner
2020-09-30 21:49 ` Raj, Ashok
2020-09-30 21:57 ` Thomas Gleixner
2020-10-01 1:07 ` Raj, Ashok
2020-10-01 8:44 ` Thomas Gleixner
2020-09-30 22:38 ` Jason Gunthorpe
2020-10-01 20:48 ` Dave Jiang
2020-09-15 23:28 ` [PATCH v3 07/18] dmaengine: idxd: add basic mdev registration and helper functions Dave Jiang
2020-09-15 23:28 ` [PATCH v3 10/18] dmaengine: idxd: virtual device commands emulation Dave Jiang
2020-09-15 23:28 ` [PATCH v3 12/18] dmaengine: idxd: add mdev type as a new wq type Dave Jiang
2020-09-15 23:29 ` [PATCH v3 13/18] dmaengine: idxd: add dedicated wq mdev type Dave Jiang
2020-09-15 23:29 ` [PATCH v3 14/18] dmaengine: idxd: add new wq state for mdev Dave Jiang
2020-09-15 23:29 ` [PATCH v3 15/18] dmaengine: idxd: add error notification from host driver to mediated device Dave Jiang
2020-09-15 23:29 ` [PATCH v3 16/18] dmaengine: idxd: add ABI documentation for mediated device support Dave Jiang
2020-09-17 15:06 ` [PATCH v3 00/18] Add VFIO mediated device support and DEV-MSI support for the idxd driver Jason Gunthorpe
2020-09-17 17:15 ` Dave Jiang
2020-09-17 17:27 ` Jason Gunthorpe
2020-09-17 17:30 ` Alex Williamson
2020-09-17 17:37 ` Jason Gunthorpe
[not found] ` <160021248280.67751.12525558281536923518.stgit@djiang5-desk3.ch.intel.com>
2020-09-30 18:36 ` [PATCH v3 04/18] dmaengine: idxd: add interrupt handle request support Thomas Gleixner
2020-10-01 20:16 ` Dave Jiang
[not found] ` <160021253189.67751.12686144284999931703.stgit@djiang5-desk3.ch.intel.com>
2020-09-30 19:57 ` [PATCH v3 11/18] dmaengine: idxd: ims setup for the vdcm Thomas Gleixner
2020-10-07 21:54 ` Dave Jiang
2020-10-08 7:39 ` Thomas Gleixner
2020-10-08 16:51 ` Dave Jiang
2020-10-08 23:17 ` Thomas Gleixner
2020-10-08 23:32 ` Jason Gunthorpe
2020-10-09 0:27 ` Dave Jiang
2020-10-09 1:22 ` Raj, Ashok
2020-10-09 11:57 ` Jason Gunthorpe
2020-10-09 12:43 ` Raj, Ashok
2020-10-09 12:49 ` Jason Gunthorpe
2020-10-09 13:02 ` Raj, Ashok
2020-10-09 13:12 ` Jason Gunthorpe
2020-10-09 13:40 ` Raj, Ashok
2020-10-09 14:44 ` Thomas Gleixner
2020-10-09 14:52 ` Jason Gunthorpe
2020-10-09 16:02 ` Thomas Gleixner
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