From: Shawn Lin <shawn.lin@rock-chips.com>
To: Rob Herring <robh@kernel.org>
Cc: shawn.lin@rock-chips.com, devicetree@vger.kernel.org,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Heiko Stuebner <heiko@sntech.de>,
linux-rockchip@lists.infradead.org,
Jingoo Han <jingoohan1@gmail.com>,
Kishon Vijay Abraham I <kishon@ti.com>,
William Wu <william.wu@rock-chips.com>,
linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
Simon Xue <xxm@rock-chips.com>
Subject: Re: [PATCH 1/6] dt-bindings: add binding for Rockchip combo phy using an Innosilicon IP【请注意,邮件由linux-rockchip-bounces+shawn.lin=rock-chips.com@lists.infradead.org代发】
Date: Thu, 16 Jan 2020 08:03:54 +0800 [thread overview]
Message-ID: <75a1b9d2-6dff-eaad-dab5-87321a7ca9cd@rock-chips.com> (raw)
In-Reply-To: <20200114234323.GA5823@bogus>
On 2020/1/15 7:43, Rob Herring wrote:
> On Tue, Jan 14, 2020 at 03:22:55PM +0800, Shawn Lin wrote:
>> This IP could supports USB3.0 and PCIe.
>>
>> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
>>
>> ---
>>
>> .../bindings/phy/rockchip,inno-combophy.yaml | 84 ++++++++++++++++++++++
>> 1 file changed, 84 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/phy/rockchip,inno-combophy.yaml
>
> Fails 'make dt_binding_check':
>
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/rockchip,inno-combophy.yaml:
> ignoring, error in schema: properties: rockchip,combphygrf
> Documentation/devicetree/bindings/display/simple-framebuffer.example.dts:21.16-37.11:
> Warning (chosen_node_is_root): /example-0/chosen: chosen node must be at root node
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/rockchip,inno-combophy.yaml:
> properties:rockchip,combphygrf: {'items': [{'description': 'The grf for
> COMBPHY configuration and state registers.'}]} is not valid under any of
> the given schemas (Possible causes of the failure):
>
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/rockchip,inno-combophy.yaml:
> properties:rockchip,combphygrf: 'description' is a required property
>
Thanks Rob, will fix them in v2.
>
>>
>> diff --git a/Documentation/devicetree/bindings/phy/rockchip,inno-combophy.yaml b/Documentation/devicetree/bindings/phy/rockchip,inno-combophy.yaml
>> new file mode 100644
>> index 0000000..d647ab3
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/phy/rockchip,inno-combophy.yaml
>> @@ -0,0 +1,84 @@
>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/phy/rockchip,inno-combophy.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Rockchip USB3.0/PCI-e combo phy
>> +
>> +maintainers:
>> + - Shawn Lin <shawn.lin@rock-chips.com>
>> + - William Wu <william.wu@rock-chips.com>
>
> 2 space indent.
>
>> +
>> +properties:
>> + "#phy-cells":
>> + const: 1
>> +
>> + compatible:
>> + enum:
>> + - rockchip,rk1808-combphy
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + clocks:
>> + items:
>> + - description: PLL reference clock
>> +
>> + clock-names:
>> + items:
>> + - const: refclk
>> +
>> + resets:
>> + items:
>> + - description: OTG unit reset line
>> + - description: POR unit reset line
>> + - description: APB interface reset line
>> + - description: PIPE unit reset line
>> +
>> + reset-names:
>> + items:
>> + - const: otg-rst
>> + - const: combphy-por
>> + - const: combphy-apb
>> + - const: combphy-pipe
>> +
>> + rockchip,combphygrf:
>> + items:
>> + - description: The grf for COMBPHY configuration and state registers.
>> +
>> +required:
>> + - "#phy-cells"
>> + - compatible
>> + - reg
>> + - clocks
>> + - clock-names
>> + - resets
>> + - reset-names
>> + - rockchip,combphygrf
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + combphy_grf: syscon@fe018000 {
>> + compatible = "rockchip,usb3phy-grf", "syscon";
>> + reg = <0x0 0xfe018000 0x0 0x8000>;
>> + };
>> +
>> + combphy: phy@ff380000 {
>> + compatible = "rockchip,rk1808-combphy";
>> + reg = <0x0 0xff380000 0x0 0x10000>;
>> + #phy-cells = <1>;
>> + clocks = <&cru SCLK_PCIEPHY_REF>;
>> + clock-names = "refclk";
>> + assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
>> + assigned-clock-rates = <25000000>;
>> + resets = <&cru SRST_USB3_OTG_A>, <&cru SRST_PCIEPHY_POR>,
>> + <&cru SRST_PCIEPHY_P>, <&cru SRST_PCIEPHY_PIPE>;
>> + reset-names = "otg-rst", "combphy-por",
>> + "combphy-apb", "combphy-pipe";
>> + rockchip,combphygrf = <&combphy_grf>;
>> + };
>> +
>> +...
>> --
>> 1.9.1
>>
>>
>>
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
>
>
>
next prev parent reply other threads:[~2020-01-16 0:04 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-14 7:22 [PATCH 0/6] Add Rockchip new PCIe controller and combo phy support Shawn Lin
2020-01-14 7:22 ` [PATCH 1/6] dt-bindings: add binding for Rockchip combo phy using an Innosilicon IP Shawn Lin
2020-01-14 23:43 ` Rob Herring
2020-01-16 0:03 ` Shawn Lin [this message]
2020-01-14 7:22 ` [PATCH 2/6] phy/rockchip: inno-combophy: Add initial support Shawn Lin
2020-01-14 7:22 ` [PATCH 3/6] PCI: dwc: Skip allocating own MSI domain if using external MSI domain Shawn Lin
2020-01-14 7:22 ` [PATCH 4/6] dt-bindings: rockchip: Add DesignWare based PCIe controller Shawn Lin
2020-01-15 0:05 ` Rob Herring
2020-01-14 7:25 ` [PATCH 5/6] PCI: rockchip: add " Shawn Lin
2020-01-15 17:24 ` Bjorn Helgaas
2020-01-16 0:14 ` Shawn Lin
2020-01-16 21:36 ` Jingoo Han
2020-01-18 16:36 ` Francesco Lavra
2020-01-20 0:55 ` Shawn Lin
2020-01-14 7:25 ` [PATCH 6/6] MAINTAINERS: Update PCIe drivers for Rockchip Shawn Lin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=75a1b9d2-6dff-eaad-dab5-87321a7ca9cd@rock-chips.com \
--to=shawn.lin@rock-chips.com \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=heiko@sntech.de \
--cc=jingoohan1@gmail.com \
--cc=kishon@ti.com \
--cc=linux-pci@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=robh@kernel.org \
--cc=william.wu@rock-chips.com \
--cc=xxm@rock-chips.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).