[PATCH v3 0/5] Add R8A77980 PCIe support & some driver cleanups

[PATCH v3 0/5] Add R8A77980 PCIe support & some driver cleanups

[Sergei Shtylyov]

Hello!

Here's a set of 5 patches against the 'pci/rcar' branch of Lorenzo Pieralisi's
'pci.git' repo. These are the changes needed for better R-Car gen3 support
(namely for R8A77980 support) plus some PCIe driver re-factoring done in
the process...

[1/5] pcie-rcar: poll PHYRDY in rcar_pcie_hw_init()
[2/5] pcie-rcar: remove PHYRDY polling from rcar_pcie_hw_init_h1()
[3/5] pcie-rcar: add R-Car gen3 PHY support
[4/5] pcie-rcar: factor out rcar_pcie_hw_init() call
[5/5] DT: pci: rcar-pci: document R8A77980 bindings

MBR, Sergei

[PATCH v3 1/5] pcie-rcar: poll PHYRDY in rcar_pcie_hw_init()

[Sergei Shtylyov]

In  all the R-Car gen1/2/3 manuals, we are instructed to poll PCIEPHYSR
for PHYRDY=1  at  an early stage of the PCIEC initialization -- while
the driver only does this on R-Car H1 (polling a PHY specific register).
Add the PHYRDY polling to rcar_pcie_hw_init(). Note that without the
special PHY driver on the R-Car V3H (R8A77980) the PCIEC initialization
just freezes the kernel -- adding the PHYRDY polling allows the init code
to exit gracefully on timeout (PHY starts powered down after reset on this
SoC).

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

---
Changes in version 3:
- used the BIT() macro in #define PHYRDY;
- added the SoC model # to the patch description;
- added Rob's and Simon's tags;
- refreshed atop of Marek's patch.

 drivers/pci/host/pcie-rcar.c |   20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

Index: pci/drivers/pci/host/pcie-rcar.c
===================================================================
--- pci.orig/drivers/pci/host/pcie-rcar.c
+++ pci/drivers/pci/host/pcie-rcar.c
@@ -37,6 +37,8 @@
 #define PCIECDR			0x000020
 #define PCIEMSR			0x000028
 #define PCIEINTXR		0x000400
+#define PCIEPHYSR		0x0007f0
+#define  PHYRDY			BIT(0)
 #define PCIEMSITXR		0x000840
 
 /* Transfer control */
@@ -527,6 +529,20 @@ static void phy_write_reg(struct rcar_pc
 	phy_wait_for_ack(pcie);
 }
 
+static int rcar_pcie_wait_for_phyrdy(struct rcar_pcie *pcie)
+{
+	unsigned int timeout = 10;
+
+	while (timeout--) {
+		if (rcar_pci_read_reg(pcie, PCIEPHYSR) & PHYRDY)
+			return 0;
+
+		msleep(5);
+	}
+
+	return -ETIMEDOUT;
+}
+
 static int rcar_pcie_wait_for_dl(struct rcar_pcie *pcie)
 {
 	unsigned int timeout = 10;
@@ -551,6 +567,10 @@ static int rcar_pcie_hw_init(struct rcar
 	/* Set mode */
 	rcar_pci_write_reg(pcie, 1, PCIEMSR);
 
+	err = rcar_pcie_wait_for_phyrdy(pcie);
+	if (err)
+		return err;
+
 	/*
 	 * Initial header for port config space is type 1, set the device
 	 * class to match. Hardware takes care of propagating the IDSETR

[PATCH v3 2/5] pcie-rcar: remove PHYRDY polling from rcar_pcie_hw_init_h1()

[Sergei Shtylyov]

Now that we've added PCIEPHYSR.PHYRDY polling to rcar_pcie_hw_init(),
there is no need anymore  for polling the PHY specific register in
rcar_pcie_hw_init_h1() -- remove it.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

---
Changes in version 3:
- added Simon's tag;
- refreshed atop of Marek's patch.

 drivers/pci/host/pcie-rcar.c |   12 +-----------
 1 file changed, 1 insertion(+), 11 deletions(-)

Index: pci/drivers/pci/host/pcie-rcar.c
===================================================================
--- pci.orig/drivers/pci/host/pcie-rcar.c
+++ pci/drivers/pci/host/pcie-rcar.c
@@ -103,7 +103,6 @@
 #define  LANE_POS		8
 #define  ADR_POS		0
 #define H1_PCIEPHYDOUTR		0x040014
-#define H1_PCIEPHYSR		0x040018
 
 /* R-Car Gen2 PHY */
 #define GEN2_PCIEPHYADDR	0x780
@@ -627,8 +626,6 @@ static int rcar_pcie_hw_init(struct rcar
 
 static int rcar_pcie_hw_init_h1(struct rcar_pcie *pcie)
 {
-	unsigned int timeout = 10;
-
 	/* Initialize the phy */
 	phy_write_reg(pcie, 0, 0x42, 0x1, 0x0EC34191);
 	phy_write_reg(pcie, 1, 0x42, 0x1, 0x0EC34180);
@@ -647,14 +644,7 @@ static int rcar_pcie_hw_init_h1(struct r
 	phy_write_reg(pcie, 0, 0x64, 0x1, 0x3F0F1F0F);
 	phy_write_reg(pcie, 0, 0x66, 0x1, 0x00008000);
 
-	while (timeout--) {
-		if (rcar_pci_read_reg(pcie, H1_PCIEPHYSR))
-			return rcar_pcie_hw_init(pcie);
-
-		msleep(5);
-	}
-
-	return -ETIMEDOUT;
+	return rcar_pcie_hw_init(pcie);
 }
 
 static int rcar_pcie_hw_init_gen2(struct rcar_pcie *pcie)

[PATCH v3 3/5] pcie-rcar: add R-Car gen3 PHY support

[Sergei Shtylyov]

On R-Car gen3 SoCs the PCIe PHY has its own register region -- and I have
written a generic PHY driver for it, thus we need to add the corresponding
code in rcar_pcie_hw_init_gen3() and call devm_phy_optional_get() at the
driver's probing time, so that the existing R-Car gen3 device trees (not
having a PHY node) would still work (we only need to power up the PHY on
R-Car V3H).

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

---
Changes in version 3:
- removed double spaces in the patch description;
- added Simon's tag;
- refreshed atop of the recent driver/bindings patches.

Changes in version 2:
- updated the bindings.

 Documentation/devicetree/bindings/pci/rcar-pci.txt |    5 +++
 drivers/pci/host/pcie-rcar.c                       |   27 +++++++++++++++++++--
 2 files changed, 30 insertions(+), 2 deletions(-)

Index: pci/Documentation/devicetree/bindings/pci/rcar-pci.txt
===================================================================
--- pci.orig/Documentation/devicetree/bindings/pci/rcar-pci.txt
+++ pci/Documentation/devicetree/bindings/pci/rcar-pci.txt
@@ -32,6 +32,11 @@ compatible: "renesas,pcie-r8a7743" for t
 	and PCIe bus clocks.
 - clock-names: from common clock binding: should be "pcie" and "pcie_bus".
 
+Optional properties:
+- phys: from common PHY binding: PHY phandle and specifier (only make sense
+	for R-Car gen3 SoCs where the PCIe PHYs have their own register blocks).
+- phy-names: from common PHY binding: should be "pcie".
+
 Example:
 
 SoC-specific DT Entry:
Index: pci/drivers/pci/host/pcie-rcar.c
===================================================================
--- pci.orig/drivers/pci/host/pcie-rcar.c
+++ pci/drivers/pci/host/pcie-rcar.c
@@ -25,6 +25,7 @@
 #include <linux/of_pci.h>
 #include <linux/of_platform.h>
 #include <linux/pci.h>
+#include <linux/phy/phy.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
 #include <linux/slab.h>
@@ -141,6 +142,7 @@ static inline struct rcar_msi *to_rcar_m
 /* Structure representing the PCIe interface */
 struct rcar_pcie {
 	struct device		*dev;
+	struct phy		*phy;
 	void __iomem		*base;
 	struct list_head	resources;
 	int			root_bus_nr;
@@ -667,6 +669,21 @@ static int rcar_pcie_hw_init_gen2(struct
 	return rcar_pcie_hw_init(pcie);
 }
 
+static int rcar_pcie_hw_init_gen3(struct rcar_pcie *pcie)
+{
+	int err;
+
+	err = phy_init(pcie->phy);
+	if (err)
+		return err;
+
+	err = phy_power_on(pcie->phy);
+	if (err)
+		return err;
+
+	return rcar_pcie_hw_init(pcie);
+}
+
 static int rcar_msi_alloc(struct rcar_msi *chip)
 {
 	int msi;
@@ -916,6 +933,10 @@ static int rcar_pcie_get_resources(struc
 	struct resource res;
 	int err, i;
 
+	pcie->phy = devm_phy_optional_get(dev, "pcie");
+	if (IS_ERR(pcie->phy))
+		return PTR_ERR(pcie->phy);
+
 	err = of_address_to_resource(dev->of_node, 0, &res);
 	if (err)
 		return err;
@@ -1056,8 +1077,10 @@ static const struct of_device_id rcar_pc
 	  .data = rcar_pcie_hw_init_gen2 },
 	{ .compatible = "renesas,pcie-rcar-gen2",
 	  .data = rcar_pcie_hw_init_gen2 },
-	{ .compatible = "renesas,pcie-r8a7795", .data = rcar_pcie_hw_init },
-	{ .compatible = "renesas,pcie-rcar-gen3", .data = rcar_pcie_hw_init },
+	{ .compatible = "renesas,pcie-r8a7795",
+	  .data = rcar_pcie_hw_init_gen3 },
+	{ .compatible = "renesas,pcie-rcar-gen3",
+	  .data = rcar_pcie_hw_init_gen3 },
 	{},
 };
 

Re: [PATCH v3 3/5] pcie-rcar: add R-Car gen3 PHY support

[Sergei Shtylyov]

On 05/03/2018 10:40 PM, Sergei Shtylyov wrote:

> On R-Car gen3 SoCs the PCIe PHY has its own register region -- and I have
> written a generic PHY driver for it, thus we need to add the corresponding
> code in rcar_pcie_hw_init_gen3() and call devm_phy_optional_get() at the
> driver's probing time, so that the existing R-Car gen3 device trees (not
> having a PHY node) would still work (we only need to power up the PHY on
> R-Car V3H).
> 
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

   Oops, forgot to add Rob's tag:

Reviewed-by: Rob Herring <robh@kernel.org>

MBR, Sergei

[PATCH v3 4/5] pcie-rcar: factor out rcar_pcie_hw_init() call

[Sergei Shtylyov]

We now have rcar_pcie_hw_init_{h1|gen2|gen3}() differing only in the PCIe
PHY init code and all ending with a call to rcar_pcie_hw_init(), thus it
makes  sense to move that call into the driver's probe() method and then
rename those functions to rcar_pcie_phy_init_{h1|gen2|gen3}() -- doing
this saves 48 bytes of object code (AArch64 gcc 4.8.5)...

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

---
Changes in version 3:
- added Simon's tag;
- refreshed atop of the recent driver patches.

 drivers/pci/host/pcie-rcar.c |   42 ++++++++++++++++++++++--------------------
 1 file changed, 22 insertions(+), 20 deletions(-)

Index: pci/drivers/pci/host/pcie-rcar.c
===================================================================
--- pci.orig/drivers/pci/host/pcie-rcar.c
+++ pci/drivers/pci/host/pcie-rcar.c
@@ -626,7 +626,7 @@ static int rcar_pcie_hw_init(struct rcar
 	return 0;
 }
 
-static int rcar_pcie_hw_init_h1(struct rcar_pcie *pcie)
+static int rcar_pcie_phy_init_h1(struct rcar_pcie *pcie)
 {
 	/* Initialize the phy */
 	phy_write_reg(pcie, 0, 0x42, 0x1, 0x0EC34191);
@@ -646,10 +646,10 @@ static int rcar_pcie_hw_init_h1(struct r
 	phy_write_reg(pcie, 0, 0x64, 0x1, 0x3F0F1F0F);
 	phy_write_reg(pcie, 0, 0x66, 0x1, 0x00008000);
 
-	return rcar_pcie_hw_init(pcie);
+	return 0;
 }
 
-static int rcar_pcie_hw_init_gen2(struct rcar_pcie *pcie)
+static int rcar_pcie_phy_init_gen2(struct rcar_pcie *pcie)
 {
 	/*
 	 * These settings come from the R-Car Series, 2nd Generation User's
@@ -666,10 +666,10 @@ static int rcar_pcie_hw_init_gen2(struct
 	rcar_pci_write_reg(pcie, 0x00000001, GEN2_PCIEPHYCTRL);
 	rcar_pci_write_reg(pcie, 0x00000006, GEN2_PCIEPHYCTRL);
 
-	return rcar_pcie_hw_init(pcie);
+	return 0;
 }
 
-static int rcar_pcie_hw_init_gen3(struct rcar_pcie *pcie)
+static int rcar_pcie_phy_init_gen3(struct rcar_pcie *pcie)
 {
 	int err;
 
@@ -677,11 +677,7 @@ static int rcar_pcie_hw_init_gen3(struct
 	if (err)
 		return err;
 
-	err = phy_power_on(pcie->phy);
-	if (err)
-		return err;
-
-	return rcar_pcie_hw_init(pcie);
+	return phy_power_on(pcie->phy);
 }
 
 static int rcar_msi_alloc(struct rcar_msi *chip)
@@ -1070,17 +1066,18 @@ static int rcar_pcie_parse_map_dma_range
 }
 
 static const struct of_device_id rcar_pcie_of_match[] = {
-	{ .compatible = "renesas,pcie-r8a7779", .data = rcar_pcie_hw_init_h1 },
+	{ .compatible = "renesas,pcie-r8a7779",
+	  .data = rcar_pcie_phy_init_h1 },
 	{ .compatible = "renesas,pcie-r8a7790",
-	  .data = rcar_pcie_hw_init_gen2 },
+	  .data = rcar_pcie_phy_init_gen2 },
 	{ .compatible = "renesas,pcie-r8a7791",
-	  .data = rcar_pcie_hw_init_gen2 },
+	  .data = rcar_pcie_phy_init_gen2 },
 	{ .compatible = "renesas,pcie-rcar-gen2",
-	  .data = rcar_pcie_hw_init_gen2 },
+	  .data = rcar_pcie_phy_init_gen2 },
 	{ .compatible = "renesas,pcie-r8a7795",
-	  .data = rcar_pcie_hw_init_gen3 },
+	  .data = rcar_pcie_phy_init_gen3 },
 	{ .compatible = "renesas,pcie-rcar-gen3",
-	  .data = rcar_pcie_hw_init_gen3 },
+	  .data = rcar_pcie_phy_init_gen3 },
 	{},
 };
 
@@ -1128,7 +1125,7 @@ static int rcar_pcie_probe(struct platfo
 	struct rcar_pcie *pcie;
 	unsigned int data;
 	int err;
-	int (*hw_init_fn)(struct rcar_pcie *);
+	int (*phy_init_fn)(struct rcar_pcie *);
 	struct pci_host_bridge *bridge;
 
 	bridge = pci_alloc_host_bridge(sizeof(*pcie));
@@ -1162,10 +1159,15 @@ static int rcar_pcie_probe(struct platfo
 	if (err)
 		goto err_pm_put;
 
-	/* Failure to get a link might just be that no cards are inserted */
-	hw_init_fn = of_device_get_match_data(dev);
-	err = hw_init_fn(pcie);
+	phy_init_fn = of_device_get_match_data(dev);
+	err = phy_init_fn(pcie);
 	if (err) {
+		dev_err(dev, "failed to init PCIe PHY\n");
+		goto err_pm_put;
+	}
+
+	/* Failure to get a link might just be that no cards are inserted */
+	if (rcar_pcie_hw_init(pcie)) {
 		dev_info(dev, "PCIe link down\n");
 		err = -ENODEV;
 		goto err_pm_put;

[PATCH v3 5/5] DT: pci: rcar-pci: document R8A77980 bindings

[Sergei Shtylyov]

Document the R-Car V3H (R8A77980) SoC in the R-Car PCIe bindings.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
Changes in version 2:
- new patch.

 Documentation/devicetree/bindings/pci/rcar-pci.txt |    1 +
 1 file changed, 1 insertion(+)

Index: pci/Documentation/devicetree/bindings/pci/rcar-pci.txt
===================================================================
--- pci.orig/Documentation/devicetree/bindings/pci/rcar-pci.txt
+++ pci/Documentation/devicetree/bindings/pci/rcar-pci.txt
@@ -8,6 +8,7 @@ compatible: "renesas,pcie-r8a7743" for t
 	    "renesas,pcie-r8a7793" for the R8A7793 SoC;
 	    "renesas,pcie-r8a7795" for the R8A7795 SoC;
 	    "renesas,pcie-r8a7796" for the R8A7796 SoC;
+	    "renesas,pcie-r8a77980" for the R8A77980 SoC;
 	    "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 or
 				     RZ/G1 compatible device.
 	    "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 compatible device.

Re: [PATCH v3 5/5] DT: pci: rcar-pci: document R8A77980 bindings

[Sergei Shtylyov]

On 05/03/2018 10:44 PM, Sergei Shtylyov wrote:
> Document the R-Car V3H (R8A77980) SoC in the R-Car PCIe bindings.
> 
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

   Oops, forgot to add Simon's and Rob's tags:

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Rob Herring <robh@kernel.org>

MBR, Sergei

Re: [PATCH v3 0/5] Add R8A77980 PCIe support & some driver cleanups

[Lorenzo Pieralisi]

On Thu, May 03, 2018 at 10:32:41PM +0300, Sergei Shtylyov wrote:
> Hello!
> 
> Here's a set of 5 patches against the 'pci/rcar' branch of Lorenzo Pieralisi's
> 'pci.git' repo. These are the changes needed for better R-Car gen3 support
> (namely for R8A77980 support) plus some PCIe driver re-factoring done in
> the process...
> 
> [1/5] pcie-rcar: poll PHYRDY in rcar_pcie_hw_init()
> [2/5] pcie-rcar: remove PHYRDY polling from rcar_pcie_hw_init_h1()
> [3/5] pcie-rcar: add R-Car gen3 PHY support
> [4/5] pcie-rcar: factor out rcar_pcie_hw_init() call
> [5/5] DT: pci: rcar-pci: document R8A77980 bindings

I applied the series, with some commit log changes, I can comment
on those please have a look at my updated pci/rcar branch.

Thanks,
Lorenzo

Re: [PATCH v3 0/5] Add R8A77980 PCIe support & some driver cleanups

[Simon Horman]

On Fri, May 04, 2018 at 02:22:59PM +0100, Lorenzo Pieralisi wrote:
> On Thu, May 03, 2018 at 10:32:41PM +0300, Sergei Shtylyov wrote:
> > Hello!
> > 
> > Here's a set of 5 patches against the 'pci/rcar' branch of Lorenzo Pieralisi's
> > 'pci.git' repo. These are the changes needed for better R-Car gen3 support
> > (namely for R8A77980 support) plus some PCIe driver re-factoring done in
> > the process...
> > 
> > [1/5] pcie-rcar: poll PHYRDY in rcar_pcie_hw_init()
> > [2/5] pcie-rcar: remove PHYRDY polling from rcar_pcie_hw_init_h1()
> > [3/5] pcie-rcar: add R-Car gen3 PHY support
> > [4/5] pcie-rcar: factor out rcar_pcie_hw_init() call
> > [5/5] DT: pci: rcar-pci: document R8A77980 bindings
> 
> I applied the series, with some commit log changes, I can comment
> on those please have a look at my updated pci/rcar branch.
> 
> Thanks,
> Lorenzo

Thanks, much appreciated.