From: Stanimir Varbanov <svarbanov@mm-sol.com>
To: Rob Herring <robh@kernel.org>, ansuelsmth@gmail.com
Cc: 'Bjorn Andersson' <bjorn.andersson@linaro.org>,
'Andy Gross' <agross@kernel.org>,
'Bjorn Helgaas' <bhelgaas@google.com>,
'Mark Rutland' <mark.rutland@arm.com>,
'Lorenzo Pieralisi' <lorenzo.pieralisi@arm.com>,
'Andrew Murray' <amurray@thegoodpenguin.co.uk>,
'Philipp Zabel' <p.zabel@pengutronix.de>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: R: [PATCH v3 08/11] devicetree: bindings: pci: document PARF params bindings
Date: Wed, 13 May 2020 14:43:20 +0300 [thread overview]
Message-ID: <99f42001-0f41-5e63-f6ad-2e744ec86d36@mm-sol.com> (raw)
In-Reply-To: <20200512154544.GA823@bogus>
On 5/12/20 6:45 PM, Rob Herring wrote:
> On Thu, May 07, 2020 at 09:34:35PM +0200, ansuelsmth@gmail.com wrote:
>>> On Fri, May 01, 2020 at 12:06:15AM +0200, Ansuel Smith wrote:
>>>> It is now supported the editing of Tx De-Emphasis, Tx Swing and
>>>> Rx equalization params on ipq8064. Document this new optional params.
>>>>
>>>> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
>>>> ---
>>>> .../devicetree/bindings/pci/qcom,pcie.txt | 36 +++++++++++++++++++
>>>> 1 file changed, 36 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt
>>> b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
>>>> index 6efcef040741..8cc5aea8a1da 100644
>>>> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt
>>>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
>>>> @@ -254,6 +254,42 @@
>>>> - "perst-gpios" PCIe endpoint reset signal line
>>>> - "wake-gpios" PCIe endpoint wake signal line
>>>>
>>>> +- qcom,tx-deemph-gen1:
>>>> + Usage: optional (available for ipq/apq8064)
>>>> + Value type: <u32>
>>>> + Definition: Gen1 De-emphasis value.
>>>> + For ipq806x should be set to 24.
>>>
>>> Unless these need to be tuned per board, then the compatible string for
>>> ipq806x should imply all these settings.
>>>
>>
>> It was requested by v2 to make this settings tunable. These don't change are
>> all the same for every ipq806x SoC. The original implementation had this
>> value hardcoded for ipq806x. Should I restore this and drop this patch?
>
> Yes, please.
I still think that the values for tx deemph and tx swing should be
tunable. But I can live with them in the driver if they not break
support for apq8064.
The default values in the registers for apq8064 and ipq806x are:
default your change
TX_DEEMPH_GEN1 21 24
TX_DEEMPH_GEN2_3_5DB 21 24
TX_DEEMPH_GEN2_6DB 32 34
TX_SWING_FULL 121 120
TX_SWING_LOW 121 120
So until now (without your change) apq8064 worked with default values.
>
> Rob
>
--
regards,
Stan
next prev parent reply other threads:[~2020-05-13 11:43 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-30 22:06 [PATCH v3 00/11] Multiple fixes in PCIe qcom driver Ansuel Smith
2020-04-30 22:06 ` [PATCH v3 01/11] PCI: qcom: add missing ipq806x clocks in PCIe driver Ansuel Smith
2020-05-07 17:54 ` Rob Herring
2020-05-08 11:51 ` Stanimir Varbanov
2020-04-30 22:06 ` [PATCH v3 02/11] devicetree: bindings: pci: add missing clks to qcom,pcie Ansuel Smith
2020-04-30 22:06 ` [PATCH v3 03/11] PCI: qcom: change duplicate PCI reset to phy reset Ansuel Smith
2020-05-07 17:57 ` Rob Herring
2020-04-30 22:06 ` [PATCH v3 04/11] PCI: qcom: add missing reset for ipq806x Ansuel Smith
2020-05-07 18:00 ` Rob Herring
2020-05-08 7:20 ` Philipp Zabel
2020-04-30 22:06 ` [PATCH v3 05/11] devicetree: bindings: pci: add ext reset to qcom,pcie Ansuel Smith
2020-04-30 22:06 ` [PATCH v3 06/11] PCI: qcom: introduce qcom_clear_and_set_dword Ansuel Smith
2020-05-07 18:07 ` Rob Herring
2020-04-30 22:06 ` [PATCH v3 07/11] PCI: qcom: add support for defining some PARF params Ansuel Smith
2020-04-30 22:06 ` [PATCH v3 08/11] devicetree: bindings: pci: document PARF params bindings Ansuel Smith
2020-05-07 18:10 ` Rob Herring
2020-05-07 19:34 ` R: " ansuelsmth
2020-05-12 15:45 ` Rob Herring
2020-05-13 11:43 ` Stanimir Varbanov [this message]
2020-05-13 12:56 ` R: " ansuelsmth
2020-05-20 10:01 ` Stanimir Varbanov
2020-04-30 22:06 ` [PATCH v3 09/11] PCI: qcom: add ipq8064 rev2 variant and set tx term offset Ansuel Smith
2020-05-07 18:13 ` Rob Herring
2020-05-08 22:00 ` R: " ansuelsmth
2020-05-13 11:37 ` Stanimir Varbanov
2020-05-13 12:54 ` R: " ansuelsmth
2020-05-13 13:49 ` Stanimir Varbanov
2020-04-30 22:06 ` [PATCH v3 10/11] devicetree: bindings: pci: add ipq8064 rev 2 variant to qcom,pcie Ansuel Smith
2020-05-07 18:14 ` Rob Herring
2020-04-30 22:06 ` [PATCH v3 11/11] PCI: qcom: add Force GEN1 support Ansuel Smith
2020-05-01 17:07 ` [PATCH v3 00/11] Multiple fixes in PCIe qcom driver Bjorn Helgaas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=99f42001-0f41-5e63-f6ad-2e744ec86d36@mm-sol.com \
--to=svarbanov@mm-sol.com \
--cc=agross@kernel.org \
--cc=amurray@thegoodpenguin.co.uk \
--cc=ansuelsmth@gmail.com \
--cc=bhelgaas@google.com \
--cc=bjorn.andersson@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=mark.rutland@arm.com \
--cc=p.zabel@pengutronix.de \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).