* [PATCH 1/2] arm64: dts: Add PCIe endpoint mode DT node for ls1012a
@ 2021-10-19 11:17 Zhiqiang Hou
2021-10-19 11:17 ` [PATCH 2/2] misc: pci_endpoint_test: Add Device ID for NXP LS1012A Zhiqiang Hou
2021-10-19 22:30 ` [PATCH 1/2] arm64: dts: Add PCIe endpoint mode DT node for ls1012a Leo Li
0 siblings, 2 replies; 4+ messages in thread
From: Zhiqiang Hou @ 2021-10-19 11:17 UTC (permalink / raw)
To: linux-pci, devicetree, linux-arm-kernel, shawnguo, robh+dt,
leoyang.li, lorenzo.pieralisi, kishon
Cc: Hou Zhiqiang
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add PCIe endpoint mode DT node for ls1012a and reuse the
compatible string of ls1046a.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
index 50a72cda4727..82bf2fe6f8bd 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -545,6 +545,16 @@
status = "disabled";
};
+ pcie_ep1: pcie-ep@3400000 {
+ compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep";
+ reg = <0x00 0x03400000 0x0 0x00100000>,
+ <0x40 0x00000000 0x8 0x00000000>;
+ reg-names = "regs", "addr_space";
+ num-ib-windows = <2>;
+ num-ob-windows = <2>;
+ status = "disabled";
+ };
+
rcpm: power-controller@1ee2140 {
compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1+";
reg = <0x0 0x1ee2140 0x0 0x4>;
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] misc: pci_endpoint_test: Add Device ID for NXP LS1012A
2021-10-19 11:17 [PATCH 1/2] arm64: dts: Add PCIe endpoint mode DT node for ls1012a Zhiqiang Hou
@ 2021-10-19 11:17 ` Zhiqiang Hou
2021-10-19 22:30 ` [PATCH 1/2] arm64: dts: Add PCIe endpoint mode DT node for ls1012a Leo Li
1 sibling, 0 replies; 4+ messages in thread
From: Zhiqiang Hou @ 2021-10-19 11:17 UTC (permalink / raw)
To: linux-pci, devicetree, linux-arm-kernel, shawnguo, robh+dt,
leoyang.li, lorenzo.pieralisi, kishon
Cc: Hou Zhiqiang
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add the Device ID for LS1012A so that the pci-epf-test driver
can be used for the tests on LS1012A.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
drivers/misc/pci_endpoint_test.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c
index 2ed7e3aaff3a..b84d5b15aec8 100644
--- a/drivers/misc/pci_endpoint_test.c
+++ b/drivers/misc/pci_endpoint_test.c
@@ -71,6 +71,7 @@
#define PCI_DEVICE_ID_TI_AM654 0xb00c
#define PCI_DEVICE_ID_TI_J7200 0xb00f
#define PCI_DEVICE_ID_TI_AM64 0xb010
+#define PCI_DEVICE_ID_LS1012A 0x8100
#define PCI_DEVICE_ID_LS1088A 0x80c0
#define is_am654_pci_dev(pdev) \
@@ -955,6 +956,9 @@ static const struct pci_device_id pci_endpoint_test_tbl[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA72x),
.driver_data = (kernel_ulong_t)&default_data,
},
+ { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_LS1012A),
+ .driver_data = (kernel_ulong_t)&default_data,
+ },
{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0),
.driver_data = (kernel_ulong_t)&default_data,
},
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* RE: [PATCH 1/2] arm64: dts: Add PCIe endpoint mode DT node for ls1012a
2021-10-19 11:17 [PATCH 1/2] arm64: dts: Add PCIe endpoint mode DT node for ls1012a Zhiqiang Hou
2021-10-19 11:17 ` [PATCH 2/2] misc: pci_endpoint_test: Add Device ID for NXP LS1012A Zhiqiang Hou
@ 2021-10-19 22:30 ` Leo Li
2021-10-27 2:46 ` Z.Q. Hou
1 sibling, 1 reply; 4+ messages in thread
From: Leo Li @ 2021-10-19 22:30 UTC (permalink / raw)
To: Z.Q. Hou, linux-pci, devicetree, linux-arm-kernel, shawnguo,
robh+dt, lorenzo.pieralisi, kishon
> -----Original Message-----
> From: Z.Q. Hou <zhiqiang.hou@nxp.com>
> Sent: Tuesday, October 19, 2021 6:18 AM
> To: linux-pci@vger.kernel.org; devicetree@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; shawnguo@kernel.org; robh+dt@kernel.org; Leo
> Li <leoyang.li@nxp.com>; lorenzo.pieralisi@arm.com; kishon@ti.com
> Cc: Z.Q. Hou <zhiqiang.hou@nxp.com>
> Subject: [PATCH 1/2] arm64: dts: Add PCIe endpoint mode DT node for
> ls1012a
>
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> Add PCIe endpoint mode DT node for ls1012a and reuse the compatible
> string of ls1046a.
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> index 50a72cda4727..82bf2fe6f8bd 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> @@ -545,6 +545,16 @@
> status = "disabled";
> };
>
> + pcie_ep1: pcie-ep@3400000 {
> + compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep";
> + reg = <0x00 0x03400000 0x0 0x00100000>,
> + <0x40 0x00000000 0x8 0x00000000>;
> + reg-names = "regs", "addr_space";
> + num-ib-windows = <2>;
> + num-ob-windows = <2>;
It looks like these properties are defined in "snps,dw-pcie-ep.yaml" instead of "layerscape-pci.txt". Shall we add a reference to that in the binding? Or maybe we can just reuse the snps,dw-pcie-ep.yaml binding?
> + status = "disabled";
> + };
> +
> rcpm: power-controller@1ee2140 {
> compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-
> 2.1+";
> reg = <0x0 0x1ee2140 0x0 0x4>;
> --
> 2.17.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [PATCH 1/2] arm64: dts: Add PCIe endpoint mode DT node for ls1012a
2021-10-19 22:30 ` [PATCH 1/2] arm64: dts: Add PCIe endpoint mode DT node for ls1012a Leo Li
@ 2021-10-27 2:46 ` Z.Q. Hou
0 siblings, 0 replies; 4+ messages in thread
From: Z.Q. Hou @ 2021-10-27 2:46 UTC (permalink / raw)
To: Leo Li, linux-pci, devicetree, linux-arm-kernel, shawnguo,
robh+dt, lorenzo.pieralisi, kishon
Hi Leo,
> -----Original Message-----
> From: Leo Li <leoyang.li@nxp.com>
> Sent: 2021年10月20日 6:31
> To: Z.Q. Hou <zhiqiang.hou@nxp.com>; linux-pci@vger.kernel.org;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> shawnguo@kernel.org; robh+dt@kernel.org; lorenzo.pieralisi@arm.com;
> kishon@ti.com
> Subject: RE: [PATCH 1/2] arm64: dts: Add PCIe endpoint mode DT node for
> ls1012a
>
>
>
> > -----Original Message-----
> > From: Z.Q. Hou <zhiqiang.hou@nxp.com>
> > Sent: Tuesday, October 19, 2021 6:18 AM
> > To: linux-pci@vger.kernel.org; devicetree@vger.kernel.org; linux-arm-
> > kernel@lists.infradead.org; shawnguo@kernel.org; robh+dt@kernel.org;
> > Leo Li <leoyang.li@nxp.com>; lorenzo.pieralisi@arm.com; kishon@ti.com
> > Cc: Z.Q. Hou <zhiqiang.hou@nxp.com>
> > Subject: [PATCH 1/2] arm64: dts: Add PCIe endpoint mode DT node for
> > ls1012a
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > Add PCIe endpoint mode DT node for ls1012a and reuse the compatible
> > string of ls1046a.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 10 ++++++++++
> > 1 file changed, 10 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> > b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> > index 50a72cda4727..82bf2fe6f8bd 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> > @@ -545,6 +545,16 @@
> > status = "disabled";
> > };
> >
> > + pcie_ep1: pcie-ep@3400000 {
> > + compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep";
> > + reg = <0x00 0x03400000 0x0 0x00100000>,
> > + <0x40 0x00000000 0x8 0x00000000>;
> > + reg-names = "regs", "addr_space";
> > + num-ib-windows = <2>;
> > + num-ob-windows = <2>;
>
> It looks like these properties are defined in "snps,dw-pcie-ep.yaml" instead
> of "layerscape-pci.txt". Shall we add a reference to that in the binding?
> Or maybe we can just reuse the snps,dw-pcie-ep.yaml binding?
Yes, reuse is a good idea, and I'll convert the binding file to the fashion DT schema and split it for RC and EP mode.
Thanks,
Zhiqiang
>
> > + status = "disabled";
> > + };
> > +
> > rcpm: power-controller@1ee2140 {
> > compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm- 2.1+";
> > reg = <0x0 0x1ee2140 0x0 0x4>;
> > --
> > 2.17.1
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2021-10-27 2:47 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2021-10-19 11:17 [PATCH 1/2] arm64: dts: Add PCIe endpoint mode DT node for ls1012a Zhiqiang Hou
2021-10-19 11:17 ` [PATCH 2/2] misc: pci_endpoint_test: Add Device ID for NXP LS1012A Zhiqiang Hou
2021-10-19 22:30 ` [PATCH 1/2] arm64: dts: Add PCIe endpoint mode DT node for ls1012a Leo Li
2021-10-27 2:46 ` Z.Q. Hou
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