From: Rob Herring <robh+dt@kernel.org>
To: Vidya Sagar <vidyas@nvidia.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Thierry Reding <thierry.reding@gmail.com>,
Jon Hunter <jonathanh@nvidia.com>,
amanharitsh123@gmail.com, dinghao.liu@zju.edu.cn,
Krzysztof Wilczynski <kw@linux.com>,
PCI <linux-pci@vger.kernel.org>,
linux-tegra <linux-tegra@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
kthota@nvidia.com, Manikanta Maddireddy <mmaddireddy@nvidia.com>,
sagar.tv@gmail.com
Subject: Re: [PATCH 2/4] PCI: tegra: Map configuration space as strongly ordered
Date: Mon, 26 Oct 2020 13:41:43 -0500 [thread overview]
Message-ID: <CAL_JsqJdwF26_2Fpz5=jGeLCGkySpdC0ZCJGaMvHFoGwJ898aQ@mail.gmail.com> (raw)
In-Reply-To: <20201026065459.28509-3-vidyas@nvidia.com>
On Mon, Oct 26, 2020 at 1:55 AM Vidya Sagar <vidyas@nvidia.com> wrote:
>
> As specified in the comment for pci_remap_cfgspace() define in
> arch/arm64/include/asm/io.h file, PCIe configuration space should be
> mapped as strongly ordered. Hence changing to dev_pci_remap_cfgspace()
Strictly speaking, strongly ordered is ARMv6/7 terminology. For v8,
it's 'nGnRnE' which is what the comment says.
> from devm_ioremap_resource() for mapping DBI space as that is nothing
> but the root port's own configuration space.
>
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
> drivers/pci/controller/dwc/pcie-tegra194.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index b172b1d49713..7a0c64436861 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -2108,7 +2108,9 @@ static int tegra_pcie_dw_probe(struct platform_device *pdev)
> }
> pcie->dbi_res = dbi_res;
>
> - pci->dbi_base = devm_ioremap_resource(dev, dbi_res);
> + pci->dbi_base = devm_pci_remap_cfgspace(dev,
> + dbi_res->start,
> + resource_size(dbi_res));
This is all going to get removed anyways as I'm working on moving DBI
and other region setup into the DWC core. I guess better to do this
change first and make it explicit.
Rob
next prev parent reply other threads:[~2020-10-26 18:41 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-26 6:54 [PATCH 0/4] Enhancements to Tegra194 PCIe driver Vidya Sagar
2020-10-26 6:54 ` [PATCH 1/4] PCI: tegra: Fix ASPM-L1SS advertisement disable code Vidya Sagar
2020-10-26 6:54 ` [PATCH 2/4] PCI: tegra: Map configuration space as strongly ordered Vidya Sagar
2020-10-26 18:41 ` Rob Herring [this message]
2020-10-26 6:54 ` [PATCH 3/4] PCI: tegra: Set DesignWare IP version Vidya Sagar
2020-10-26 6:54 ` [PATCH 4/4] PCI: tegra: Handle error conditions properly Vidya Sagar
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