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From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Rob Herring <robh@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Liviu Dudau <Liviu.Dudau@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	gregkh <gregkh@linuxfoundation.org>,
	"open list:BROADCOM NVRAM DRIVER" <linux-mips@vger.kernel.org>,
	linux-pci <linux-pci@vger.kernel.org>,
	linux-staging@lists.linux.dev, NeilBrown <neil@brown.name>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 5/6] MIPS: implement architecture dependent 'pci_remap_iospace()'
Date: Sat, 25 Sep 2021 22:16:57 +0200	[thread overview]
Message-ID: <CAMhs-H9aSNF4qP1HUtwNkA9bhMzErN9jXnscNvbiWSY=kyce2Q@mail.gmail.com> (raw)
In-Reply-To: <CAK8P3a0p0YwsiG8NgZGPxGp=GwTLXfEO=D=CY3TtmYwiDSuaXg@mail.gmail.com>

Hi Arnd,

On Sat, Sep 25, 2021 at 9:34 PM Arnd Bergmann <arnd@arndb.de> wrote:
>
> On Sat, Sep 25, 2021 at 8:10 PM Sergio Paracuellos
> <sergio.paracuellos@gmail.com> wrote:
> > > It might be good to check that res->start is zero here, otherwise
> > > the io_port_base would be off. That could happen if you ever have more
> > > than one bridge.
> >
> > Do you mean something like the following?
>
> Yes, exactly.
>
> > int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr)
> > {
> >     unsigned long vaddr;
> >     size_t size;
> >
> >     if (res->start != 0) {
> >          // Should I WARN_ONCE or just show an error/warning message??
> >          WARN_ONCE(1, "resource start must be zero\n");
> >          return -ENODEV;
> >    }
>
> I don't care if it's WARN(), WARN_ONCE() or pr_warn(). If we ever see the
> message, the system is not working and the person who caused the problem
> will figure it out.

Pretty clear, thanks. I will collect you Acked-by's and make this
change and send v3.

Best regards,
    Sergio Paracuellos
>
>         Arnd

  reply	other threads:[~2021-09-25 20:17 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-24 21:11 [PATCH 0/6] MIPS: ralink: fix PCI IO resources Sergio Paracuellos
2021-09-24 21:11 ` [PATCH 1/6] Revert "MIPS: ralink: don't define PC_IOBASE but increase IO_SPACE_LIMIT" Sergio Paracuellos
2021-09-24 21:11 ` [PATCH 2/6] Revert "staging: mt7621-pci: set end limit for 'ioport_resource'" Sergio Paracuellos
2021-09-25 17:33   ` Arnd Bergmann
2021-09-24 21:11 ` [PATCH 3/6] MIPS: ralink: set PCI_IOBASE to 'mips_io_port_base' Sergio Paracuellos
2021-09-25 17:32   ` Arnd Bergmann
2021-09-24 21:11 ` [PATCH 4/6] PCI: allow architecture specific implementation of pci_remap_iospace() Sergio Paracuellos
2021-09-25  2:42   ` Bjorn Helgaas
2021-09-25 17:38   ` Arnd Bergmann
2021-09-24 21:11 ` [PATCH 5/6] MIPS: implement architecture dependent 'pci_remap_iospace()' Sergio Paracuellos
2021-09-25 17:32   ` Arnd Bergmann
2021-09-25 18:08     ` Sergio Paracuellos
2021-09-25 19:34       ` Arnd Bergmann
2021-09-25 20:16         ` Sergio Paracuellos [this message]
2021-09-24 21:11 ` [PATCH 6/6] staging: mt7621-pci: properly adjust base address for the IO window Sergio Paracuellos
2021-09-25 17:33   ` Arnd Bergmann

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