linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Richard Zhu <hongxing.zhu@nxp.com>
To: Lucas Stach <l.stach@pengutronix.de>,
	"andrew.smirnov@gmail.com" <andrew.smirnov@gmail.com>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	"kw@linux.com" <kw@linux.com>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"stefan@agner.ch" <stefan@agner.ch>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	dl-linux-imx <linux-imx@nxp.com>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"kernel@pengutronix.de" <kernel@pengutronix.de>
Subject: RE: [EXT] Re: [PATCH v2 3/3] PCI: imx: clear vreg bypass when pcie vph voltage is 3v3
Date: Thu, 25 Mar 2021 02:22:02 +0000	[thread overview]
Message-ID: <VI1PR04MB585360F9041FA67CA6D354FF8C629@VI1PR04MB5853.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <6d31825ab3c47bb2e3440445b1dad3f4f1c53c44.camel@pengutronix.de>


> -----Original Message-----
> From: Lucas Stach <l.stach@pengutronix.de>
> Sent: Wednesday, March 24, 2021 5:30 PM
> To: Richard Zhu <hongxing.zhu@nxp.com>; andrew.smirnov@gmail.com;
> shawnguo@kernel.org; kw@linux.com; bhelgaas@google.com;
> stefan@agner.ch; lorenzo.pieralisi@arm.com
> Cc: linux-pci@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> kernel@pengutronix.de
> Subject: Re: [PATCH v2 3/3] PCI: imx: clear vreg bypass when pcie vph
> voltage is 3v3
> Am Mittwoch, dem 24.03.2021 um 13:34 +0800 schrieb Richard Zhu:
> > Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
> > In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
> > sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
> > the VREG_BYPASS bits of GPR registers should be cleared from default
> > value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be
> > turned on.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > ---
> >  drivers/pci/controller/dwc/pci-imx6.c | 23 +++++++++++++++++++++++
> >  1 file changed, 23 insertions(+)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-imx6.c
> > b/drivers/pci/controller/dwc/pci-imx6.c
> > index 853ea8e82952..beca085a9300 100644
> > --- a/drivers/pci/controller/dwc/pci-imx6.c
> > +++ b/drivers/pci/controller/dwc/pci-imx6.c
> > @@ -37,6 +37,7 @@
> >  #define IMX8MQ_GPR_PCIE_REF_USE_PAD          BIT(9)
> >  #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN  BIT(10)
> >  #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE     BIT(11)
> > +#define IMX8MQ_GPR_PCIE_VREG_BYPASS          BIT(12)
> >  #define IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE  GENMASK(11, 8)
> >  #define IMX8MQ_PCIE2_BASE_ADDR
> 0x33c00000
> >
> >
> >
> >
> > @@ -80,6 +81,7 @@ struct imx6_pcie {
> >       u32                     tx_swing_full;
> >       u32                     tx_swing_low;
> >       struct regulator        *vpcie;
> > +     struct regulator        *vph;
> >       void __iomem            *phy_base;
> >
> >
> >
> >
> >       /* power domain for pcie */
> > @@ -611,6 +613,8 @@ static void imx6_pcie_configure_type(struct
> > imx6_pcie *imx6_pcie)
> >
> >
> >
> >
> >  static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)  {
> > +     int phy_uv;
> > +
> No need for this variable...
[Richard Zhu] Thanks, would be removed later.

> 
> >       switch (imx6_pcie->drvdata->variant) {
> >       case IMX8MQ:
> >               /*
> > @@ -621,6 +625,18 @@ static void imx6_pcie_init_phy(struct imx6_pcie
> *imx6_pcie)
> >                                  imx6_pcie_grp_offset(imx6_pcie),
> >
> IMX8MQ_GPR_PCIE_REF_USE_PAD,
> >
> IMX8MQ_GPR_PCIE_REF_USE_PAD);
> > +             /*
> > +              * Regarding to the datasheet, the PCIE_VPH is suggested
> > +              * to be 1.8V. If the PCIE_VPH is supplied by 3.3V, the
> > +              * VREG_BYPASS should be cleared to zero.
> > +              */
> > +             if (imx6_pcie->vph)
> > +                     phy_uv =
> regulator_get_voltage(imx6_pcie->vph);
> > +             if (phy_uv > 3000000)
> > +                     regmap_update_bits(imx6_pcie->iomuxc_gpr,
> > +
> imx6_pcie_grp_offset(imx6_pcie),
> > +
> IMX8MQ_GPR_PCIE_VREG_BYPASS,
> > +                                        0);
> 
> ...if you just fold this into a single condition. Right now phy_uv might be used
> uninitialized when the vph-supply is not specified in the DT. Better write this
> as:
> 
> if (imx6_pcie->vph && regulator_get_voltage(imx6_pcie->vph) > 3000000)
[Richard Zhu] Thanks. Would be changed as this way.
> 
> Regards,
> Lucas
> 
> >               break;
> >       case IMX7D:
> >               regmap_update_bits(imx6_pcie->iomuxc_gpr,
> IOMUXC_GPR12,
> > @@ -1130,6 +1146,13 @@ static int imx6_pcie_probe(struct
> platform_device *pdev)
> >               imx6_pcie->vpcie = NULL;
> >       }
> >
> >
> >
> >
> >
> >
> >
> >
> > +     imx6_pcie->vph = devm_regulator_get_optional(&pdev->dev,
> "vph");
> > +     if (IS_ERR(imx6_pcie->vph)) {
> > +             if (PTR_ERR(imx6_pcie->vph) != -ENODEV)
> > +                     return PTR_ERR(imx6_pcie->vph);
> > +             imx6_pcie->vph = NULL;
> > +     }
> > +
> >       platform_set_drvdata(pdev, imx6_pcie);
> >
> >
> >
> >
> >
> >
> >
> >
> >       ret = imx6_pcie_attach_pd(dev);
> 


      reply	other threads:[~2021-03-25  2:23 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-24  5:34 [PATCH v2 0/3] add one regulator used to power up pcie phy Richard Zhu
2021-03-24  5:34 ` [PATCH v2 1/3] dt-bindings: imx6q-pcie: " Richard Zhu
2021-03-24  9:26   ` Lucas Stach
2021-03-24  5:34 ` [PATCH v2 2/3] arm64: dts: imx8mq-evk: " Richard Zhu
2021-03-24  5:34 ` [PATCH v2 3/3] PCI: imx: clear vreg bypass when pcie vph voltage is 3v3 Richard Zhu
2021-03-24  9:30   ` Lucas Stach
2021-03-25  2:22     ` Richard Zhu [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=VI1PR04MB585360F9041FA67CA6D354FF8C629@VI1PR04MB5853.eurprd04.prod.outlook.com \
    --to=hongxing.zhu@nxp.com \
    --cc=andrew.smirnov@gmail.com \
    --cc=bhelgaas@google.com \
    --cc=kernel@pengutronix.de \
    --cc=kw@linux.com \
    --cc=l.stach@pengutronix.de \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-imx@nxp.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=shawnguo@kernel.org \
    --cc=stefan@agner.ch \
    --subject='RE: [EXT] Re: [PATCH v2 3/3] PCI: imx: clear vreg bypass when pcie vph voltage is 3v3' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).