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* [PATCH] PCI: tegra: Read "dbi" base address to program in application logic
@ 2020-11-25 19:25 Vidya Sagar
  2020-11-26 11:30 ` Thierry Reding
  2020-12-01 10:39 ` Lorenzo Pieralisi
  0 siblings, 2 replies; 3+ messages in thread
From: Vidya Sagar @ 2020-11-25 19:25 UTC (permalink / raw)
  To: lorenzo.pieralisi, robh, bhelgaas, thierry.reding, jonathanh,
	jingoohan1, kw, amanharitsh123, gregkh
  Cc: linux-pci, linux-tegra, linux-kernel, kthota, mmaddireddy,
	vidyas, sagar.tv

PCIe controller in Tegra194 requires the "dbi" region base address to be
programmed in one of the application logic registers to enable CPU access
to the "dbi" region. But, commit a0fd361db8e5 ("PCI: dwc: Move "dbi",
"dbi2", and "addr_space" resource setup into common code") moved the code
that reads the whereabouts of "dbi" region to the common code causing the
existing code in pcie-tegra194.c file to program NULL in the application
logic registers. This is causing null pointer dereference when the "dbi"
registers are accessed. This issue is fixed by explicitly reading the
"dbi" base address from DT node.

Fixes: a0fd361db8e5 ("PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup into common code")
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
---
 drivers/pci/controller/dwc/pcie-tegra194.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index fa54d9aaa430..ac2225175087 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1053,9 +1053,16 @@ static int tegra_pcie_enable_phy(struct tegra_pcie_dw *pcie)
 
 static int tegra_pcie_dw_parse_dt(struct tegra_pcie_dw *pcie)
 {
+	struct platform_device *pdev = to_platform_device(pcie->dev);
 	struct device_node *np = pcie->dev->of_node;
 	int ret;
 
+	pcie->dbi_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
+	if (!pcie->dbi_res) {
+		dev_err(pcie->dev, "Failed to find \"dbi\" region\n");
+		return -ENODEV;
+	}
+
 	ret = of_property_read_u32(np, "nvidia,aspm-cmrt-us", &pcie->aspm_cmrt);
 	if (ret < 0) {
 		dev_info(pcie->dev, "Failed to read ASPM T_cmrt: %d\n", ret);
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] PCI: tegra: Read "dbi" base address to program in application logic
  2020-11-25 19:25 [PATCH] PCI: tegra: Read "dbi" base address to program in application logic Vidya Sagar
@ 2020-11-26 11:30 ` Thierry Reding
  2020-12-01 10:39 ` Lorenzo Pieralisi
  1 sibling, 0 replies; 3+ messages in thread
From: Thierry Reding @ 2020-11-26 11:30 UTC (permalink / raw)
  To: Vidya Sagar
  Cc: lorenzo.pieralisi, robh, bhelgaas, jonathanh, jingoohan1, kw,
	amanharitsh123, gregkh, linux-pci, linux-tegra, linux-kernel,
	kthota, mmaddireddy, sagar.tv

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On Thu, Nov 26, 2020 at 12:55:54AM +0530, Vidya Sagar wrote:
> PCIe controller in Tegra194 requires the "dbi" region base address to be
> programmed in one of the application logic registers to enable CPU access
> to the "dbi" region. But, commit a0fd361db8e5 ("PCI: dwc: Move "dbi",
> "dbi2", and "addr_space" resource setup into common code") moved the code
> that reads the whereabouts of "dbi" region to the common code causing the
> existing code in pcie-tegra194.c file to program NULL in the application
> logic registers. This is causing null pointer dereference when the "dbi"
> registers are accessed. This issue is fixed by explicitly reading the
> "dbi" base address from DT node.
> 
> Fixes: a0fd361db8e5 ("PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup into common code")
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
>  drivers/pci/controller/dwc/pcie-tegra194.c | 7 +++++++
>  1 file changed, 7 insertions(+)

Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>

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^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] PCI: tegra: Read "dbi" base address to program in application logic
  2020-11-25 19:25 [PATCH] PCI: tegra: Read "dbi" base address to program in application logic Vidya Sagar
  2020-11-26 11:30 ` Thierry Reding
@ 2020-12-01 10:39 ` Lorenzo Pieralisi
  1 sibling, 0 replies; 3+ messages in thread
From: Lorenzo Pieralisi @ 2020-12-01 10:39 UTC (permalink / raw)
  To: Vidya Sagar, robh, thierry.reding, kw, jingoohan1, gregkh,
	jonathanh, bhelgaas, amanharitsh123
  Cc: Lorenzo Pieralisi, sagar.tv, kthota, linux-pci, linux-tegra,
	mmaddireddy, linux-kernel

On Thu, 26 Nov 2020 00:55:54 +0530, Vidya Sagar wrote:
> PCIe controller in Tegra194 requires the "dbi" region base address to be
> programmed in one of the application logic registers to enable CPU access
> to the "dbi" region. But, commit a0fd361db8e5 ("PCI: dwc: Move "dbi",
> "dbi2", and "addr_space" resource setup into common code") moved the code
> that reads the whereabouts of "dbi" region to the common code causing the
> existing code in pcie-tegra194.c file to program NULL in the application
> logic registers. This is causing null pointer dereference when the "dbi"
> registers are accessed. This issue is fixed by explicitly reading the
> "dbi" base address from DT node.

Applied to pci/dwc, thanks!

[1/1] PCI: tegra: Read "dbi" base address to program in application logic
      https://git.kernel.org/lpieralisi/pci/c/d5353c00cf

Thanks,
Lorenzo

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2020-12-01 10:40 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2020-11-25 19:25 [PATCH] PCI: tegra: Read "dbi" base address to program in application logic Vidya Sagar
2020-11-26 11:30 ` Thierry Reding
2020-12-01 10:39 ` Lorenzo Pieralisi

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