From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Kai-Heng Feng <kai.heng.feng@canonical.com>
Cc: bhelgaas@google.com, koba.ko@canonical.com,
Russell Currey <ruscur@russell.cc>,
Oliver O'Halloran <oohall@gmail.com>,
Lalithambika Krishnakumar <lalithambika.krishnakumar@intel.com>,
Lu Baolu <baolu.lu@linux.intel.com>,
Joerg Roedel <jroedel@suse.de>,
linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/2] PCI/AER: Disable AER service when link is in L2/L3 ready, L2 and L3 state
Date: Thu, 27 Jan 2022 08:30:21 +0200 [thread overview]
Message-ID: <YfI7/X15bl+Ac19A@lahna> (raw)
In-Reply-To: <20220127025418.1989642-1-kai.heng.feng@canonical.com>
On Thu, Jan 27, 2022 at 10:54:17AM +0800, Kai-Heng Feng wrote:
> Commit 50310600ebda ("iommu/vt-d: Enable PCI ACS for platform opt in
> hint") enables ACS, and some platforms lose its NVMe after resume from
> S3:
> [ 50.947816] pcieport 0000:00:1b.0: DPC: containment event, status:0x1f01 source:0x0000
> [ 50.947817] pcieport 0000:00:1b.0: DPC: unmasked uncorrectable error detected
> [ 50.947829] pcieport 0000:00:1b.0: PCIe Bus Error: severity=Uncorrected (Non-Fatal), type=Transaction Layer, (Receiver ID)
> [ 50.947830] pcieport 0000:00:1b.0: device [8086:06ac] error status/mask=00200000/00010000
> [ 50.947831] pcieport 0000:00:1b.0: [21] ACSViol (First)
> [ 50.947841] pcieport 0000:00:1b.0: AER: broadcast error_detected message
> [ 50.947843] nvme nvme0: frozen state error detected, reset controller
>
> It happens right after ACS gets enabled during resume.
>
> There's another case, when Thunderbolt reaches D3cold:
> [ 30.100211] pcieport 0000:00:1d.0: AER: Uncorrected (Non-Fatal) error received: 0000:00:1d.0
> [ 30.100251] pcieport 0000:00:1d.0: PCIe Bus Error: severity=Uncorrected (Non-Fatal), type=Transaction Layer, (Requester ID)
> [ 30.100256] pcieport 0000:00:1d.0: device [8086:7ab0] error status/mask=00100000/00004000
> [ 30.100262] pcieport 0000:00:1d.0: [20] UnsupReq (First)
> [ 30.100267] pcieport 0000:00:1d.0: AER: TLP Header: 34000000 08000052 00000000 00000000
> [ 30.100372] thunderbolt 0000:0a:00.0: AER: can't recover (no error_detected callback)
> [ 30.100401] xhci_hcd 0000:3e:00.0: AER: can't recover (no error_detected callback)
> [ 30.100427] pcieport 0000:00:1d.0: AER: device recovery failed
>
> So disable AER service to avoid the noises from turning power rails
> on/off when the device is in low power states (D3hot and D3cold), as
> PCIe spec "5.2 Link State Power Management" states that TLP and DLLP
> transmission is disabled for a Link in L2/L3 Ready (D3hot), L2 (D3cold
> with aux power) and L3 (D3cold).
>
> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=209149
> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=215453
> Fixes: 50310600ebda ("iommu/vt-d: Enable PCI ACS for platform opt in hint")
> Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
next prev parent reply other threads:[~2022-01-27 6:30 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-27 2:54 [PATCH v2 1/2] PCI/AER: Disable AER service when link is in L2/L3 ready, L2 and L3 state Kai-Heng Feng
2022-01-27 2:54 ` [PATCH v2 2/2] PCI/DPC: Disable DPC " Kai-Heng Feng
2022-01-27 6:31 ` Mika Westerberg
2022-03-19 20:40 ` Sathyanarayanan Kuppuswamy
2022-01-27 6:30 ` Mika Westerberg [this message]
2022-01-27 7:01 ` [PATCH v2 1/2] PCI/AER: Disable AER " Lu Baolu
2022-01-27 11:14 ` Kai-Heng Feng
2022-01-28 2:53 ` Lu Baolu
2022-01-28 3:29 ` Kai-Heng Feng
2022-03-19 20:38 ` Sathyanarayanan Kuppuswamy
2022-03-21 2:38 ` Kai-Heng Feng
2022-03-21 3:52 ` Sathyanarayanan Kuppuswamy
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