From: Johan Hovold <johan@kernel.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: "Andy Gross" <agross@kernel.org>,
"Bjorn Andersson" <bjorn.andersson@linaro.org>,
"Stephen Boyd" <swboyd@chromium.org>,
"Michael Turquette" <mturquette@baylibre.com>,
"Taniya Das" <quic_tdas@quicinc.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Prasad Malisetty" <quic_pmaliset@quicinc.com>,
"Johan Hovold" <johan+linaro@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-pci@vger.kernel.org
Subject: Re: [PATCH v4 2/5] clk: qcom: regmap: add pipe clk implementation
Date: Mon, 9 May 2022 12:28:14 +0200 [thread overview]
Message-ID: <Ynjsvuo4p3jMoNEq@hovoldconsulting.com> (raw)
In-Reply-To: <1b32940e-e402-6196-fd7e-0e34a7a18495@linaro.org>
On Fri, May 06, 2022 at 03:40:18PM +0300, Dmitry Baryshkov wrote:
> On 06/05/2022 15:31, Johan Hovold wrote:
> > The only thing that comes to mind that wouldn't be possible is to
> > set the mux state using an assigned clock parent in devicetree to make
> > sure that XO is always selected before toggling the GDSC at probe.
> >
> > But since that doesn't seem to work anyway when the boot firmware has
> > set things up (e.g. causes a modem here to reset) that would probably
> > need to be handled in the GDSC driver anyway (i.e. make sure the source
> > is XO before enabling the GDSC but only when it was actually disabled).
> >
> > Taking that one step further would be to implement all this in the GDSC
> > driver from the start so that the PHY PLL is always muxed in while the
> > power domain is enabled (and only then)...
>
> I think, if we move this to the gdsc driver, we'd loose the part of the
> clock tree.
Not necessarily, if the GDSC is modeled as a consumer of the mux.
> If you don't mind, I'll wait for your Tested-by and will post the rename
> patchset afterwards.
I've tested the series and it works as expected. I'll retest the final
version before giving my Tested-by.
Johan
next prev parent reply other threads:[~2022-05-09 10:30 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-01 19:21 [PATCH v4 0/5] PCI: qcom: Rework pipe_clk/pipe_clk_src handling Dmitry Baryshkov
2022-05-01 19:21 ` [PATCH v4 1/5] PCI: qcom: Remove unnecessary pipe_clk handling Dmitry Baryshkov
2022-05-02 10:13 ` Manivannan Sadhasivam
2022-05-09 9:41 ` Johan Hovold
2022-05-01 19:21 ` [PATCH v4 2/5] clk: qcom: regmap: add pipe clk implementation Dmitry Baryshkov
2022-05-02 10:10 ` Manivannan Sadhasivam
2022-05-02 10:35 ` Dmitry Baryshkov
2022-05-02 11:10 ` Manivannan Sadhasivam
2022-05-02 11:18 ` Dmitry Baryshkov
2022-05-02 15:06 ` Manivannan Sadhasivam
2022-05-02 15:24 ` Dmitry Baryshkov
2022-05-06 12:54 ` Johan Hovold
2022-05-06 15:25 ` Manivannan Sadhasivam
2022-05-06 12:40 ` Johan Hovold
2022-05-06 13:00 ` Dmitry Baryshkov
2022-05-09 10:29 ` Johan Hovold
2022-05-11 14:17 ` Dmitry Baryshkov
2022-05-13 8:22 ` Johan Hovold
2022-05-11 14:34 ` Manivannan Sadhasivam
2022-05-06 12:31 ` Johan Hovold
2022-05-06 12:40 ` Dmitry Baryshkov
2022-05-09 10:28 ` Johan Hovold [this message]
2022-05-09 10:17 ` Johan Hovold
2022-05-01 19:21 ` [PATCH v4 3/5] clk: qcom: gcc-sm8450: use new clk_regmap_pipe_ops for PCIe pipe clocks Dmitry Baryshkov
2022-05-01 19:21 ` [PATCH v4 4/5] clk: qcom: gcc-sc7280: " Dmitry Baryshkov
2022-05-01 19:21 ` [PATCH v4 5/5] PCI: qcom: Drop manual pipe_clk_src handling Dmitry Baryshkov
2022-05-09 10:24 ` Johan Hovold
2022-05-11 13:19 ` [PATCH v4 0/5] PCI: qcom: Rework pipe_clk/pipe_clk_src handling Lorenzo Pieralisi
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