From: John Garry <john.garry@huawei.com>
To: Yicong Yang <yangyicong@huawei.com>,
Yicong Yang <yangyicong@hisilicon.com>,
<gregkh@linuxfoundation.org>, <helgaas@kernel.org>,
<alexander.shishkin@linux.intel.com>, <lorenzo.pieralisi@arm.com>,
<will@kernel.org>, <mark.rutland@arm.com>,
<mathieu.poirier@linaro.org>, <suzuki.poulose@arm.com>,
<mike.leach@linaro.org>, <leo.yan@linaro.org>,
<jonathan.cameron@huawei.com>, <daniel.thompson@linaro.org>,
<joro@8bytes.org>, <shameerali.kolothum.thodi@huawei.com>,
<robin.murphy@arm.com>, <peterz@infradead.org>,
<mingo@redhat.com>, <acme@kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<coresight@lists.linaro.org>, <linux-pci@vger.kernel.org>,
<linux-perf-users@vger.kernel.org>,
<iommu@lists.linux-foundation.org>
Cc: <prime.zeng@huawei.com>, <liuqi115@huawei.com>,
<zhangshaokun@hisilicon.com>, <linuxarm@huawei.com>,
<song.bao.hua@hisilicon.com>
Subject: Re: [PATCH v4 2/8] hwtracing: Add trace function support for HiSilicon PCIe Tune and Trace device
Date: Thu, 24 Feb 2022 12:32:59 +0000 [thread overview]
Message-ID: <aabd5f0a-1a54-e4da-734c-f940c45d66b4@huawei.com> (raw)
In-Reply-To: <e78f6e5e-a0c3-4976-4f46-e3369635ee3d@huawei.com>
On 24/02/2022 03:53, Yicong Yang wrote:
> On 2022/2/22 19:06, John Garry wrote:
>> On 21/02/2022 08:43, Yicong Yang wrote:
>>> HiSilicon PCIe tune and trace device(PTT) is a PCIe Root Complex
>>> integrated Endpoint(RCiEP) device, providing the capability
>>> to dynamically monitor and tune the PCIe traffic, and trace
>>> the TLP headers.
>>>
>>> Add the driver for the device to enable the trace function.
>>> This patch adds basic function of trace, including the device's
>>> probe and initialization, functions for trace buffer allocation
>>> and trace enable/disable, register an interrupt handler to
>>> simply response to the DMA events. The user interface of trace
>>> will be added in the following patch.
>>>
>>
>> Fill commit message lines upto 75 characters
>
> Hi John,
>
> Thanks for the comments.
>
> The commit message is within 75 characters. I checked again and checkpatch
> didn't warning for this.
I mean to fill the lines up as much as possible, upto 75 char max, if
not already done so. I am not sure if you are doing this already, but it
looks like you were not.
Checkpatch
will
no
warn
about
a
commit
message
like
this
:)
Thanks,
john
next prev parent reply other threads:[~2022-02-24 12:33 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-21 8:42 [PATCH v4 0/8] Add support for HiSilicon PCIe Tune and Trace device Yicong Yang
2022-02-21 8:43 ` [PATCH v4 1/8] iommu/arm-smmu-v3: Make default domain type of HiSilicon PTT device to identity Yicong Yang
2022-02-21 8:43 ` [PATCH v4 2/8] hwtracing: Add trace function support for HiSilicon PCIe Tune and Trace device Yicong Yang
2022-02-21 11:18 ` Jonathan Cameron
2022-02-21 13:13 ` Yicong Yang
2022-02-21 13:22 ` Jonathan Cameron
2022-02-22 11:06 ` John Garry
2022-02-24 3:53 ` Yicong Yang
2022-02-24 12:32 ` John Garry [this message]
2022-02-24 12:57 ` Yicong Yang
2022-02-21 8:43 ` [PATCH v4 3/8] hisi_ptt: Register PMU device for PTT trace Yicong Yang
2022-02-21 11:44 ` Jonathan Cameron
2022-02-21 13:26 ` Yicong Yang
2022-02-22 4:03 ` Yicong Yang
2022-02-22 11:17 ` John Garry
2022-02-24 4:04 ` Yicong Yang
2022-02-21 8:43 ` [PATCH v4 4/8] hisi_ptt: Add support for dynamically updating the filter list Yicong Yang
2022-02-21 11:51 ` Jonathan Cameron
2022-02-21 8:43 ` [PATCH v4 5/8] hisi_ptt: Add tune function support for HiSilicon PCIe Tune and Trace device Yicong Yang
2022-02-21 8:43 ` [PATCH v4 6/8] perf tool: Add support for HiSilicon PCIe Tune and Trace device driver Yicong Yang
[not found] ` <58a37c21-cf22-4cce-9c45-51048594a941@gmail.com>
2022-02-23 2:36 ` Yicong Yang
2022-02-21 8:43 ` [PATCH v4 7/8] docs: Add HiSilicon PTT device driver documentation Yicong Yang
2022-02-21 11:59 ` Jonathan Cameron
2022-02-21 8:43 ` [PATCH v4 8/8] MAINTAINERS: Add maintainer for HiSilicon PTT driver Yicong Yang
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