* [PATCH v1 0/2] Add PGR response PASID requirement check in Intel IOMMU. @ 2019-02-07 18:37 sathyanarayanan.kuppuswamy 2019-02-07 18:37 ` [PATCH v1 1/2] PCI: ATS: Add function to check PRG response PASID bit status sathyanarayanan.kuppuswamy 2019-02-07 18:37 ` [PATCH v1 2/2] iommu/vt-d: Enable PASID only if device expects PASID in PRG response sathyanarayanan.kuppuswamy 0 siblings, 2 replies; 4+ messages in thread From: sathyanarayanan.kuppuswamy @ 2019-02-07 18:37 UTC (permalink / raw) To: bhelgaas, joro, dwmw2 Cc: linux-pci, iommu, linux-kernel, ashok.raj, jacob.jun.pan, keith.busch From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Intel IOMMU responds automatically when receiving page-requests from a PCIe endpoint and the page-request queue is full and it cannot accept any more page-requests. When it auto-responds to page-requests with a success to the endpoint, it automatically responds with the PASID if the page-request had a PASID in the incoming request. IOMMU doesn't actually have any place to check device capabilities (like whether the device expects PASID in PGR response or not) before sending the response message. Due to this restriction Intel IOMMU driver only enables PASID, if the endpoint is compliant to Intel IOMMU's. Kuppuswamy Sathyanarayanan (2): PCI: ATS: Add function to check PRG response PASID bit status. iommu/vt-d: Enable PASID only if device expects PASID in PRG response. drivers/iommu/intel-iommu.c | 3 ++- drivers/pci/ats.c | 27 +++++++++++++++++++++++++++ include/linux/pci-ats.h | 5 +++++ include/uapi/linux/pci_regs.h | 1 + 4 files changed, 35 insertions(+), 1 deletion(-) -- 2.20.1 ^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v1 1/2] PCI: ATS: Add function to check PRG response PASID bit status. 2019-02-07 18:37 [PATCH v1 0/2] Add PGR response PASID requirement check in Intel IOMMU sathyanarayanan.kuppuswamy @ 2019-02-07 18:37 ` sathyanarayanan.kuppuswamy 2019-02-07 20:35 ` Bjorn Helgaas 2019-02-07 18:37 ` [PATCH v1 2/2] iommu/vt-d: Enable PASID only if device expects PASID in PRG response sathyanarayanan.kuppuswamy 1 sibling, 1 reply; 4+ messages in thread From: sathyanarayanan.kuppuswamy @ 2019-02-07 18:37 UTC (permalink / raw) To: bhelgaas, joro, dwmw2 Cc: linux-pci, iommu, linux-kernel, ashok.raj, jacob.jun.pan, keith.busch, Jacob Pan, Kuppuswamy Sathyanarayanan From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Add a new function to return the status of PRG response PASID required bit in PRI status register. This function will be used by drivers like IOMMU, if it is required to enforce the PASID required for page-group responses. Cc: Ashok Raj <ashok.raj@intel.com> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> Cc: Keith Busch <keith.busch@intel.com> Suggested-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> --- drivers/pci/ats.c | 27 +++++++++++++++++++++++++++ include/linux/pci-ats.h | 5 +++++ include/uapi/linux/pci_regs.h | 1 + 3 files changed, 33 insertions(+) diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c index 5b78f3b1b918..666d03332944 100644 --- a/drivers/pci/ats.c +++ b/drivers/pci/ats.c @@ -368,6 +368,33 @@ int pci_pasid_features(struct pci_dev *pdev) } EXPORT_SYMBOL_GPL(pci_pasid_features); +/** + * pci_pggrp_rsp_need_pasid - Return PRG response PASID required bit status. + * @pdev: PCI device structure + * + * Returns positive if PASID is required, 0 otherwise. + * + * Eventhough the PRG response PASID status is read from PRI status + * register, Since this API will mainly be used by PASID users, this + * function is defined within #ifdef CONFIG_PCI_PASID instead of + * CONFIG_PCI_PRI. + * + */ +int pci_pggrp_rsp_need_pasid(struct pci_dev *pdev) +{ + u16 status; + int pos; + + pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); + if (!pos) + return 0; + + pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status); + + return status & PCI_PRI_STATUS_PASID; +} +EXPORT_SYMBOL_GPL(pci_pggrp_rsp_need_pasid); + #define PASID_NUMBER_SHIFT 8 #define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT) /** diff --git a/include/linux/pci-ats.h b/include/linux/pci-ats.h index 7c4b8e27268c..ea29c7c64482 100644 --- a/include/linux/pci-ats.h +++ b/include/linux/pci-ats.h @@ -40,6 +40,7 @@ void pci_disable_pasid(struct pci_dev *pdev); void pci_restore_pasid_state(struct pci_dev *pdev); int pci_pasid_features(struct pci_dev *pdev); int pci_max_pasids(struct pci_dev *pdev); +int pci_pggrp_rsp_need_pasid(struct pci_dev *pdev); #else /* CONFIG_PCI_PASID */ @@ -66,6 +67,10 @@ static inline int pci_max_pasids(struct pci_dev *pdev) return -EINVAL; } +static int pci_pggrp_rsp_need_pasid(struct pci_dev *pdev) +{ + return 0; +} #endif /* CONFIG_PCI_PASID */ diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index e1e9888c85e6..898be572b010 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -880,6 +880,7 @@ #define PCI_PRI_STATUS_RF 0x001 /* Response Failure */ #define PCI_PRI_STATUS_UPRGI 0x002 /* Unexpected PRG index */ #define PCI_PRI_STATUS_STOPPED 0x100 /* PRI Stopped */ +#define PCI_PRI_STATUS_PASID 0x8000 /* PRG Response PASID Required */ #define PCI_PRI_MAX_REQ 0x08 /* PRI max reqs supported */ #define PCI_PRI_ALLOC_REQ 0x0c /* PRI max reqs allowed */ #define PCI_EXT_CAP_PRI_SIZEOF 16 -- 2.20.1 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v1 1/2] PCI: ATS: Add function to check PRG response PASID bit status. 2019-02-07 18:37 ` [PATCH v1 1/2] PCI: ATS: Add function to check PRG response PASID bit status sathyanarayanan.kuppuswamy @ 2019-02-07 20:35 ` Bjorn Helgaas 0 siblings, 0 replies; 4+ messages in thread From: Bjorn Helgaas @ 2019-02-07 20:35 UTC (permalink / raw) To: sathyanarayanan.kuppuswamy Cc: joro, dwmw2, linux-pci, iommu, linux-kernel, ashok.raj, jacob.jun.pan, keith.busch, Jacob Pan "PCI/ATS: Add pci_pggrp_rsp_need_pasid() interface" On Thu, Feb 07, 2019 at 10:37:58AM -0800, sathyanarayanan.kuppuswamy@linux.intel.com wrote: > From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> > > Add a new function to return the status of PRG response PASID > required bit in PRI status register. This function will be used by "return the PRG Response PASID Required bit in the Page Request Status Register". That's just to make it clear exactly what the name of the bit is. Without the capitalization, you can't tell where the name itself begins. > drivers like IOMMU, if it is required to enforce the PASID required for > page-group responses. If I'm reading the spec (PCIe r4.0, sec 10.5.2.3) correctly, when this bit is set, it means the Function expects a PASID on responses it receives from the host. It's not so much that the IOMMU "enforces" anything; it's just that when this bit is set, the IOMMU must supply the PASID in its responses to that Function. s/page-group responses/PRG (Page Request Group) Response Messages/ > Cc: Ashok Raj <ashok.raj@intel.com> > Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> > Cc: Keith Busch <keith.busch@intel.com> > Suggested-by: Ashok Raj <ashok.raj@intel.com> > Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> > --- > drivers/pci/ats.c | 27 +++++++++++++++++++++++++++ > include/linux/pci-ats.h | 5 +++++ > include/uapi/linux/pci_regs.h | 1 + > 3 files changed, 33 insertions(+) > > diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c > index 5b78f3b1b918..666d03332944 100644 > --- a/drivers/pci/ats.c > +++ b/drivers/pci/ats.c > @@ -368,6 +368,33 @@ int pci_pasid_features(struct pci_dev *pdev) > } > EXPORT_SYMBOL_GPL(pci_pasid_features); > > +/** > + * pci_pggrp_rsp_need_pasid - Return PRG response PASID required bit status. pci_prg_resp_pasid_required()? "PRG" seems to be the standard spec terminology, so I think using "pggrp" muddies the water a little bit. > + * @pdev: PCI device structure > + * > + * Returns positive if PASID is required, 0 otherwise. > + * > + * Eventhough the PRG response PASID status is read from PRI status > + * register, Since this API will mainly be used by PASID users, this > + * function is defined within #ifdef CONFIG_PCI_PASID instead of > + * CONFIG_PCI_PRI. s/Eventhough/Even though/ s/Since/since/ > + * > + */ > +int pci_pggrp_rsp_need_pasid(struct pci_dev *pdev) > +{ > + u16 status; > + int pos; > + > + pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); > + if (!pos) > + return 0; > + > + pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status); > + > + return status & PCI_PRI_STATUS_PASID; > +} > +EXPORT_SYMBOL_GPL(pci_pggrp_rsp_need_pasid); > + > #define PASID_NUMBER_SHIFT 8 > #define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT) > /** > diff --git a/include/linux/pci-ats.h b/include/linux/pci-ats.h > index 7c4b8e27268c..ea29c7c64482 100644 > --- a/include/linux/pci-ats.h > +++ b/include/linux/pci-ats.h > @@ -40,6 +40,7 @@ void pci_disable_pasid(struct pci_dev *pdev); > void pci_restore_pasid_state(struct pci_dev *pdev); > int pci_pasid_features(struct pci_dev *pdev); > int pci_max_pasids(struct pci_dev *pdev); > +int pci_pggrp_rsp_need_pasid(struct pci_dev *pdev); > > #else /* CONFIG_PCI_PASID */ > > @@ -66,6 +67,10 @@ static inline int pci_max_pasids(struct pci_dev *pdev) > return -EINVAL; > } > > +static int pci_pggrp_rsp_need_pasid(struct pci_dev *pdev) > +{ > + return 0; > +} > #endif /* CONFIG_PCI_PASID */ > > > diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h > index e1e9888c85e6..898be572b010 100644 > --- a/include/uapi/linux/pci_regs.h > +++ b/include/uapi/linux/pci_regs.h > @@ -880,6 +880,7 @@ > #define PCI_PRI_STATUS_RF 0x001 /* Response Failure */ > #define PCI_PRI_STATUS_UPRGI 0x002 /* Unexpected PRG index */ > #define PCI_PRI_STATUS_STOPPED 0x100 /* PRI Stopped */ > +#define PCI_PRI_STATUS_PASID 0x8000 /* PRG Response PASID Required */ > #define PCI_PRI_MAX_REQ 0x08 /* PRI max reqs supported */ > #define PCI_PRI_ALLOC_REQ 0x0c /* PRI max reqs allowed */ > #define PCI_EXT_CAP_PRI_SIZEOF 16 > -- > 2.20.1 > ^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v1 2/2] iommu/vt-d: Enable PASID only if device expects PASID in PRG response. 2019-02-07 18:37 [PATCH v1 0/2] Add PGR response PASID requirement check in Intel IOMMU sathyanarayanan.kuppuswamy 2019-02-07 18:37 ` [PATCH v1 1/2] PCI: ATS: Add function to check PRG response PASID bit status sathyanarayanan.kuppuswamy @ 2019-02-07 18:37 ` sathyanarayanan.kuppuswamy 1 sibling, 0 replies; 4+ messages in thread From: sathyanarayanan.kuppuswamy @ 2019-02-07 18:37 UTC (permalink / raw) To: bhelgaas, joro, dwmw2 Cc: linux-pci, iommu, linux-kernel, ashok.raj, jacob.jun.pan, keith.busch, Jacob Pan, Kuppuswamy Sathyanarayanan From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> In Intel IOMMU, if the Page Request Queue (PRQ) is full, it will automatically respond to the device with a success message as a keep alive. And when sending the success message, IOMMU will include PASID in the response message when the page request has a PASID in request message and It does not check against the PRG response PASID requirement of the device before sending the response. Also, If the device receives the PRG response with PASID when its not expecting it then the device behavior is undefined. So enable PASID support only if device expects PASID in PRG response message. Cc: Ashok Raj <ashok.raj@intel.com> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> Cc: Keith Busch <keith.busch@intel.com> Suggested-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> --- drivers/iommu/intel-iommu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index 1457f931218e..887847f08746 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -1399,7 +1399,8 @@ static void iommu_enable_dev_iotlb(struct device_domain_info *info) undefined. So always enable PASID support on devices which have it, even if we can't yet know if we're ever going to use it. */ - if (info->pasid_supported && !pci_enable_pasid(pdev, info->pasid_supported & ~1)) + if (info->pasid_supported && pci_pggrp_rsp_need_pasid(pdev) && + !pci_enable_pasid(pdev, info->pasid_supported & ~1)) info->pasid_enabled = 1; if (info->pri_supported && !pci_reset_pri(pdev) && !pci_enable_pri(pdev, 32)) -- 2.20.1 ^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2019-02-07 20:35 UTC | newest] Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-02-07 18:37 [PATCH v1 0/2] Add PGR response PASID requirement check in Intel IOMMU sathyanarayanan.kuppuswamy 2019-02-07 18:37 ` [PATCH v1 1/2] PCI: ATS: Add function to check PRG response PASID bit status sathyanarayanan.kuppuswamy 2019-02-07 20:35 ` Bjorn Helgaas 2019-02-07 18:37 ` [PATCH v1 2/2] iommu/vt-d: Enable PASID only if device expects PASID in PRG response sathyanarayanan.kuppuswamy
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).