Re: [PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

Re: [PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Bjorn Helgaas]

On Wed, Nov 29, 2017 at 1:28 PM, Christian Zigotzky
<chzigotzky@xenosoft.de> wrote:
> On 23 November 2017 2:31PM, Michael Ellerman wrote:
>>
>> Hi Christian,
>>
>> Thanks for your patch.
>>
>> Christian Zigotzky <chzigotzky@xenosoft.de> writes:
>>>
>>> Hi All,
>>>
>>> Just a small patch for the P.A. Semi Nemo board:
>>>
>>> -----
>>>
>>> diff -rupN a/drivers/pci/probe.c b/drivers/pci/probe.c
>>> --- a/drivers/pci/probe.c    2017-11-16 08:18:40.504012010 +0100
>>> +++ b/drivers/pci/probe.c    2017-11-16 08:17:22.044368405 +0100
>>> @@ -2219,6 +2219,8 @@ static int only_one_child(struct pci_bus
>>
>> As this is a patch to the PCI code I can't merge it via the powerpc
>> tree. You would need to send it to linux-pci@vger.kernel.org.
>>
>>>        if (!parent || !pci_is_pcie(parent))
>>>            return 0;
>>> +    #ifndef CONFIG_PPC_PASEMI_NEMO
>>> +    // SB600 for the Nemo board has non-zero devices on non-root bus.
>>>        if (pci_pcie_type(parent) == PCI_EXP_TYPE_ROOT_PORT)
>>>            return 1;
>>>
>>> @@ -2231,6 +2233,7 @@ static int only_one_child(struct pci_bus
>>>        if (parent->has_secondary_link &&
>>>            !pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))
>>>            return 1;
>>> +    #endif
>>
>> But the PCI maintainer is not going to accept a patch like this, which
>> adds a platform specific #ifdef in core code like this.
>>
>> If you look at the rest of that file I don't think you'll find a single
>> #ifdef other than for generic configuration symbols.
>>
>> Are you sure the PCI_SCAN_ALL_PCIE_DEVS logic doesn't work for you? It
>> sounds like it was added for exactly this problem.
>>
>> cheers
>>
> Hi Michael,
>
> Thanks for your reply. Sorry for my late answer. I removed the patch above
> from the RC1 and compiled the RC1 again. Unfortunately without the patch,
> the kernel doesn't recognize any drives and partitions. Do you have another
> idea?

What happens if you boot RC1 with "pci=pcie_scan_all"?  If that works,
we do have some quirks that set that automatically, and we might be
able to add another one for the Nemo.

Can you collect the complete "lspci -vv" and dmesg output for this
system?  I'm curious about why it is special.

Bjorn

[PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Christian Zigotzky]

[-- Attachment #1: Type: text/plain, Size: 3820 bytes --]

On 29 November 2017 at 11:34PM, Bjorn Helgaas wrote:
 > On Wed, Nov 29, 2017 at 2:45 PM, Christian Zigotzky
 >> Hi Bjorn,
 >>
 >> Thank you for your answer. I have tried to boot the kernel 4.15 RC1 
(built
 >> without the patch above) with the boot argument "pci=pcie_scan_all" but
 >> without any success.
 >>
 >> Just for info:
 >>
 >> The CPU is a PA Semi “PWRficient” PA6T-1682M. This device combines dual
 >> 1.8GHz PowerPC cores with a 2MB L2 cache, dual channel DDR2 memory
 >> controllers and 24 SerDes
 >> channels. The PowerPC cores adhere to the Power ISA v2.04, and support
 >> 64-bit extensions. They feature a double precision FPU and a VMX 
(AltiVec)
 >> vector unit. They each have a 64kB I-cache and a 64kB D-cache.
 >> The SerDes channels support PCI Express, XAUI and SGMII protocols. The
 >> “ENVOI” I/O subsystem which drives them includes caching, offload 
and DMA
 >> resources to maximise I/O
 >> performance.
 >> Nemo uses the AMD/ATI SB600 South Bridge to provide various 
integrated I/O
 >> functions including SATA/PATA ports, USB and audio. The SB600 
connects to
 >> the CPU via a PCIe x4 link. This is termed an “A-link II Express” 
link by
 >> ATI/AMD. The design team determined early in the development of Nemo 
that
 >> the link’s behaviour as an endpoint does not comply fully with the PCI
 >> Express specification. Specifically, it requires the root complex to use
 >> non-zero device numbers in type 0 configuration cycles to enumerate 
all the
 >> devices within the SB600. This is related to the PC architecture and 
is used
 >> to allow SB600 devices appear on logical bus 0.
 >>
 >> More information about the Nemo board:
 >>
 >> https://en.wikipedia.org/wiki/AmigaOne_X1000
 >> http://www.a-eon.com/?page=x1000
 >> http://www.amigaos.net/hardware/35/amigaone-x1000
 >>
 >> Please find attached the complete "lspci -vv" and dmesg output.
 >
 > Thanks.  Can you collect the "lspci -vv" output as root?  The one you
 > attached wasn't as root and doesn't include the PCI capability
 > information, which we need so we can tell which devices appear as
 > conventional PCI and which as PCIe.
 >
 > It would also be helpful if you could send plain-text email because
 > the linux-pci list discards fancy email
 > (http://vger.kernel.org/majordomo-info.html#taboo).
 >
 > It looks like the SB600 devices actually appear on bus 05 (not 00),
 > right?  I see these devices (among others):
 >
 >   00:10.0 PCI bridge: PA Semi, Inc PWRficient PCI-Express Port
 >   00:11.0 PCI bridge: PA Semi, Inc PWRficient PCI-Express Port
 >   01:00.0 VGA compatible controller: [AMD/ATI] Barts XT [Radeon HD 6870]
 >   05:12.0 SATA controller: [AMD/ATI] SB600 Non-Raid-5 SATA
 >   05:14.4 PCI bridge: [AMD/ATI] SBx00 PCI to PCI Bridge
 >   06:05.0 Ethernet controller: RTL-8100/8101L/8139
 >
 > So 00:10.0 and 00:11.0 are bridges leading to buses 01 and 05-06.
 > Maybe 00:11.0 is the Downstream Port that leads to this magic "A-Link
 > II Express" thing?
 >
 > But I don't think all those SB600 devices on bus 05 are PCIe devices.
 > It would certainly be unconventional to have a PCIe device (00:11.0)
 > at the upstream end of a link and conventional PCI devices (05:12.0,
 > 05:13.0, 05:13.1, etc) at the downstream end, with no visible PCIe
 > port.
 >
 > The usual thing would be that 00:11.0 would be a Root Port or a Switch
 > Downstream Port leading to a Link, and the other end of the Link would
 > terminate in either a Switch Upstream Port or an Upstream Port
 > embedded in an Endpoint.
 >
 > We'll have to think about how to handle this.  But the complete "lspci
 > -vv" output as root will have more useful information.
 >
 > Bjorn

Hi Bjorn,

Thanks for your reply. Please find attached the complete "lspci -vv" 
output as root.

Cheers,
Christian






[-- Attachment #2: lspci_as_root.txt --]
[-- Type: text/plain, Size: 42902 bytes --]

00:00.0 Host bridge: PA Semi, Inc PWRficient Host Bridge (rev 12)
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx+
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 86
	Capabilities: [40] Vendor Specific Information: Len=18 <?>

00:01.0 Memory controller: PA Semi, Inc PWRficient L2 Cache (rev 11)
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 82
	Capabilities: [40] Vendor Specific Information: Len=18 <?>

00:03.0 PIC: PA Semi, Inc PWRficient System/Debug Controller (rev 13) (prog-if 80)
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 84

00:04.0 RAM memory: PA Semi, Inc PWRficient DDR2 Memory Controller (rev 11)
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 88
	Capabilities: [40] Vendor Specific Information: Len=18 <?>
	Kernel driver in use: pasemi_edac

00:05.0 RAM memory: PA Semi, Inc PWRficient DDR2 Memory Controller (rev 11)
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 90
	Capabilities: [40] Vendor Specific Information: Len=18 <?>
	Kernel driver in use: pasemi_edac

00:08.0 Power PC: PA Semi, Inc PA6T Core (rev 12)
	Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes

00:09.0 Power PC: PA Semi, Inc PA6T Core (rev 12)
	Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes

00:10.0 PCI bridge: PA Semi, Inc PWRficient PCI-Express Port (rev 11) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 1
	Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
	I/O behind bridge: 00002000-00002fff
	Memory behind bridge: 90000000-a00fffff
	Prefetchable memory behind bridge: 0000080000000000-00000800001fffff
	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
	BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
		DevCap:	MaxPayload 256 bytes, PhantFunc 7
			ExtTag+ RBE+
		DevCtl:	Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
			RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
		LnkCap:	Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Exit Latency L0s <64ns, L1 <1us
			ClockPM- Surprise+ LLActRep+ BwNot- ASPMOptComp-
		LnkCtl:	ASPM Disabled; RCB 128 bytes Disabled- CommClk-
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk- DLActive+ BWMgmt- ABWMgmt-
		SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise-
			Slot #0, PowerLimit 0.000W; Interlock- NoCompl-
		SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
			Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
		SltSta:	Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
			Changed: MRL- PresDet- LinkState+
		RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
		RootCap: CRSVisible-
		RootSta: PME ReqID 0000, PMEStatus- PMEPending-
	Capabilities: [70] Power Management version 2
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [100 v1] Root Complex Link
		Desc:	PortNumber=01 ComponentID=01 EltType=Config
		Link0:	Desc:	TargetPort=00 TargetComponent=01 AssocRCRB+ LinkType=MemMapped LinkValid-
			Addr:	00000000e0007100
	Capabilities: [120 v1] Virtual Channel
		Caps:	LPEVC=0 RefClk=100ns PATEntryBits=1
		Arb:	Fixed+ WRR32- WRR64- WRR128-
		Ctrl:	ArbSelect=Fixed
		Status:	InProgress-
		VC0:	Caps:	PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
			Arb:	Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
			Ctrl:	Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
			Status:	NegoPending- InProgress-
		VC1:	Caps:	PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
			Arb:	Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
			Ctrl:	Enable- ID=0 ArbSelect=Fixed TC/VC=00
			Status:	NegoPending- InProgress-
	Capabilities: [150 v1] Vendor Specific Information: ID=0001 Rev=1 Len=02c <?>
	Capabilities: [200 v1] Vendor Specific Information: ID=0003 Rev=1 Len=088 <?>
	Kernel driver in use: pcieport

00:10.1 PCI bridge: PA Semi, Inc PWRficient PCI-Express Port (rev 11) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin D routed to IRQ 4
	Bus: primary=00, secondary=02, subordinate=02, sec-latency=0
	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
	BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00
		DevCap:	MaxPayload 256 bytes, PhantFunc 7
			ExtTag+ RBE+
		DevCtl:	Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
			RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
		LnkCap:	Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <64ns, L1 <1us
			ClockPM- Surprise+ LLActRep+ BwNot- ASPMOptComp-
		LnkCtl:	ASPM Disabled; RCB 128 bytes Disabled- CommClk-
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
		RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
		RootCap: CRSVisible-
		RootSta: PME ReqID 0000, PMEStatus- PMEPending-
	Capabilities: [70] Power Management version 2
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [100 v1] Root Complex Link
		Desc:	PortNumber=02 ComponentID=01 EltType=Config
		Link0:	Desc:	TargetPort=00 TargetComponent=01 AssocRCRB+ LinkType=MemMapped LinkValid-
			Addr:	00000000e0007100
	Capabilities: [120 v1] Virtual Channel
		Caps:	LPEVC=0 RefClk=100ns PATEntryBits=1
		Arb:	Fixed+ WRR32- WRR64- WRR128-
		Ctrl:	ArbSelect=Fixed
		Status:	InProgress-
		VC0:	Caps:	PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
			Arb:	Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
			Ctrl:	Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
			Status:	NegoPending+ InProgress-
	Capabilities: [150 v1] Vendor Specific Information: ID=0001 Rev=1 Len=02c <?>
	Capabilities: [200 v1] Vendor Specific Information: ID=0003 Rev=1 Len=088 <?>
	Kernel driver in use: pcieport

00:10.2 PCI bridge: PA Semi, Inc PWRficient PCI-Express Port (rev 11) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin C routed to IRQ 3
	Bus: primary=00, secondary=03, subordinate=03, sec-latency=0
	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
	BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00
		DevCap:	MaxPayload 256 bytes, PhantFunc 7
			ExtTag+ RBE+
		DevCtl:	Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
			RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
		LnkCap:	Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <64ns, L1 <1us
			ClockPM- Surprise+ LLActRep+ BwNot- ASPMOptComp-
		LnkCtl:	ASPM Disabled; RCB 128 bytes Disabled- CommClk-
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
		RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
		RootCap: CRSVisible-
		RootSta: PME ReqID 0000, PMEStatus- PMEPending-
	Capabilities: [70] Power Management version 2
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [100 v1] Root Complex Link
		Desc:	PortNumber=03 ComponentID=01 EltType=Config
		Link0:	Desc:	TargetPort=00 TargetComponent=01 AssocRCRB+ LinkType=MemMapped LinkValid-
			Addr:	00000000e0007100
	Capabilities: [120 v1] Virtual Channel
		Caps:	LPEVC=0 RefClk=100ns PATEntryBits=1
		Arb:	Fixed+ WRR32- WRR64- WRR128-
		Ctrl:	ArbSelect=Fixed
		Status:	InProgress-
		VC0:	Caps:	PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
			Arb:	Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
			Ctrl:	Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
			Status:	NegoPending+ InProgress-
		VC1:	Caps:	PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
			Arb:	Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
			Ctrl:	Enable- ID=0 ArbSelect=Fixed TC/VC=00
			Status:	NegoPending- InProgress-
	Capabilities: [150 v1] Vendor Specific Information: ID=0001 Rev=1 Len=02c <?>
	Capabilities: [200 v1] Vendor Specific Information: ID=0003 Rev=1 Len=088 <?>
	Kernel driver in use: pcieport

00:10.3 PCI bridge: PA Semi, Inc PWRficient PCI-Express Port (rev 11) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin B routed to IRQ 2
	Bus: primary=00, secondary=04, subordinate=04, sec-latency=0
	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
	BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00
		DevCap:	MaxPayload 256 bytes, PhantFunc 7
			ExtTag+ RBE+
		DevCtl:	Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
			RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
		LnkCap:	Port #3, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <64ns, L1 <1us
			ClockPM- Surprise+ LLActRep+ BwNot- ASPMOptComp-
		LnkCtl:	ASPM Disabled; RCB 128 bytes Disabled- CommClk-
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
		RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
		RootCap: CRSVisible-
		RootSta: PME ReqID 0000, PMEStatus- PMEPending-
	Capabilities: [70] Power Management version 2
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [100 v1] Root Complex Link
		Desc:	PortNumber=04 ComponentID=01 EltType=Config
		Link0:	Desc:	TargetPort=00 TargetComponent=01 AssocRCRB+ LinkType=MemMapped LinkValid-
			Addr:	00000000e0007100
	Capabilities: [120 v1] Virtual Channel
		Caps:	LPEVC=0 RefClk=100ns PATEntryBits=1
		Arb:	Fixed+ WRR32- WRR64- WRR128-
		Ctrl:	ArbSelect=Fixed
		Status:	InProgress-
		VC0:	Caps:	PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
			Arb:	Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
			Ctrl:	Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
			Status:	NegoPending+ InProgress-
	Capabilities: [150 v1] Vendor Specific Information: ID=0001 Rev=1 Len=02c <?>
	Capabilities: [200 v1] Vendor Specific Information: ID=0003 Rev=1 Len=088 <?>
	Kernel driver in use: pcieport

00:11.0 PCI bridge: PA Semi, Inc PWRficient PCI-Express Port (rev 11) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 1
	Bus: primary=00, secondary=05, subordinate=06, sec-latency=0
	I/O behind bridge: 00000000-00003fff
	Memory behind bridge: a0100000-a03fffff
	Prefetchable memory behind bridge: 0000080000200000-00000800003fffff
	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
	BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
		DevCap:	MaxPayload 256 bytes, PhantFunc 7
			ExtTag+ RBE+
		DevCtl:	Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
			RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
		LnkCap:	Port #4, Speed 2.5GT/s, Width x4, ASPM L0s L1, Exit Latency L0s <64ns, L1 <1us
			ClockPM- Surprise+ LLActRep+ BwNot- ASPMOptComp-
		LnkCtl:	ASPM Disabled; RCB 128 bytes Disabled- CommClk-
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk- DLActive+ BWMgmt- ABWMgmt-
		SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise-
			Slot #0, PowerLimit 0.000W; Interlock- NoCompl-
		SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
			Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
		SltSta:	Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
			Changed: MRL- PresDet- LinkState+
		RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
		RootCap: CRSVisible-
		RootSta: PME ReqID 0000, PMEStatus- PMEPending-
	Capabilities: [70] Power Management version 2
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [100 v1] Root Complex Link
		Desc:	PortNumber=05 ComponentID=01 EltType=Config
		Link0:	Desc:	TargetPort=00 TargetComponent=01 AssocRCRB+ LinkType=MemMapped LinkValid-
			Addr:	00000000e0007100
	Capabilities: [120 v1] Virtual Channel
		Caps:	LPEVC=0 RefClk=100ns PATEntryBits=1
		Arb:	Fixed+ WRR32- WRR64- WRR128-
		Ctrl:	ArbSelect=Fixed
		Status:	InProgress-
		VC0:	Caps:	PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
			Arb:	Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
			Ctrl:	Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
			Status:	NegoPending- InProgress-
	Capabilities: [150 v1] Vendor Specific Information: ID=0001 Rev=1 Len=02c <?>
	Capabilities: [200 v1] Vendor Specific Information: ID=0003 Rev=1 Len=088 <?>
	Kernel driver in use: pcieport

00:11.1 PCI bridge: PA Semi, Inc PWRficient PCI-Express Port (rev 11) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin D routed to IRQ 4
	Bus: primary=00, secondary=07, subordinate=07, sec-latency=0
	I/O behind bridge: 00004000-00004fff
	Memory behind bridge: 80000000-801fffff
	Prefetchable memory behind bridge: 0000080000400000-00000800005fffff
	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
	BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
		DevCap:	MaxPayload 256 bytes, PhantFunc 7
			ExtTag+ RBE+
		DevCtl:	Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
			RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
		LnkCap:	Port #5, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <64ns, L1 <1us
			ClockPM- Surprise+ LLActRep+ BwNot- ASPMOptComp-
		LnkCtl:	ASPM Disabled; RCB 128 bytes Disabled- CommClk-
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
		SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise-
			Slot #0, PowerLimit 0.000W; Interlock- NoCompl-
		SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
			Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
		SltSta:	Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
			Changed: MRL- PresDet- LinkState-
		RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
		RootCap: CRSVisible-
		RootSta: PME ReqID 0000, PMEStatus- PMEPending-
	Capabilities: [70] Power Management version 2
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [100 v1] Root Complex Link
		Desc:	PortNumber=06 ComponentID=01 EltType=Config
		Link0:	Desc:	TargetPort=00 TargetComponent=01 AssocRCRB+ LinkType=MemMapped LinkValid-
			Addr:	00000000e0007100
	Capabilities: [120 v1] Virtual Channel
		Caps:	LPEVC=0 RefClk=100ns PATEntryBits=1
		Arb:	Fixed+ WRR32- WRR64- WRR128-
		Ctrl:	ArbSelect=Fixed
		Status:	InProgress-
		VC0:	Caps:	PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
			Arb:	Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
			Ctrl:	Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
			Status:	NegoPending+ InProgress-
	Capabilities: [150 v1] Vendor Specific Information: ID=0001 Rev=1 Len=02c <?>
	Capabilities: [200 v1] Vendor Specific Information: ID=0003 Rev=1 Len=088 <?>
	Kernel driver in use: pcieport

00:11.2 PCI bridge: PA Semi, Inc PWRficient PCI-Express Port (rev 11) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin C routed to IRQ 3
	Bus: primary=00, secondary=08, subordinate=08, sec-latency=0
	I/O behind bridge: 00005000-00005fff
	Memory behind bridge: 80200000-803fffff
	Prefetchable memory behind bridge: 0000080000600000-00000800007fffff
	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
	BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
		DevCap:	MaxPayload 256 bytes, PhantFunc 7
			ExtTag+ RBE+
		DevCtl:	Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
			RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
		LnkCap:	Port #6, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <64ns, L1 <1us
			ClockPM- Surprise+ LLActRep+ BwNot- ASPMOptComp-
		LnkCtl:	ASPM Disabled; RCB 128 bytes Disabled- CommClk-
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
		SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise-
			Slot #0, PowerLimit 0.000W; Interlock- NoCompl-
		SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
			Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
		SltSta:	Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
			Changed: MRL- PresDet- LinkState-
		RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
		RootCap: CRSVisible-
		RootSta: PME ReqID 0000, PMEStatus- PMEPending-
	Capabilities: [70] Power Management version 2
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [100 v1] Root Complex Link
		Desc:	PortNumber=07 ComponentID=01 EltType=Config
		Link0:	Desc:	TargetPort=00 TargetComponent=01 AssocRCRB+ LinkType=MemMapped LinkValid-
			Addr:	00000000e0007100
	Capabilities: [120 v1] Virtual Channel
		Caps:	LPEVC=0 RefClk=100ns PATEntryBits=1
		Arb:	Fixed+ WRR32- WRR64- WRR128-
		Ctrl:	ArbSelect=Fixed
		Status:	InProgress-
		VC0:	Caps:	PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
			Arb:	Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
			Ctrl:	Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
			Status:	NegoPending+ InProgress-
	Capabilities: [150 v1] Vendor Specific Information: ID=0001 Rev=1 Len=02c <?>
	Capabilities: [200 v1] Vendor Specific Information: ID=0003 Rev=1 Len=088 <?>
	Kernel driver in use: pcieport

00:11.3 PCI bridge: PA Semi, Inc PWRficient PCI-Express Port (rev 11) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin B routed to IRQ 2
	Bus: primary=00, secondary=09, subordinate=09, sec-latency=0
	I/O behind bridge: 00006000-00006fff
	Memory behind bridge: 80400000-805fffff
	Prefetchable memory behind bridge: 0000080000800000-00000800009fffff
	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
	BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
		DevCap:	MaxPayload 256 bytes, PhantFunc 7
			ExtTag+ RBE+
		DevCtl:	Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
			RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
		LnkCap:	Port #7, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <64ns, L1 <1us
			ClockPM- Surprise+ LLActRep+ BwNot- ASPMOptComp-
		LnkCtl:	ASPM Disabled; RCB 128 bytes Disabled- CommClk-
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
		SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise-
			Slot #0, PowerLimit 0.000W; Interlock- NoCompl-
		SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
			Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
		SltSta:	Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
			Changed: MRL- PresDet- LinkState-
		RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
		RootCap: CRSVisible-
		RootSta: PME ReqID 0000, PMEStatus- PMEPending-
	Capabilities: [70] Power Management version 2
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [100 v1] Root Complex Link
		Desc:	PortNumber=08 ComponentID=01 EltType=Config
		Link0:	Desc:	TargetPort=00 TargetComponent=01 AssocRCRB+ LinkType=MemMapped LinkValid-
			Addr:	00000000e0007100
	Capabilities: [120 v1] Virtual Channel
		Caps:	LPEVC=0 RefClk=100ns PATEntryBits=1
		Arb:	Fixed+ WRR32- WRR64- WRR128-
		Ctrl:	ArbSelect=Fixed
		Status:	InProgress-
		VC0:	Caps:	PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
			Arb:	Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
			Ctrl:	Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
			Status:	NegoPending+ InProgress-
	Capabilities: [150 v1] Vendor Specific Information: ID=0001 Rev=1 Len=02c <?>
	Capabilities: [200 v1] Vendor Specific Information: ID=0003 Rev=1 Len=088 <?>
	Kernel driver in use: pcieport

00:14.0 Ethernet controller: PA Semi, Inc PWRficient Gigabit Ethernet (rev 11)
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 1

00:14.1 Ethernet controller: PA Semi, Inc PWRficient Gigabit Ethernet (rev 11)
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 1

00:14.2 Ethernet controller: PA Semi, Inc PWRficient Gigabit Ethernet (rev 11)
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 1

00:14.3 Ethernet controller: PA Semi, Inc PWRficient Gigabit Ethernet (rev 11)
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 67
	Kernel driver in use: pasemi_mac

00:15.0 Ethernet controller: PA Semi, Inc PWRficient 10-Gigabit Ethernet (rev 11)
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 68

00:15.1 Ethernet controller: PA Semi, Inc PWRficient 10-Gigabit Ethernet (rev 11)
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 1

00:1a.0 DMA controller: PA Semi, Inc PWRficient DMA Controller (rev 12) (prog-if ff)
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 128
	Capabilities: [40] Vendor Specific Information: Len=50 <?>

00:1b.0 System peripheral: PA Semi, Inc PWRficient SERDES (rev 11)
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Capabilities: [40] Vendor Specific Information: Len=18 <?>

00:1c.0 SMBus: PA Semi, Inc PWRficient SMBus Controller (rev 01)
	Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 70
	Region 0: I/O ports at 7f0200 [size=64]
	Kernel driver in use: i2c-pasemi

00:1c.1 SMBus: PA Semi, Inc PWRficient SMBus Controller (rev 01)
	Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 71
	Region 0: I/O ports at 7f0240 [size=64]
	Kernel driver in use: i2c-pasemi

00:1c.2 SMBus: PA Semi, Inc PWRficient SMBus Controller (rev 01)
	Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 72
	Region 0: I/O ports at 7f0280 [size=64]
	Kernel driver in use: i2c-pasemi

00:1d.0 Serial controller: PA Semi, Inc PWRficient 16550 UART (rev 02) (prog-if 03 [16650])
	Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 73
	Region 0: I/O ports at 7f03f8 [size=8]
	Kernel driver in use: serial

00:1d.1 Serial controller: PA Semi, Inc PWRficient 16550 UART (rev 02) (prog-if 03 [16650])
	Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 74
	Region 0: I/O ports at 7f02f8 [size=8]
	Kernel driver in use: serial

00:1e.0 ISA bridge: PA Semi, Inc PWRficient LPC/Localbus Interface (rev 12) (prog-if ff)
	Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 81
	Region 0: I/O ports at 7f0400 [size=256]
	Region 1: I/O ports at 7f0500 [size=256]

01:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Barts XT [Radeon HD 6870] (prog-if 00 [VGA controller])
	Subsystem: XFX Pine Group Inc. Device 3107
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 48
	Region 0: Memory at 90000000 (64-bit, prefetchable) [size=256M]
	Region 2: Memory at a0020000 (64-bit, non-prefetchable) [size=128K]
	Region 4: I/O ports at 2000 [size=256]
	Expansion ROM at a0000000 [disabled] [size=128K]
	Capabilities: [50] Power Management version 3
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [58] Express (v2) Legacy Endpoint, MSI 00
		DevCap:	MaxPayload 256 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited
			ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
		DevCtl:	Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
			RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
		LnkCap:	Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Exit Latency L0s <64ns, L1 <1us
			ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
		LnkCtl:	ASPM Disabled; RCB 64 bytes Disabled- CommClk-
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
		DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
		LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
			 Compliance De-emphasis: -6dB
		LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
			 EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
	Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+
		Address: 00000000fc080000  Data: 0000
	Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?>
	Capabilities: [150 v1] Advanced Error Reporting
		UESta:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
		UEMsk:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
		UESvrt:	DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
		CESta:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
		CEMsk:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
		AERCap:	First Error Pointer: 14, GenCap+ CGenEn- ChkCap+ ChkEn-
	Kernel driver in use: radeon

01:00.1 Audio device: Advanced Micro Devices, Inc. [AMD/ATI] Barts HDMI Audio [Radeon HD 6800 Series]
	Subsystem: XFX Pine Group Inc. Device aa88
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin B routed to IRQ 49
	Region 0: Memory at a0040000 (64-bit, non-prefetchable) [size=16K]
	Capabilities: [50] Power Management version 3
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [58] Express (v2) Legacy Endpoint, MSI 00
		DevCap:	MaxPayload 256 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited
			ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
		DevCtl:	Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
			RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
		LnkCap:	Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Exit Latency L0s <64ns, L1 <1us
			ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
		LnkCtl:	ASPM Disabled; RCB 64 bytes Disabled- CommClk-
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
		DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
		LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
			 EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
	Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+
		Address: 00000000fc080000  Data: 0001
	Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?>
	Capabilities: [150 v1] Advanced Error Reporting
		UESta:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
		UEMsk:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
		UESvrt:	DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
		CESta:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
		CEMsk:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
		AERCap:	First Error Pointer: 14, GenCap+ CGenEn- ChkCap+ ChkEn-
	Kernel driver in use: snd_hda_intel

05:12.0 SATA controller: Advanced Micro Devices, Inc. [AMD/ATI] SB600 Non-Raid-5 SATA (prog-if 01 [AHCI 1.0])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 248, Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 9
	Region 0: I/O ports at 1040 [size=8]
	Region 1: I/O ports at 105c [size=4]
	Region 2: I/O ports at 1048 [size=8]
	Region 3: I/O ports at 1058 [size=4]
	Region 4: I/O ports at 1010 [size=16]
	Region 5: Memory at a0209400 (32-bit, non-prefetchable) [size=1K]
	Capabilities: [60] Power Management version 2
		Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [70] SATA HBA v1.0 InCfgSpace
	Kernel driver in use: ahci

05:13.0 USB controller: Advanced Micro Devices, Inc. [AMD/ATI] SB600 USB (OHCI0) (prog-if 10 [OHCI])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 252, Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 9
	Region 0: Memory at a0208000 (32-bit, non-prefetchable) [size=4K]
	Kernel driver in use: ohci-pci

05:13.1 USB controller: Advanced Micro Devices, Inc. [AMD/ATI] SB600 USB (OHCI1) (prog-if 10 [OHCI])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 252, Cache Line Size: 64 bytes
	Interrupt: pin B routed to IRQ 10
	Region 0: Memory at a0207000 (32-bit, non-prefetchable) [size=4K]
	Kernel driver in use: ohci-pci

05:13.2 USB controller: Advanced Micro Devices, Inc. [AMD/ATI] SB600 USB (OHCI2) (prog-if 10 [OHCI])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 252, Cache Line Size: 64 bytes
	Interrupt: pin C routed to IRQ 11
	Region 0: Memory at a0206000 (32-bit, non-prefetchable) [size=4K]
	Kernel driver in use: ohci-pci

05:13.3 USB controller: Advanced Micro Devices, Inc. [AMD/ATI] SB600 USB (OHCI3) (prog-if 10 [OHCI])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 252, Cache Line Size: 64 bytes
	Interrupt: pin B routed to IRQ 10
	Region 0: Memory at a0204000 (32-bit, non-prefetchable) [size=4K]
	Kernel driver in use: ohci-pci

05:13.4 USB controller: Advanced Micro Devices, Inc. [AMD/ATI] SB600 USB (OHCI4) (prog-if 10 [OHCI])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 252, Cache Line Size: 64 bytes
	Interrupt: pin C routed to IRQ 11
	Region 0: Memory at a0205000 (32-bit, non-prefetchable) [size=4K]
	Kernel driver in use: ohci-pci

05:13.5 USB controller: Advanced Micro Devices, Inc. [AMD/ATI] SB600 USB Controller (EHCI) (prog-if 20 [EHCI])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 252, Cache Line Size: 64 bytes
	Interrupt: pin D routed to IRQ 12
	Region 0: Memory at a0209800 (32-bit, non-prefetchable) [size=256]
	Capabilities: [c0] Power Management version 2
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
		Bridge: PM- B3+
	Capabilities: [e4] Debug port: BAR=1 offset=00e0
	Kernel driver in use: ehci-pci

05:14.0 SMBus: Advanced Micro Devices, Inc. [AMD/ATI] SBx00 SMBus Controller (rev 14)
	Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
	Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Region 0: I/O ports at 1020 [size=16]
	Region 1: Memory at a0209000 (32-bit, non-prefetchable) [size=1K]

05:14.1 IDE interface: Advanced Micro Devices, Inc. [AMD/ATI] SB600 IDE (prog-if 83 [Master PriP PriO])
	Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 248, Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 9
	Region 0: I/O ports at 1030 [size=8]
	Region 1: I/O ports at 1054 [size=4]
	Region 2: I/O ports at 0170 [size=8]
	Region 3: I/O ports at 0374
	Region 4: I/O ports at 1000 [size=16]
	Kernel driver in use: pata_atiixp

05:14.2 Audio device: Advanced Micro Devices, Inc. [AMD/ATI] SBx00 Azalia (Intel HDA)
	Subsystem: Varisys Ltd Device 1000
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 240, Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 9
	Region 0: Memory at a0200000 (64-bit, non-prefetchable) [size=16K]
	Capabilities: [50] Power Management version 2
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Kernel driver in use: snd_hda_intel

05:14.3 ISA bridge: Advanced Micro Devices, Inc. [AMD/ATI] SB600 PCI to LPC Bridge
	Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0

05:14.4 PCI bridge: Advanced Micro Devices, Inc. [AMD/ATI] SBx00 PCI to PCI Bridge (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 255
	Bus: primary=05, secondary=06, subordinate=06, sec-latency=0
	I/O behind bridge: 00003000-00003fff
	Memory behind bridge: a0300000-a03fffff
	Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
	BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

06:05.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8100/8101L/8139 PCI Fast Ethernet Adapter (rev 10)
	Subsystem: Realtek Semiconductor Co., Ltd. RTL-8100/8101L/8139 PCI Fast Ethernet Adapter
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 255 (8000ns min, 16000ns max)
	Interrupt: pin A routed to IRQ 4
	Region 0: I/O ports at 3000 [size=256]
	Region 1: Memory at a0310000 (32-bit, non-prefetchable) [size=256]
	Expansion ROM at a0300000 [disabled] [size=64K]
	Capabilities: [50] Power Management version 2
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1+,D2+,D3hot+,D3cold-)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Kernel driver in use: 8139too

Re: [PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Bjorn Helgaas]

On Thu, Nov 30, 2017 at 12:39:36AM +0100, Christian Zigotzky wrote:
> On 29 November 2017 at 11:34PM, Bjorn Helgaas wrote:
> > On Wed, Nov 29, 2017 at 2:45 PM, Christian Zigotzky
> >> Thank you for your answer. I have tried to boot the kernel 4.15
> >> RC1 (built without the patch above) with the boot argument
> >> "pci=pcie_scan_all" but without any success.
> >>
> >> Just for info:
> >>
> >> The CPU is a PA Semi “PWRficient” PA6T-1682M. This device
> >> combines dual 1.8GHz PowerPC cores with a 2MB L2 cache, dual
> >> channel DDR2 memory controllers and 24 SerDes channels. The
> >> PowerPC cores adhere to the Power ISA v2.04, and support 64-bit
> >> extensions. They feature a double precision FPU and a VMX
> >> (AltiVec) vector unit. They each have a 64kB I-cache and a 64kB
> >> D-cache.  The SerDes channels support PCI Express, XAUI and SGMII
> >> protocols. The “ENVOI” I/O subsystem which drives them includes
> >> caching, offload and DMA resources to maximise I/O performance.

> >> Nemo uses the AMD/ATI SB600 South Bridge to provide various
> >> integrated I/O functions including SATA/PATA ports, USB and
> >> audio. The SB600 connects to the CPU via a PCIe x4 link. This is
> >> termed an “A-link II Express” link by ATI/AMD. The design team
> >> determined early in the development of Nemo that the link’s
> >> behaviour as an endpoint does not comply fully with the PCI
> >> Express specification. Specifically, it requires the root complex
> >> to use non-zero device numbers in type 0 configuration cycles to
> >> enumerate all the devices within the SB600. This is related to
> >> the PC architecture and is used to allow SB600 devices appear on
> >> logical bus 0.
> >>
> >> More information about the Nemo board:
> >>
> >> https://en.wikipedia.org/wiki/AmigaOne_X1000
> >> http://www.a-eon.com/?page=x1000
> >> http://www.amigaos.net/hardware/35/amigaone-x1000

> > It looks like the SB600 devices actually appear on bus 05 (not 00),
> > right?  I see these devices (among others):
> >
> >   00:10.0 PCI bridge: PA Semi, Inc PWRficient PCI-Express Port
> >   00:11.0 PCI bridge: PA Semi, Inc PWRficient PCI-Express Port
> >   01:00.0 VGA compatible controller: [AMD/ATI] Barts XT [Radeon HD 6870]
> >   05:12.0 SATA controller: [AMD/ATI] SB600 Non-Raid-5 SATA
> >   05:14.4 PCI bridge: [AMD/ATI] SBx00 PCI to PCI Bridge
> >   06:05.0 Ethernet controller: RTL-8100/8101L/8139
> >
> > So 00:10.0 and 00:11.0 are bridges leading to buses 01 and 05-06.
> > Maybe 00:11.0 is the Downstream Port that leads to this magic "A-Link
> > II Express" thing?
> >
> > But I don't think all those SB600 devices on bus 05 are PCIe devices.
> > It would certainly be unconventional to have a PCIe device (00:11.0)
> > at the upstream end of a link and conventional PCI devices (05:12.0,
> > 05:13.0, 05:13.1, etc) at the downstream end, with no visible PCIe
> > port.
> >
> > The usual thing would be that 00:11.0 would be a Root Port or a Switch
> > Downstream Port leading to a Link, and the other end of the Link would
> > terminate in either a Switch Upstream Port or an Upstream Port
> > embedded in an Endpoint.
> >
> > We'll have to think about how to handle this.  But the complete "lspci
> > -vv" output as root will have more useful information.
> 
> Thanks for your reply. Please find attached the complete "lspci -vv"
> output as root.

00:11.0 claims to be a PCIe Root Port leading to [bus 05-06].  That
means there's a Link (presumably this A-Link II Express thing), and the
downstream end of the Link *should* be a PCIe Upstream Port on bus 05,
but no such device is visible.  I suppose the SB600 does implement
some sort of PCIe Port there, but keeps it invisible to software, and
at the same time, contains an invisible bridge that connects the Link
to all the conventional PCI devices on bus 05.

When we scan bus 05, we do this:

  pci_scan_child_bus_extend(bus=05)
    for (devfn = 0; devfn < 0x100; devfn += 8)
      pci_scan_slot(05, 00.0)
        pci_scan_single_device
          pci_scan_device(05, 00.0)           # fails; no 05:00.0
      pci_scan_slot(05, 01.0)
        only_one_child(bus=05)
          parent = 00:11.0
          pci_pcie_type(00:11.0) == ROOT_PORT # returns true

Since only_one_child() sees that 00:11.0 is a Root Port, we give up
before we even get to the PCI_SCAN_ALL_PCIE_DEVS test.

I *think* something like the patch below should make this work if you
use the "pci=pcie_scan_all" parameter.  We have some x86 DMI quirks
that set PCI_SCAN_ALL_PCIE_DEVS automatically.  I don't know how to do
something similar on powerpc, but maybe you do?


commit 75eaf674066590e79b3e03d32488871fc881ab40
Author: Bjorn Helgaas <bhelgaas@google.com>
Date:   Thu Nov 30 15:22:39 2017 -0600

    PCI: Make PCI_SCAN_ALL_PCIE_DEVS work for Root Ports as well as Downstream
    
    Previously PCI_SCAN_ALL_PCIE_DEVS (set by quirks or the "pci=pcie_scan_all"
    kernel parameter) only affected Switch Downstream Ports, not Root Ports.
    
    Simplify and restructure only_one_child() so PCI_SCAN_ALL_PCIE_DEVS means
    we scan for all possible devices below Root Ports as well as Switch
    Downstream Ports.
    
    Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 14e0ea1ff38b..9e57d4ef0c1f 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -2217,20 +2217,28 @@ static int only_one_child(struct pci_bus *bus)
 {
 	struct pci_dev *parent = bus->self;
 
-	if (!parent || !pci_is_pcie(parent))
+	if (!parent)
+		return 0;
+
+	/*
+	 * Systems with unusual topologies set PCI_SCAN_ALL_PCIE_DEVS so
+	 * we scan for all possible devices, not just Device 0.
+	 */
+	if (pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))
 		return 0;
-	if (pci_pcie_type(parent) == PCI_EXP_TYPE_ROOT_PORT)
-		return 1;
 
 	/*
-	 * PCIe downstream ports are bridges that normally lead to only a
-	 * device 0, but if PCI_SCAN_ALL_PCIE_DEVS is set, scan all
-	 * possible devices, not just device 0.  See PCIe spec r3.0,
-	 * sec 7.3.1.
+	 * A PCIe Downstream Port normally leads to a Link with only Device
+	 * 0 on it (PCIe spec r3.1, sec 7.3.1).  As an optimization, scan
+	 * only for Device 0 in that situation.
+	 *
+	 * Checking has_secondary_link is a hack to identify Downstream
+	 * Ports because sometimes Switches are configured such that the
+	 * PCIe Port Type labels are backwards.
 	 */
-	if (parent->has_secondary_link &&
-	    !pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))
+	if (pci_is_pcie(parent) && parent->has_secondary_link)
 		return 1;
+
 	return 0;
 }
 

[PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Christian Zigotzky]

[-- Attachment #1: Type: text/plain, Size: 1666 bytes --]

On 30.11.2017 23:42, Bjorn Helgaas wrote:
 >
 > 00:11.0 claims to be a PCIe Root Port leading to [bus 05-06]. That
 > means there's a Link (presumably this A-Link II Express thing), and the
 > downstream end of the Link *should* be a PCIe Upstream Port on bus 05,
 > but no such device is visible.  I suppose the SB600 does implement
 > some sort of PCIe Port there, but keeps it invisible to software, and
 > at the same time, contains an invisible bridge that connects the Link
 > to all the conventional PCI devices on bus 05.
 >
 > When we scan bus 05, we do this:
 >
 >   pci_scan_child_bus_extend(bus=05)
 >     for (devfn = 0; devfn < 0x100; devfn += 8)
 >       pci_scan_slot(05, 00.0)
 >         pci_scan_single_device
 >           pci_scan_device(05, 00.0)           # fails; no 05:00.0
 >       pci_scan_slot(05, 01.0)
 >         only_one_child(bus=05)
 >           parent = 00:11.0
 >           pci_pcie_type(00:11.0) == ROOT_PORT # returns true
 >
 > Since only_one_child() sees that 00:11.0 is a Root Port, we give up
 > before we even get to the PCI_SCAN_ALL_PCIE_DEVS test.
 >
 > I *think* something like the patch below should make this work if you
 > use the "pci=pcie_scan_all" parameter.  We have some x86 DMI quirks
 > that set PCI_SCAN_ALL_PCIE_DEVS automatically.  I don't know how to do
 > something similar on powerpc, but maybe you do?
 >

Hi Bjorn,

I tested your new patch today. It boots with the boot argument 
"pci=pcie_scan_all". Well done! :-)

It doesn't boot without the boot argument "pci=pcie_scan_all".

Many thanks for your help.

Cheers,
Christian


[-- Attachment #2: probe.c.patch --]
[-- Type: text/x-patch, Size: 1952 bytes --]

commit 75eaf674066590e79b3e03d32488871fc881ab40
Author: Bjorn Helgaas <bhelgaas@google.com>
Date:   Thu Nov 30 15:22:39 2017 -0600

    PCI: Make PCI_SCAN_ALL_PCIE_DEVS work for Root Ports as well as Downstream
    
    Previously PCI_SCAN_ALL_PCIE_DEVS (set by quirks or the "pci=pcie_scan_all"
    kernel parameter) only affected Switch Downstream Ports, not Root Ports.
    
    Simplify and restructure only_one_child() so PCI_SCAN_ALL_PCIE_DEVS means
    we scan for all possible devices below Root Ports as well as Switch
    Downstream Ports.
    
    Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 14e0ea1ff38b..9e57d4ef0c1f 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -2217,20 +2217,28 @@ static int only_one_child(struct pci_bus *bus)
 {
 	struct pci_dev *parent = bus->self;
 
-	if (!parent || !pci_is_pcie(parent))
+	if (!parent)
+		return 0;
+
+	/*
+	 * Systems with unusual topologies set PCI_SCAN_ALL_PCIE_DEVS so
+	 * we scan for all possible devices, not just Device 0.
+	 */
+	if (pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))
 		return 0;
-	if (pci_pcie_type(parent) == PCI_EXP_TYPE_ROOT_PORT)
-		return 1;
 
 	/*
-	 * PCIe downstream ports are bridges that normally lead to only a
-	 * device 0, but if PCI_SCAN_ALL_PCIE_DEVS is set, scan all
-	 * possible devices, not just device 0.  See PCIe spec r3.0,
-	 * sec 7.3.1.
+	 * A PCIe Downstream Port normally leads to a Link with only Device
+	 * 0 on it (PCIe spec r3.1, sec 7.3.1).  As an optimization, scan
+	 * only for Device 0 in that situation.
+	 *
+	 * Checking has_secondary_link is a hack to identify Downstream
+	 * Ports because sometimes Switches are configured such that the
+	 * PCIe Port Type labels are backwards.
 	 */
-	if (parent->has_secondary_link &&
-	    !pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))
+	if (pci_is_pcie(parent) && parent->has_secondary_link)
 		return 1;
+
 	return 0;
 }

Re: [PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Bjorn Helgaas]

On Fri, Dec 01, 2017 at 11:08:46PM +0100, Christian Zigotzky wrote:
> On 30.11.2017 23:42, Bjorn Helgaas wrote:
> >
> > 00:11.0 claims to be a PCIe Root Port leading to [bus 05-06]. That
> > means there's a Link (presumably this A-Link II Express thing), and the
> > downstream end of the Link *should* be a PCIe Upstream Port on bus 05,
> > but no such device is visible.  I suppose the SB600 does implement
> > some sort of PCIe Port there, but keeps it invisible to software, and
> > at the same time, contains an invisible bridge that connects the Link
> > to all the conventional PCI devices on bus 05.
> >
> > When we scan bus 05, we do this:
> >
> >   pci_scan_child_bus_extend(bus=05)
> >     for (devfn = 0; devfn < 0x100; devfn += 8)
> >       pci_scan_slot(05, 00.0)
> >         pci_scan_single_device
> >           pci_scan_device(05, 00.0)           # fails; no 05:00.0
> >       pci_scan_slot(05, 01.0)
> >         only_one_child(bus=05)
> >           parent = 00:11.0
> >           pci_pcie_type(00:11.0) == ROOT_PORT # returns true
> >
> > Since only_one_child() sees that 00:11.0 is a Root Port, we give up
> > before we even get to the PCI_SCAN_ALL_PCIE_DEVS test.
> >
> > I *think* something like the patch below should make this work if you
> > use the "pci=pcie_scan_all" parameter.  We have some x86 DMI quirks
> > that set PCI_SCAN_ALL_PCIE_DEVS automatically.  I don't know how to do
> > something similar on powerpc, but maybe you do?
> >
> 
> Hi Bjorn,
> 
> I tested your new patch today. It boots with the boot argument
> "pci=pcie_scan_all". Well done! :-)
> 
> It doesn't boot without the boot argument "pci=pcie_scan_all".

Thanks for testing that.  I'll merge a similar patch for v4.16.

I don't think using "pci=pcie_scan_all" is really an acceptable
long-term answer for you, though.  Is there some way we can identify
at run-time whether we're on a Nemo system?  If so, we can make this
happen automatically.

Bjorn

[PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Christian Zigotzky]

On 02 December 2017 at 00:27AM, Bjorn Helgaas wrote:
>
> Thanks for testing that.  I'll merge a similar patch for v4.16.
>
> I don't think using "pci=pcie_scan_all" is really an acceptable
> long-term answer for you, though.  Is there some way we can identify
> at run-time whether we're on a Nemo system?  If so, we can make this
> happen automatically.
>
> Bjorn
>
Hi Bjorn,

Many thanks for your effort! I appreciate it very much. :-)

We can identify the Nemo board at the boot time. See dmesg output: [    
0.061592] NEMO SB600 IOB base e0000000

@linuxppc-dev
Any other ideas? Maybe the same as we can identify the other P.A. Semi 
boards (Electra, Chitra, and Athena).

@Olof
Maybe you know how we can identify the P.A. Semi Nemo board at the run-time.

@Darren
Do you have an idea?

Thanks to all for your help.

Cheers,
Christian

Re: [PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Olof Johansson]

On Sat, Dec 02, 2017 at 01:54:41PM +0100, Christian Zigotzky wrote:
> On 02 December 2017 at 00:27AM, Bjorn Helgaas wrote:
> > 
> > Thanks for testing that.  I'll merge a similar patch for v4.16.
> > 
> > I don't think using "pci=pcie_scan_all" is really an acceptable
> > long-term answer for you, though.  Is there some way we can identify
> > at run-time whether we're on a Nemo system?  If so, we can make this
> > happen automatically.
> > 
> > Bjorn
> > 
> Hi Bjorn,
> 
> Many thanks for your effort! I appreciate it very much. :-)
> 
> We can identify the Nemo board at the boot time. See dmesg output: [   
> 0.061592] NEMO SB600 IOB base e0000000
> 
> @linuxppc-dev
> Any other ideas? Maybe the same as we can identify the other P.A. Semi
> boards (Electra, Chitra, and Athena).
> 
> @Olof
> Maybe you know how we can identify the P.A. Semi Nemo board at the run-time.
> 
> @Darren
> Do you have an idea?


The below patch, together with Bjorn's, should do it. Christian, can you test
and report back?

I'm guessing it won't do any harm to set this on non-X1000 platforms. My
test system is currently powered down so I can't check.


>From a3b390277627b0342c8ccfc16e58679e0d8abdde Mon Sep 17 00:00:00 2001
From: Olof Johansson <olof@lixom.net>
Date: Sat, 2 Dec 2017 14:56:36 -0800
Subject: [PATCH] powerpc/pasemi: set PCI_SCAN_ALL_PCI_DEVS

Needed on Amiga X1000 with SB600.

Reported-by: Christian Zigotzky <chzigotzky@xenosoft.de>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
---
 arch/powerpc/platforms/pasemi/pci.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
index 5ff6108..ea54ed2 100644
--- a/arch/powerpc/platforms/pasemi/pci.c
+++ b/arch/powerpc/platforms/pasemi/pci.c
@@ -224,6 +224,8 @@ void __init pas_pci_init(void)
 		return;
 	}
 
+	pci_set_flag(PCI_SCAN_ALL_PCIE_DEVS):
+
 	for (np = NULL; (np = of_get_next_child(root, np)) != NULL;)
 		if (np->name && !strcmp(np->name, "pxp") && !pas_add_bridge(np))
 			of_node_get(np);
-- 
2.8.6

Re: [PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Olof Johansson]

On Sat, Dec 2, 2017 at 3:00 PM, Olof Johansson <olof@lixom.net> wrote:
> On Sat, Dec 02, 2017 at 01:54:41PM +0100, Christian Zigotzky wrote:
>> On 02 December 2017 at 00:27AM, Bjorn Helgaas wrote:
>> >
>> > Thanks for testing that.  I'll merge a similar patch for v4.16.
>> >
>> > I don't think using "pci=pcie_scan_all" is really an acceptable
>> > long-term answer for you, though.  Is there some way we can identify
>> > at run-time whether we're on a Nemo system?  If so, we can make this
>> > happen automatically.
>> >
>> > Bjorn
>> >
>> Hi Bjorn,
>>
>> Many thanks for your effort! I appreciate it very much. :-)
>>
>> We can identify the Nemo board at the boot time. See dmesg output: [
>> 0.061592] NEMO SB600 IOB base e0000000
>>
>> @linuxppc-dev
>> Any other ideas? Maybe the same as we can identify the other P.A. Semi
>> boards (Electra, Chitra, and Athena).
>>
>> @Olof
>> Maybe you know how we can identify the P.A. Semi Nemo board at the run-time.
>>
>> @Darren
>> Do you have an idea?
>
>
> The below patch, together with Bjorn's, should do it. Christian, can you test
> and report back?
>
> I'm guessing it won't do any harm to set this on non-X1000 platforms. My
> test system is currently powered down so I can't check.
>
>
> From a3b390277627b0342c8ccfc16e58679e0d8abdde Mon Sep 17 00:00:00 2001
> From: Olof Johansson <olof@lixom.net>
> Date: Sat, 2 Dec 2017 14:56:36 -0800
> Subject: [PATCH] powerpc/pasemi: set PCI_SCAN_ALL_PCI_DEVS
>
> Needed on Amiga X1000 with SB600.
>
> Reported-by: Christian Zigotzky <chzigotzky@xenosoft.de>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Signed-off-by: Olof Johansson <olof@lixom.net>
> ---
>  arch/powerpc/platforms/pasemi/pci.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
> index 5ff6108..ea54ed2 100644
> --- a/arch/powerpc/platforms/pasemi/pci.c
> +++ b/arch/powerpc/platforms/pasemi/pci.c
> @@ -224,6 +224,8 @@ void __init pas_pci_init(void)
>                 return;
>         }
>
> +       pci_set_flag(PCI_SCAN_ALL_PCIE_DEVS):

Typo, should be ';', not ':'. I obviously didn't even try compiling this. :)


-Olof

[PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Christian Zigotzky]

On 3. Dec 2017, at 00:02, Olof Johansson <olof@lixom.net> wrote:
>=20
>> On Sat, Dec 2, 2017 at 3:00 PM, Olof Johansson <olof@lixom.net> wrote:
>>=20
>> The below patch, together with Bjorn's, should do it. Christian, can you t=
est
>> and report back?
>>=20
>> I'm guessing it won't do any harm to set this on non-X1000 platforms. My
>> test system is currently powered down so I can't check.
>>=20
>>=20
>> =46rom a3b390277627b0342c8ccfc16e58679e0d8abdde Mon Sep 17 00:00:00 2001
>> From: Olof Johansson <olof@lixom.net>
>> Date: Sat, 2 Dec 2017 14:56:36 -0800
>> Subject: [PATCH] powerpc/pasemi: set PCI_SCAN_ALL_PCI_DEVS
>>=20
>> Needed on Amiga X1000 with SB600.
>>=20
>> Reported-by: Christian Zigotzky <chzigotzky@xenosoft.de>
>> Cc: Bjorn Helgaas <bhelgaas@google.com>
>> Signed-off-by: Olof Johansson <olof@lixom.net>
>> ---
>> arch/powerpc/platforms/pasemi/pci.c | 2 ++
>> 1 file changed, 2 insertions(+)
>>=20
>> diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms=
/pasemi/pci.c
>> index 5ff6108..ea54ed2 100644
>> --- a/arch/powerpc/platforms/pasemi/pci.c
>> +++ b/arch/powerpc/platforms/pasemi/pci.c
>> @@ -224,6 +224,8 @@ void __init pas_pci_init(void)
>>                return;
>>        }
>>=20
>> +       pci_set_flag(PCI_SCAN_ALL_PCIE_DEVS):
>=20
> Typo, should be ';', not ':'. I obviously didn't even try compiling this. :=
)
>=20
>=20
> -Olof

Hi Olof,

Thanks a lot for your patch! I will test it on Wednesday.

Cheers,
Christian=

Re: SB600 for the Nemo board has non-zero devices on non-root bus

[Darren Stevens]

Hello Bjorn

Firstly sorry for not being=A0able to join in this discussion, I have been
moving house and only got my X1000 set up again yesterday..

On 30/11/2017, Bjorn Helgaas wrote:
> I *think* something like the patch below should make this work if you
> use the "pci=3Dpcie_scan_all" parameter.  We have some x86 DMI quirks
> that set PCI_SCAN_ALL_PCIE_DEVS automatically.  I don't know how to do
> something similar on powerpc, but maybe you do?

Actually the root ports on the Nemo's PA6T processor don't respond to the
SB600 unless we turn on a special 'relax pci-e' bit in one of its control
registers. We use a small out of tree init routine to do this, and there
would be the ideal place to put a call to
pci_set_flag(PCI_SCAN_ALL_PCIE_DEVS).

This patch fixes the last major hurdle to getting the X1000 fully supporte=
d in
the linux kernel, so thanks very much for that.

Regards
Darren

SB600 for the Nemo board has non-zero devices on non-root bus

[Christian Zigotzky]

[-- Attachment #1: Type: text/plain, Size: 1234 bytes --]

Darren,

What do you think about Olof’s solution?

Link: http://forum.hyperion-entertainment.biz/viewtopic.php?f=35&t=3891&p=43206#p43201

Thanks,
Christian

Sent from my iPhone

> On 4. Dec 2017, at 12:40, Darren Stevens <darren@stevens-zone.net> wrote:
> 
> Hello Bjorn
> 
> Firstly sorry for not being able to join in this discussion, I have been
> moving house and only got my X1000 set up again yesterday..
> 
>> On 30/11/2017, Bjorn Helgaas wrote:
>> I *think* something like the patch below should make this work if you
>> use the "pci=pcie_scan_all" parameter.  We have some x86 DMI quirks
>> that set PCI_SCAN_ALL_PCIE_DEVS automatically.  I don't know how to do
>> something similar on powerpc, but maybe you do?
> 
> Actually the root ports on the Nemo's PA6T processor don't respond to the
> SB600 unless we turn on a special 'relax pci-e' bit in one of its control
> registers. We use a small out of tree init routine to do this, and there
> would be the ideal place to put a call to
> pci_set_flag(PCI_SCAN_ALL_PCIE_DEVS).
> 
> This patch fixes the last major hurdle to getting the X1000 fully supported in
> the linux kernel, so thanks very much for that.
> 
> Regards
> Darren
> 

[-- Attachment #2: Type: text/html, Size: 2148 bytes --]

[PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Christian Zigotzky]

[-- Attachment #1: Type: text/plain, Size: 2304 bytes --]

On 03 December 2017 10:43AM, Christian Zigotzky wrote:
 >
 > On 3. Dec 2017, at 00:02, Olof Johansson <olof@lixom.net> wrote:
 >>
 >>> On Sat, Dec 2, 2017 at 3:00 PM, Olof Johansson <olof@lixom.net> wrote:
 >>>
 >>> The below patch, together with Bjorn's, should do it. Christian, 
can you test
 >>> and report back?
 >>>
 >>> I'm guessing it won't do any harm to set this on non-X1000 
platforms. My
 >>> test system is currently powered down so I can't check.
 >>>
 >>>
 >>> From a3b390277627b0342c8ccfc16e58679e0d8abdde Mon Sep 17 00:00:00 2001
 >>> From: Olof Johansson <olof@lixom.net>
 >>> Date: Sat, 2 Dec 2017 14:56:36 -0800
 >>> Subject: [PATCH] powerpc/pasemi: set PCI_SCAN_ALL_PCI_DEVS
 >>>
 >>> Needed on Amiga X1000 with SB600.
 >>>
 >>> Reported-by: Christian Zigotzky <chzigotzky@xenosoft.de>
 >>> Cc: Bjorn Helgaas <bhelgaas@google.com>
 >>> Signed-off-by: Olof Johansson <olof@lixom.net>
 >>> ---
 >>> arch/powerpc/platforms/pasemi/pci.c | 2 ++
 >>> 1 file changed, 2 insertions(+)
 >>>
 >>> diff --git a/arch/powerpc/platforms/pasemi/pci.c 
b/arch/powerpc/platforms/pasemi/pci.c
 >>> index 5ff6108..ea54ed2 100644
 >>> --- a/arch/powerpc/platforms/pasemi/pci.c
 >>> +++ b/arch/powerpc/platforms/pasemi/pci.c
 >>> @@ -224,6 +224,8 @@ void __init pas_pci_init(void)
 >>>                return;
 >>>        }
 >>>
 >>> +       pci_set_flag(PCI_SCAN_ALL_PCIE_DEVS):
 >>
 >> Typo, should be ';', not ':'. I obviously didn't even try compiling 
this. :)
 >>
 >>
 >> -Olof
 >
 > Hi Olof,
 >
 > Thanks a lot for your patch! I will test it on Wednesday.
 >
 > Cheers,
 > Christian


Hi Olof,

I tested your patch today. Unfortunately the kernel 4.15-rc2 doesn't 
compile with your patch.

Error messages:

                        ^~~~~~~~~
arch/powerpc/platforms/pasemi/pci.c: In function ‘pas_pci_init’:
arch/powerpc/platforms/pasemi/pci.c:298:2: error: implicit declaration 
of function ‘pci_set_flag’ [-Werror=implicit-function-declaration]
   pci_set_flag(PCI_SCAN_ALL_PCIE_DEVS);
   ^~~~~~~~~~~~
cc1: some warnings being treated as errors

---

I figured out that we need 'pci_set_flags' instead of 'pci_set_flag'. I 
modified your patch and after that the kernel compiles. Please find 
attached the new patch.

Cheers,
Christian

[-- Attachment #2: pci.c.patch --]
[-- Type: text/x-patch, Size: 541 bytes --]

arch/powerpc/platforms/pasemi/pci.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
index 5ff6108..ea54ed2 100644
--- a/arch/powerpc/platforms/pasemi/pci.c
+++ b/arch/powerpc/platforms/pasemi/pci.c
@@ -224,6 +224,8 @@ void __init pas_pci_init(void)
 		return;
 	}
 
+	pci_set_flags(PCI_SCAN_ALL_PCIE_DEVS);
+
 	for (np = NULL; (np = of_get_next_child(root, np)) != NULL;)
 		if (np->name && !strcmp(np->name, "pxp") && !pas_add_bridge(np))
 			of_node_get(np);

[PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Christian Zigotzky]

[-- Attachment #1: Type: text/plain, Size: 1462 bytes --]

On 06 December 2017 at 09:37AM, Christian Zigotzky wrote:
 > On 03 December 2017 at 10:43AM, Christian Zigotzky wrote:
 > >
 > > On 3. Dec 2017, at 00:02, Olof Johansson <olof@lixom.net> wrote:
 > >>
 > >> Typo, should be ';', not ':'. I obviously didn't even try 
compiling this. :)
 > >>
 > >>
 > >> -Olof
 > >
 > > Hi Olof,
 > >
 > > Thanks a lot for your patch! I will test it on Wednesday.
 > >
 > > Cheers,
 > > Christian
 >
 >
 > Hi Olof,
 >
 > I tested your patch today. Unfortunately the kernel 4.15-rc2 doesn't 
compile with your patch.
 >
 > Error messages:
 >
 >                        ^~~~~~~~~
 > arch/powerpc/platforms/pasemi/pci.c: In function ‘pas_pci_init’:
 > arch/powerpc/platforms/pasemi/pci.c:298:2: error: implicit 
declaration of function ‘pci_set_flag’ 
[-Werror=implicit-function-declaration]
 >   pci_set_flag(PCI_SCAN_ALL_PCIE_DEVS);
 >   ^~~~~~~~~~~~
 > cc1: some warnings being treated as errors
 >
 > ---
 >
 > I figured out that we need 'pci_set_flags' instead of 'pci_set_flag'. 
I modified your patch and after that the kernel compiles. Please find 
attached the new patch.
 >
 > Cheers,
 > Christian

Hi Olof,

Many thanks for your patch! :-) The RC2 of kernel 4.15 boots without any 
problems on my P.A. Semi Nemo board (A-EON AmigaOne X1000). I don’t need 
the additional boot argument 'pci=pcie_scan_all' anymore.

Is it possible to merge it via the powerpc tree?

Thanks,
Christian





[-- Attachment #2: pci.c.patch --]
[-- Type: text/x-patch, Size: 541 bytes --]

arch/powerpc/platforms/pasemi/pci.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
index 5ff6108..ea54ed2 100644
--- a/arch/powerpc/platforms/pasemi/pci.c
+++ b/arch/powerpc/platforms/pasemi/pci.c
@@ -224,6 +224,8 @@ void __init pas_pci_init(void)
 		return;
 	}
 
+	pci_set_flags(PCI_SCAN_ALL_PCIE_DEVS);
+
 	for (np = NULL; (np = of_get_next_child(root, np)) != NULL;)
 		if (np->name && !strcmp(np->name, "pxp") && !pas_add_bridge(np))
 			of_node_get(np);

Re: [PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Michael Ellerman]

Olof Johansson <olof@lixom.net> writes:

> On Sat, Dec 02, 2017 at 01:54:41PM +0100, Christian Zigotzky wrote:
>> On 02 December 2017 at 00:27AM, Bjorn Helgaas wrote:
>> >=20
>> > Thanks for testing that.  I'll merge a similar patch for v4.16.
>> >=20
>> > I don't think using "pci=3Dpcie_scan_all" is really an acceptable
>> > long-term answer for you, though.  Is there some way we can identify
>> > at run-time whether we're on a Nemo system?  If so, we can make this
>> > happen automatically.
>> >=20
>> > Bjorn
>> >=20
>> Hi Bjorn,
>>=20
>> Many thanks for your effort! I appreciate it very much. :-)
>>=20
>> We can identify the Nemo board at the boot time. See dmesg output: [=C2=
=A0=C2=A0=C2=A0
>> 0.061592] NEMO SB600 IOB base e0000000
>>=20
>> @linuxppc-dev
>> Any other ideas? Maybe the same as we can identify the other P.A. Semi
>> boards (Electra, Chitra, and Athena).
>>=20
>> @Olof
>> Maybe you know how we can identify the P.A. Semi Nemo board at the run-t=
ime.
>>=20
>> @Darren
>> Do you have an idea?
>
>
> The below patch, together with Bjorn's, should do it. Christian, can you =
test
> and report back?
>
> I'm guessing it won't do any harm to set this on non-X1000 platforms. My
> test system is currently powered down so I can't check.

My pasemi board had been powered off for a while and when I turned it
back on something popped, the power supply blew up and tripped a
breaker.

So I also can't test this, at least for now, until I get my "allowed to
use hardware" license back from my colleagues in the office.

cheers

Re: [PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Michael Ellerman]

Christian Zigotzky <chzigotzky@xenosoft.de> writes:
...
>
> Hi Olof,
>
> Many thanks for your patch! :-) The RC2 of kernel 4.15 boots without any=
=20
> problems on my P.A. Semi Nemo board (A-EON AmigaOne X1000). I don=E2=80=
=99t need=20
> the additional boot argument 'pci=3Dpcie_scan_all' anymore.
>
> Is it possible to merge it via the powerpc tree?

Yes.

It would be good to confirm that the change is harmless on other pasemi
boards. I'll try and get mine booted tomorrow, unless someone beats me
to it.

cheers

Re: [PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Olof Johansson]

On Wed, Dec 6, 2017 at 4:44 AM, Michael Ellerman <mpe@ellerman.id.au> wrote:
> Olof Johansson <olof@lixom.net> writes:
>
>> On Sat, Dec 02, 2017 at 01:54:41PM +0100, Christian Zigotzky wrote:
>>> On 02 December 2017 at 00:27AM, Bjorn Helgaas wrote:
>>> >
>>> > Thanks for testing that.  I'll merge a similar patch for v4.16.
>>> >
>>> > I don't think using "pci=pcie_scan_all" is really an acceptable
>>> > long-term answer for you, though.  Is there some way we can identify
>>> > at run-time whether we're on a Nemo system?  If so, we can make this
>>> > happen automatically.
>>> >
>>> > Bjorn
>>> >
>>> Hi Bjorn,
>>>
>>> Many thanks for your effort! I appreciate it very much. :-)
>>>
>>> We can identify the Nemo board at the boot time. See dmesg output: [
>>> 0.061592] NEMO SB600 IOB base e0000000
>>>
>>> @linuxppc-dev
>>> Any other ideas? Maybe the same as we can identify the other P.A. Semi
>>> boards (Electra, Chitra, and Athena).
>>>
>>> @Olof
>>> Maybe you know how we can identify the P.A. Semi Nemo board at the run-time.
>>>
>>> @Darren
>>> Do you have an idea?
>>
>>
>> The below patch, together with Bjorn's, should do it. Christian, can you test
>> and report back?
>>
>> I'm guessing it won't do any harm to set this on non-X1000 platforms. My
>> test system is currently powered down so I can't check.
>
> My pasemi board had been powered off for a while and when I turned it
> back on something popped, the power supply blew up and tripped a
> breaker.
>
> So I also can't test this, at least for now, until I get my "allowed to
> use hardware" license back from my colleagues in the office.

Ouch. Sounds like it's the PSU not the board. Hopefully there was no
board damage, let me know if you need a replacement though and I'll
see what I can find.


-Olof

Re: [PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Bjorn Helgaas]

On Wed, Dec 06, 2017 at 11:57:03PM +1100, Michael Ellerman wrote:
> Christian Zigotzky <chzigotzky@xenosoft.de> writes:
> ...
> >
> > Hi Olof,
> >
> > Many thanks for your patch! :-) The RC2 of kernel 4.15 boots without any 
> > problems on my P.A. Semi Nemo board (A-EON AmigaOne X1000). I don’t need 
> > the additional boot argument 'pci=pcie_scan_all' anymore.
> >
> > Is it possible to merge it via the powerpc tree?
> 
> Yes.
> 
> It would be good to confirm that the change is harmless on other pasemi
> boards. I'll try and get mine booted tomorrow, unless someone beats me
> to it.

Theoretically, it should not do any harm since it only turns off an
enumeration optimization.  Boot will be slightly slower but should
still work fine.

Darren's idea of doing it at the same time you tweak the SB600 "relax
pci-e" bit is ideal because then the two pieces are obviously
connected and it wouldn't affect any other systems at all.

Bjorn

Re: [PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Michael Ellerman]

Olof Johansson <olof@lixom.net> writes:
> On Wed, Dec 6, 2017 at 4:44 AM, Michael Ellerman <mpe@ellerman.id.au> wrote:
>> Olof Johansson <olof@lixom.net> writes:
>>>
>>> The below patch, together with Bjorn's, should do it. Christian, can you test
>>> and report back?
>>>
>>> I'm guessing it won't do any harm to set this on non-X1000 platforms. My
>>> test system is currently powered down so I can't check.
>>
>> My pasemi board had been powered off for a while and when I turned it
>> back on something popped, the power supply blew up and tripped a
>> breaker.
>>
>> So I also can't test this, at least for now, until I get my "allowed to
>> use hardware" license back from my colleagues in the office.
>
> Ouch. Sounds like it's the PSU not the board. Hopefully there was no
> board damage, let me know if you need a replacement though and I'll
> see what I can find.

Thanks. Yeah the power supply is toast. One of the guys is going to see
if he can fix it.

Will try and get the board going, will let you know if it's dead too.

cheers

Re: [PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Michael Ellerman]

Bjorn Helgaas <helgaas@kernel.org> writes:

> On Wed, Dec 06, 2017 at 11:57:03PM +1100, Michael Ellerman wrote:
>> Christian Zigotzky <chzigotzky@xenosoft.de> writes:
>> ...
>> >
>> > Hi Olof,
>> >
>> > Many thanks for your patch! :-) The RC2 of kernel 4.15 boots without a=
ny=20
>> > problems on my P.A. Semi Nemo board (A-EON AmigaOne X1000). I don=E2=
=80=99t need=20
>> > the additional boot argument 'pci=3Dpcie_scan_all' anymore.
>> >
>> > Is it possible to merge it via the powerpc tree?
>>=20
>> Yes.
>>=20
>> It would be good to confirm that the change is harmless on other pasemi
>> boards. I'll try and get mine booted tomorrow, unless someone beats me
>> to it.
>
> Theoretically, it should not do any harm since it only turns off an
> enumeration optimization.  Boot will be slightly slower but should
> still work fine.

Yep OK.

> Darren's idea of doing it at the same time you tweak the SB600 "relax
> pci-e" bit is ideal because then the two pieces are obviously
> connected and it wouldn't affect any other systems at all.

Yes that would be ideal. That patch is currently out-of-tree I gather,
but I guess everyone who's using these machines must have that patch
anyway.

Darren what does that code look like? Can we get it upstream and close
the loop on this?

cheers

[PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Christian Zigotzky]

[-- Attachment #1: Type: text/plain, Size: 600 bytes --]

On 08 December 2017 at 12:59PM, Michael Ellerman wrote:
 >
 >> Darren's idea of doing it at the same time you tweak the SB600 "relax
 >> pci-e" bit is ideal because then the two pieces are obviously
 >> connected and it wouldn't affect any other systems at all.
 >
 > Yes that would be ideal. That patch is currently out-of-tree I gather,
 > but I guess everyone who's using these machines must have that patch
 > anyway.
 >
 > Darren what does that code look like? Can we get it upstream and close
 > the loop on this?
 >
 > cheers
 >

Hi Michael,

Please find attached the code.

Thanks,
Christian

[-- Attachment #2: sb600.patch --]
[-- Type: text/x-patch, Size: 2860 bytes --]

diff -rupN a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
--- a/arch/powerpc/platforms/pasemi/pci.c	2017-11-16 08:18:35.078874462 +0100
+++ b/arch/powerpc/platforms/pasemi/pci.c	2017-11-16 08:17:22.034367975 +0100
@@ -27,6 +27,7 @@
 #include <linux/pci.h>
 
 #include <asm/pci-bridge.h>
+#include <asm/isa-bridge.h>
 #include <asm/machdep.h>
 
 #include <asm/ppc-pci.h>
@@ -108,6 +109,69 @@ static int workaround_5945(struct pci_bu
 	return 1;
 }
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+static int sb600_bus = 5;
+static void __iomem *iob_mapbase = NULL;
+
+static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
+                             int offset, int len, u32 *val);
+
+static void sb600_set_flag(int bus)
+{
+    struct resource res;
+    struct device_node *dn;
+       struct pci_bus *busp;
+       u32 val;
+       int err;
+
+       if (sb600_bus == -1)
+       {
+               busp = pci_find_bus(0, 0);
+               pa_pxp_read_config(busp, PCI_DEVFN(17,0), PCI_SECONDARY_BUS, 1, &val);
+
+               sb600_bus = val;
+
+               printk(KERN_CRIT "NEMO SB600 on bus %d.\n",sb600_bus);
+       }
+
+       if (iob_mapbase == NULL)
+       {
+        dn = of_find_compatible_node(NULL, "isa", "pasemi,1682m-iob");
+        if (!dn)
+        {
+               printk(KERN_CRIT "NEMO SB600 missing iob node\n");
+                       return;
+               }
+
+               err = of_address_to_resource(dn, 0, &res);
+        of_node_put(dn);
+
+               if (err)
+               {
+               printk(KERN_CRIT "NEMO SB600 missing resource\n");
+                       return;
+               }
+
+               printk(KERN_CRIT "NEMO SB600 IOB base %08lx\n",res.start);
+
+               iob_mapbase = ioremap(res.start + 0x100, 0x94);
+       }
+
+       if (iob_mapbase != NULL)
+       {
+               if (bus == sb600_bus)
+               {
+                       out_le32(iob_mapbase + 4, in_le32(iob_mapbase + 4) | 0x800);
+               }
+               else
+               {
+                       out_le32(iob_mapbase + 4, in_le32(iob_mapbase + 4) & ~0x800);
+               }
+       }
+}
+#endif
+
+
 static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
 			      int offset, int len, u32 *val)
 {
@@ -126,6 +190,10 @@ static int pa_pxp_read_config(struct pci
 
 	addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+       sb600_set_flag(bus->number);
+#endif
+
 	/*
 	 * Note: the caller has already checked that offset is
 	 * suitably aligned and that len is 1, 2 or 4.
@@ -210,6 +278,9 @@ static int __init pas_add_bridge(struct
 	/* Interpret the "ranges" property */
 	pci_process_bridge_OF_ranges(hose, dev, 1);
 
+	/* Scan for an isa bridge. */
+	isa_bridge_find_early(hose);
+
 	return 0;
 }

[PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Christian Zigotzky]

[-- Attachment #1: Type: text/plain, Size: 820 bytes --]

On 09 December 2017 at 7:03PM, Christian Zigotzky wrote:
 > On 08 December 2017 at 12:59PM, Michael Ellerman wrote:
 > >
 > >> Darren's idea of doing it at the same time you tweak the SB600 "relax
 > >> pci-e" bit is ideal because then the two pieces are obviously
 > >> connected and it wouldn't affect any other systems at all.
 > >
 > > Yes that would be ideal. That patch is currently out-of-tree I gather,
 > > but I guess everyone who's using these machines must have that patch
 > > anyway.
 > >
 > > Darren what does that code look like? Can we get it upstream and close
 > > the loop on this?
 > >
 > > cheers
 > >
 >
 > Hi Michael,
 >
 > Please find attached the code.
 >
 > Thanks,
 > Christian

Hi All,

I haven't received any response yet. Is this the correct patch you are 
looking for?

Thanks,
Christian

[-- Attachment #2: sb600.patch --]
[-- Type: text/x-patch, Size: 2860 bytes --]

diff -rupN a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
--- a/arch/powerpc/platforms/pasemi/pci.c	2017-11-16 08:18:35.078874462 +0100
+++ b/arch/powerpc/platforms/pasemi/pci.c	2017-11-16 08:17:22.034367975 +0100
@@ -27,6 +27,7 @@
 #include <linux/pci.h>
 
 #include <asm/pci-bridge.h>
+#include <asm/isa-bridge.h>
 #include <asm/machdep.h>
 
 #include <asm/ppc-pci.h>
@@ -108,6 +109,69 @@ static int workaround_5945(struct pci_bu
 	return 1;
 }
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+static int sb600_bus = 5;
+static void __iomem *iob_mapbase = NULL;
+
+static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
+                             int offset, int len, u32 *val);
+
+static void sb600_set_flag(int bus)
+{
+    struct resource res;
+    struct device_node *dn;
+       struct pci_bus *busp;
+       u32 val;
+       int err;
+
+       if (sb600_bus == -1)
+       {
+               busp = pci_find_bus(0, 0);
+               pa_pxp_read_config(busp, PCI_DEVFN(17,0), PCI_SECONDARY_BUS, 1, &val);
+
+               sb600_bus = val;
+
+               printk(KERN_CRIT "NEMO SB600 on bus %d.\n",sb600_bus);
+       }
+
+       if (iob_mapbase == NULL)
+       {
+        dn = of_find_compatible_node(NULL, "isa", "pasemi,1682m-iob");
+        if (!dn)
+        {
+               printk(KERN_CRIT "NEMO SB600 missing iob node\n");
+                       return;
+               }
+
+               err = of_address_to_resource(dn, 0, &res);
+        of_node_put(dn);
+
+               if (err)
+               {
+               printk(KERN_CRIT "NEMO SB600 missing resource\n");
+                       return;
+               }
+
+               printk(KERN_CRIT "NEMO SB600 IOB base %08lx\n",res.start);
+
+               iob_mapbase = ioremap(res.start + 0x100, 0x94);
+       }
+
+       if (iob_mapbase != NULL)
+       {
+               if (bus == sb600_bus)
+               {
+                       out_le32(iob_mapbase + 4, in_le32(iob_mapbase + 4) | 0x800);
+               }
+               else
+               {
+                       out_le32(iob_mapbase + 4, in_le32(iob_mapbase + 4) & ~0x800);
+               }
+       }
+}
+#endif
+
+
 static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
 			      int offset, int len, u32 *val)
 {
@@ -126,6 +190,10 @@ static int pa_pxp_read_config(struct pci
 
 	addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+       sb600_set_flag(bus->number);
+#endif
+
 	/*
 	 * Note: the caller has already checked that offset is
 	 * suitably aligned and that len is 1, 2 or 4.
@@ -210,6 +278,9 @@ static int __init pas_add_bridge(struct
 	/* Interpret the "ranges" property */
 	pci_process_bridge_OF_ranges(hose, dev, 1);
 
+	/* Scan for an isa bridge. */
+	isa_bridge_find_early(hose);
+
 	return 0;
 }

Re: [PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Bjorn Helgaas]

On Fri, Dec 15, 2017 at 09:04:51AM +0100, Christian Zigotzky wrote:
> On 09 December 2017 at 7:03PM, Christian Zigotzky wrote:
> > On 08 December 2017 at 12:59PM, Michael Ellerman wrote:
> > >
> > >> Darren's idea of doing it at the same time you tweak the SB600 "relax
> > >> pci-e" bit is ideal because then the two pieces are obviously
> > >> connected and it wouldn't affect any other systems at all.
> > >
> > > Yes that would be ideal. That patch is currently out-of-tree I gather,
> > > but I guess everyone who's using these machines must have that patch
> > > anyway.
> > >
> > > Darren what does that code look like? Can we get it upstream and close
> > > the loop on this?
> > >
> > > cheers
> > >
> >
> > Hi Michael,
> >
> > Please find attached the code.
> >
> > Thanks,
> > Christian
> 
> Hi All,
> 
> I haven't received any response yet. Is this the correct patch you
> are looking for?

This is a powerpc patch that doesn't affect the PCI core, so I would
say this is Michael's bailiwick.

I guess you're only looking for a hint about whether this is the right
approach, because it's obviously fully baked yet (no changelog,
signed-off-by, etc, not a "safe for all powerpc" run-time solution,
not in Linux indentation style, etc).

It looks like the "pasemi,1682m-iob" DT property is required and
possibly sufficient to identify this system at run-time.

My advice is to finish that stuff up, post it to the powerpc
maintainers and the linuxppc-dev@lists.ozlabs.org list, and go from
there.

> diff -rupN a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
> --- a/arch/powerpc/platforms/pasemi/pci.c	2017-11-16 08:18:35.078874462 +0100
> +++ b/arch/powerpc/platforms/pasemi/pci.c	2017-11-16 08:17:22.034367975 +0100
> @@ -27,6 +27,7 @@
>  #include <linux/pci.h>
>  
>  #include <asm/pci-bridge.h>
> +#include <asm/isa-bridge.h>
>  #include <asm/machdep.h>
>  
>  #include <asm/ppc-pci.h>
> @@ -108,6 +109,69 @@ static int workaround_5945(struct pci_bu
>  	return 1;
>  }
>  
> +#ifdef CONFIG_PPC_PASEMI_NEMO
> +static int sb600_bus = 5;
> +static void __iomem *iob_mapbase = NULL;
> +
> +static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
> +                             int offset, int len, u32 *val);
> +
> +static void sb600_set_flag(int bus)
> +{
> +    struct resource res;
> +    struct device_node *dn;
> +       struct pci_bus *busp;
> +       u32 val;
> +       int err;
> +
> +       if (sb600_bus == -1)
> +       {
> +               busp = pci_find_bus(0, 0);
> +               pa_pxp_read_config(busp, PCI_DEVFN(17,0), PCI_SECONDARY_BUS, 1, &val);
> +
> +               sb600_bus = val;
> +
> +               printk(KERN_CRIT "NEMO SB600 on bus %d.\n",sb600_bus);
> +       }
> +
> +       if (iob_mapbase == NULL)
> +       {
> +        dn = of_find_compatible_node(NULL, "isa", "pasemi,1682m-iob");
> +        if (!dn)
> +        {
> +               printk(KERN_CRIT "NEMO SB600 missing iob node\n");
> +                       return;
> +               }
> +
> +               err = of_address_to_resource(dn, 0, &res);
> +        of_node_put(dn);
> +
> +               if (err)
> +               {
> +               printk(KERN_CRIT "NEMO SB600 missing resource\n");
> +                       return;
> +               }
> +
> +               printk(KERN_CRIT "NEMO SB600 IOB base %08lx\n",res.start);
> +
> +               iob_mapbase = ioremap(res.start + 0x100, 0x94);
> +       }
> +
> +       if (iob_mapbase != NULL)
> +       {
> +               if (bus == sb600_bus)
> +               {
> +                       out_le32(iob_mapbase + 4, in_le32(iob_mapbase + 4) | 0x800);
> +               }
> +               else
> +               {
> +                       out_le32(iob_mapbase + 4, in_le32(iob_mapbase + 4) & ~0x800);
> +               }
> +       }
> +}
> +#endif
> +
> +
>  static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
>  			      int offset, int len, u32 *val)
>  {
> @@ -126,6 +190,10 @@ static int pa_pxp_read_config(struct pci
>  
>  	addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
>  
> +#ifdef CONFIG_PPC_PASEMI_NEMO
> +       sb600_set_flag(bus->number);
> +#endif
> +
>  	/*
>  	 * Note: the caller has already checked that offset is
>  	 * suitably aligned and that len is 1, 2 or 4.
> @@ -210,6 +278,9 @@ static int __init pas_add_bridge(struct
>  	/* Interpret the "ranges" property */
>  	pci_process_bridge_OF_ranges(hose, dev, 1);
>  
> +	/* Scan for an isa bridge. */
> +	isa_bridge_find_early(hose);
> +
>  	return 0;
>  }

[PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Christian Zigotzky]

[-- Attachment #1: Type: text/plain, Size: 2830 bytes --]

On 04 December 2017 at 12:40PM, Darren Stevens wrote:
 > Hello Bjorn
 >
 > Firstly sorry for not being able to join in this discussion, I have been
 > moving house and only got my X1000 set up again yesterday..
 >
 > On 30/11/2017, Bjorn Helgaas wrote:
 >> I *think* something like the patch below should make this work if you
 >> use the "pci=pcie_scan_all" parameter.  We have some x86 DMI quirks
 >> that set PCI_SCAN_ALL_PCIE_DEVS automatically.  I don't know how to do
 >> something similar on powerpc, but maybe you do?
 >
 > Actually the root ports on the Nemo's PA6T processor don't respond to the
 > SB600 unless we turn on a special 'relax pci-e' bit in one of its control
 > registers. We use a small out of tree init routine to do this, and there
 > would be the ideal place to put a call to
 > pci_set_flag(PCI_SCAN_ALL_PCIE_DEVS).
 >
 > This patch fixes the last major hurdle to getting the X1000 fully 
supported in
 > the linux kernel, so thanks very much for that.
 >
 > Regards
 > Darren
 >
 >


On 15 December 2017 at 09:25PM, Bjorn Helgaas wrote:
 > On Fri, Dec 15, 2017 at 09:04:51AM +0100, Christian Zigotzky wrote:
 >> On 09 December 2017 at 7:03PM, Christian Zigotzky wrote:
 >>> On 08 December 2017 at 12:59PM, Michael Ellerman wrote:
 >>>>
 >>>>> Darren's idea of doing it at the same time you tweak the SB600 "relax
 >>>>> pci-e" bit is ideal because then the two pieces are obviously
 >>>>> connected and it wouldn't affect any other systems at all.
 >>>>
 >>>> Yes that would be ideal. That patch is currently out-of-tree I gather,
 >>>> but I guess everyone who's using these machines must have that patch
 >>>> anyway.
 >>>>
 >>>> Darren what does that code look like? Can we get it upstream and close
 >>>> the loop on this?
 >>>>
 >>>> cheers
 >>>>
 >>>
 >>> Hi Michael,
 >>>
 >>> Please find attached the code.
 >>>
 >>> Thanks,
 >>> Christian
 >>
 >> Hi All,
 >>
 >> I haven't received any response yet. Is this the correct patch you
 >> are looking for?
 >
 > This is a powerpc patch that doesn't affect the PCI core, so I would
 > say this is Michael's bailiwick.
 >
 > I guess you're only looking for a hint about whether this is the right
 > approach, because it's obviously fully baked yet (no changelog,
 > signed-off-by, etc, not a "safe for all powerpc" run-time solution,
 > not in Linux indentation style, etc).
 >
 > It looks like the "pasemi,1682m-iob" DT property is required and
 > possibly sufficient to identify this system at run-time.
 >
 > My advice is to finish that stuff up, post it to the powerpc
 > maintainers and the linuxppc-dev@lists.ozlabs.org list, and go from
 > there.
 >

Darren,

Where is this small out of tree init routine in our patch? I haven't 
found it yet. Please post this routine here. Please find attached our 
latest Nemo patch.

Thanks,
Christian

[-- Attachment #2: nemo_4.15-2.patch --]
[-- Type: text/x-patch, Size: 10164 bytes --]

diff -rupN a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
--- a/arch/powerpc/platforms/pasemi/pci.c	2017-11-16 08:18:35.078874462 +0100
+++ b/arch/powerpc/platforms/pasemi/pci.c	2017-11-16 08:17:22.034367975 +0100
@@ -27,6 +27,7 @@
 #include <linux/pci.h>
 
 #include <asm/pci-bridge.h>
+#include <asm/isa-bridge.h>
 #include <asm/machdep.h>
 
 #include <asm/ppc-pci.h>
@@ -108,6 +109,69 @@ static int workaround_5945(struct pci_bu
 	return 1;
 }
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+static int sb600_bus = 5;
+static void __iomem *iob_mapbase = NULL;
+
+static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
+                             int offset, int len, u32 *val);
+
+static void sb600_set_flag(int bus)
+{
+    struct resource res;
+    struct device_node *dn;
+       struct pci_bus *busp;
+       u32 val;
+       int err;
+
+       if (sb600_bus == -1)
+       {
+               busp = pci_find_bus(0, 0);
+               pa_pxp_read_config(busp, PCI_DEVFN(17,0), PCI_SECONDARY_BUS, 1, &val);
+
+               sb600_bus = val;
+
+               printk(KERN_CRIT "NEMO SB600 on bus %d.\n",sb600_bus);
+       }
+
+       if (iob_mapbase == NULL)
+       {
+        dn = of_find_compatible_node(NULL, "isa", "pasemi,1682m-iob");
+        if (!dn)
+        {
+               printk(KERN_CRIT "NEMO SB600 missing iob node\n");
+                       return;
+               }
+
+               err = of_address_to_resource(dn, 0, &res);
+        of_node_put(dn);
+
+               if (err)
+               {
+               printk(KERN_CRIT "NEMO SB600 missing resource\n");
+                       return;
+               }
+
+               printk(KERN_CRIT "NEMO SB600 IOB base %08lx\n",res.start);
+
+               iob_mapbase = ioremap(res.start + 0x100, 0x94);
+       }
+
+       if (iob_mapbase != NULL)
+       {
+               if (bus == sb600_bus)
+               {
+                       out_le32(iob_mapbase + 4, in_le32(iob_mapbase + 4) | 0x800);
+               }
+               else
+               {
+                       out_le32(iob_mapbase + 4, in_le32(iob_mapbase + 4) & ~0x800);
+               }
+       }
+}
+#endif
+
+
 static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
 			      int offset, int len, u32 *val)
 {
@@ -126,6 +190,10 @@ static int pa_pxp_read_config(struct pci
 
 	addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+       sb600_set_flag(bus->number);
+#endif
+
 	/*
 	 * Note: the caller has already checked that offset is
 	 * suitably aligned and that len is 1, 2 or 4.
@@ -210,6 +278,9 @@ static int __init pas_add_bridge(struct
 	/* Interpret the "ranges" property */
 	pci_process_bridge_OF_ranges(hose, dev, 1);
 
+	/* Scan for an isa bridge. */
+	isa_bridge_find_early(hose);
+
 	return 0;
 }
 
diff -rupN a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c
--- a/arch/powerpc/platforms/pasemi/setup.c	2017-11-16 08:18:35.078874462 +0100
+++ b/arch/powerpc/platforms/pasemi/setup.c	2017-11-16 08:17:22.036368061 +0100
@@ -34,6 +34,7 @@
 #include <asm/prom.h>
 #include <asm/iommu.h>
 #include <asm/machdep.h>
+#include <asm/i8259.h>
 #include <asm/mpic.h>
 #include <asm/smp.h>
 #include <asm/time.h>
@@ -72,6 +73,17 @@ static void __noreturn pas_restart(char
 		out_le32(reset_reg, 0x6000000);
 }
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+void pas_shutdown(void)
+{
+       /* (added by DStevens 19/06/13)
+          Set the PLD bit that makes the SB600 think the power button is being pressed */
+       void __iomem *pld_map = ioremap(0xf5000000,4096);
+       while (1)
+               out_8(pld_map+7,0x01);
+}
+#endif
+
 #ifdef CONFIG_SMP
 static arch_spinlock_t timebase_lock;
 static unsigned long timebase;
@@ -183,16 +195,30 @@ static int __init pas_setup_mce_regs(voi
 }
 machine_device_initcall(pasemi, pas_setup_mce_regs);
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+static void sb600_8259_cascade(struct irq_desc *desc)
+{
+	struct irq_chip *chip = irq_desc_get_chip(desc);
+	unsigned int cascade_irq = i8259_irq();
+
+	if (cascade_irq !=NO_IRQ)
+               generic_handle_irq(cascade_irq);
+
+	chip->irq_eoi(&desc->irq_data);
+}
+#endif
+
 static __init void pas_init_IRQ(void)
 {
 	struct device_node *np;
-	struct device_node *root, *mpic_node;
+	struct device_node *root, *mpic_node, *i8259_node;
 	unsigned long openpic_addr;
 	const unsigned int *opprop;
 	int naddr, opplen;
 	int mpic_flags;
 	const unsigned int *nmiprop;
 	struct mpic *mpic;
+	int gpio_virq;
 
 	mpic_node = NULL;
 
@@ -244,6 +270,22 @@ static __init void pas_init_IRQ(void)
 		mpic_unmask_irq(irq_get_irq_data(nmi_virq));
 	}
 
+
+#ifdef CONFIG_PPC_PASEMI_NEMO
+       // Connect legacy i8259 controller in SB600
+	i8259_node = of_find_node_by_path("/pxp@0,e0000000");
+	printk("Init i8259\n");
+	i8259_init(i8259_node, 0);
+	of_node_put(i8259_node);
+
+	gpio_virq = irq_create_mapping(NULL, 3);
+	irq_set_irq_type(gpio_virq, IRQ_TYPE_LEVEL_HIGH);
+	irq_set_chained_handler(gpio_virq, sb600_8259_cascade);
+	mpic_unmask_irq(irq_get_irq_data(gpio_virq));
+
+	irq_set_default_host(mpic->irqhost);
+
+#endif
 	of_node_put(mpic_node);
 	of_node_put(root);
 }
@@ -398,6 +440,18 @@ static const struct of_device_id pasemi_
 	{},
 };
 
+static struct resource rtc_resource[] = {{
+	.name = "rtc",
+	.start = 0x70,
+	.end = 0x71,
+	.flags = IORESOURCE_IO,
+}, {
+	.name = "rtc",
+	.start = 8,
+	.end = 8,
+	.flags = IORESOURCE_IRQ,
+}};
+
 static int __init pasemi_publish_devices(void)
 {
 	pasemi_pcmcia_init();
@@ -405,6 +459,10 @@ static int __init pasemi_publish_devices
 	/* Publish OF platform devices for SDC and other non-PCI devices */
 	of_platform_bus_probe(NULL, pasemi_bus_ids, NULL);
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+	platform_device_register_simple("rtc_cmos", -1, rtc_resource, 2);
+#endif
+
 	return 0;
 }
 machine_device_initcall(pasemi, pasemi_publish_devices);
@@ -421,9 +479,13 @@ static int __init pas_probe(void)
 
 	iommu_init_early_pasemi();
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+       pm_power_off              = pas_shutdown;         // Varisys provided a way to turn us off
+#endif
 	return 1;
 }
 
+
 define_machine(pasemi) {
 	.name			= "PA Semi PWRficient",
 	.probe			= pas_probe,
@@ -435,4 +497,7 @@ define_machine(pasemi) {
 	.calibrate_decr		= generic_calibrate_decr,
 	.progress		= pas_progress,
 	.machine_check_exception = pas_machine_check_handler,
+#if 0 // def CONFIG_PPC_PASEMI_NEMO
+       .pci_probe_mode = sb600_pci_probe_mode,
+#endif
 };
diff -rupN a/drivers/ata/pata_atiixp.c b/drivers/ata/pata_atiixp.c
--- a/drivers/ata/pata_atiixp.c	2017-11-16 08:18:43.932095778 +0100
+++ b/drivers/ata/pata_atiixp.c	2017-11-16 08:17:22.036368061 +0100
@@ -278,6 +278,12 @@ static int atiixp_init_one(struct pci_de
 	};
 	const struct ata_port_info *ppi[] = { &info, &info };
 
+        /* SB600 on the Nemo board doesn't have secondary port wired */
+        #ifdef CONFIG_PPC_PASEMI_NEMO
+        if((pdev->device == PCI_DEVICE_ID_ATI_IXP600_IDE))
+            ppi[1] = &ata_dummy_port_info;
+        #endif
+
 	return ata_pci_bmdma_init_one(pdev, ppi, &atiixp_sht, NULL,
 				      ATA_HOST_PARALLEL_SCAN);
 }
diff -rupN a/drivers/ata/pata_of_platform.c b/drivers/ata/pata_of_platform.c
--- a/drivers/ata/pata_of_platform.c	2017-11-16 08:18:43.906095154 +0100
+++ b/drivers/ata/pata_of_platform.c	2017-11-16 08:17:22.040368233 +0100
@@ -40,14 +40,36 @@ static int pata_of_platform_probe(struct
 		return -EINVAL;
 	}
 
-	ret = of_address_to_resource(dn, 1, &ctl_res);
-	if (ret) {
-		dev_err(&ofdev->dev, "can't get CTL address from "
-			"device tree\n");
-		return -EINVAL;
+	if (of_device_is_compatible(dn, "electra-ide")) {
+		/* Altstatus is really at offset 0x3f6 from the primary window
+		 * on electra-ide. Adjust ctl_res and io_res accordingly.
+		 */
+		ctl_res = io_res;
+		ctl_res.start = ctl_res.start+0x3f6;
+		io_res.end = ctl_res.start-1;
+
+#ifdef CONFIG_PPC_PASEMI_NEMO
+	} else if (of_device_is_compatible(dn, "electra-cf")) {
+		/* Task regs are at 0x800, with alt status @ 0x80e in the primary window
+		* on electra-cf. Adjust ctl_res and io_res accordingly.
+		*/
+		ctl_res = io_res;
+		io_res.start += 0x800;
+		ctl_res.start = ctl_res.start + 0x80e;
+		io_res.end = ctl_res.start-1;
+#endif
+	} else {
+		ret = of_address_to_resource(dn, 1, &ctl_res);
+		if (ret) {
+			dev_err(&ofdev->dev, "can't get CTL address from "
+				"device tree\n");
+			return -EINVAL;
+		}
 	}
 
 	irq_res = platform_get_resource(ofdev, IORESOURCE_IRQ, 0);
+	if (irq_res)
+		irq_res->flags = 0;
 
 	of_property_read_u32(dn, "reg-shift", &reg_shift);
 
@@ -60,6 +82,11 @@ static int pata_of_platform_probe(struct
 		dev_info(&ofdev->dev, "pio-mode unspecified, assuming PIO0\n");
 	}
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+       irq_res = 0;                    // force irq off (doesn't seem to work)
+#endif
+
+
 	pio_mask = 1 << pio_mode;
 	pio_mask |= (1 << pio_mode) - 1;
 
@@ -69,6 +96,10 @@ static int pata_of_platform_probe(struct
 
 static const struct of_device_id pata_of_platform_match[] = {
 	{ .compatible = "ata-generic", },
+	{ .compatible = "electra-ide", },
+#ifdef CONFIG_PPC_PASEMI_NEMO
+	{ .compatible = "electra-cf",},
+#endif
 	{ },
 };
 MODULE_DEVICE_TABLE(of, pata_of_platform_match);
diff -rupN a/drivers/i2c/busses/i2c-pasemi.c b/drivers/i2c/busses/i2c-pasemi.c
--- a/drivers/i2c/busses/i2c-pasemi.c	2017-11-16 08:18:40.088001610 +0100
+++ b/drivers/i2c/busses/i2c-pasemi.c	2017-11-16 08:17:22.041368276 +0100
@@ -365,7 +365,6 @@ static int pasemi_smb_probe(struct pci_d
 	smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
 	smbus->adapter.algo = &smbus_algorithm;
 	smbus->adapter.algo_data = smbus;
-	smbus->adapter.nr = PCI_FUNC(dev->devfn);
 
 	/* set up the sysfs linkage to our parent device */
 	smbus->adapter.dev.parent = &dev->dev;
@@ -373,7 +372,7 @@ static int pasemi_smb_probe(struct pci_d
 	reg_write(smbus, REG_CTL, (CTL_MTR | CTL_MRR |
 		  (CLK_100K_DIV & CTL_CLK_M)));
 
-	error = i2c_add_numbered_adapter(&smbus->adapter);
+	error = i2c_add_adapter(&smbus->adapter);
 	if (error)
 		goto out_release_region;
 

[PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Christian Zigotzky]

[-- Attachment #1: Type: text/plain, Size: 1738 bytes --]

Hi Bjorn,

Sorry I'm bothering you again. Is this small out of tree init routine in 
the Nemo patch? I haven't get an answer from Darren yet and I didn't 
found the small out of tree init routine in the Nemo patch. Please find 
attached the Nemo patch. Maybe you can find this small out of tree init 
routine.

What do you think of this following code?

if (sb600_bus == -1)
+       {
+               busp = pci_find_bus(0, 0);
+               pa_pxp_read_config(busp, PCI_DEVFN(17,0), 
PCI_SECONDARY_BUS, 1, &val);
+
+               sb600_bus = val;
+
+               printk(KERN_CRIT "NEMO SB600 on bus %d.\n",sb600_bus);
+       }

Thanks,
Christian


On 04 December 2017 at 12:40PM, Darren Stevens wrote:
 > Hello Bjorn
 >
 > Firstly sorry for not being able to join in this discussion, I have been
 > moving house and only got my X1000 set up again yesterday..
 >
 > On 30/11/2017, Bjorn Helgaas wrote:
 >> I *think* something like the patch below should make this work if you
 >> use the "pci=pcie_scan_all" parameter.  We have some x86 DMI quirks
 >> that set PCI_SCAN_ALL_PCIE_DEVS automatically.  I don't know how to do
 >> something similar on powerpc, but maybe you do?
 >
 > Actually the root ports on the Nemo's PA6T processor don't respond to the
 > SB600 unless we turn on a special 'relax pci-e' bit in one of its control
 > registers. We use a small out of tree init routine to do this, and there
 > would be the ideal place to put a call to
 > pci_set_flag(PCI_SCAN_ALL_PCIE_DEVS).
 >
 > This patch fixes the last major hurdle to getting the X1000 fully 
supported in
 > the linux kernel, so thanks very much for that.
 >
 > Regards
 > Darren
 >
 >


[-- Attachment #2: nemo_4.14-1.patch --]
[-- Type: text/x-patch, Size: 10795 bytes --]

diff -rupN a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
--- a/arch/powerpc/platforms/pasemi/pci.c	2017-09-11 17:04:18.257586417 +0200
+++ b/arch/powerpc/platforms/pasemi/pci.c	2017-09-11 17:03:43.040599938 +0200
@@ -27,6 +27,7 @@
 #include <linux/pci.h>
 
 #include <asm/pci-bridge.h>
+#include <asm/isa-bridge.h>
 #include <asm/machdep.h>
 
 #include <asm/ppc-pci.h>
@@ -108,6 +109,69 @@ static int workaround_5945(struct pci_bu
 	return 1;
 }
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+static int sb600_bus = 5;
+static void __iomem *iob_mapbase = NULL;
+
+static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
+                             int offset, int len, u32 *val);
+
+static void sb600_set_flag(int bus)
+{
+    struct resource res;
+    struct device_node *dn;
+       struct pci_bus *busp;
+       u32 val;
+       int err;
+
+       if (sb600_bus == -1)
+       {
+               busp = pci_find_bus(0, 0);
+               pa_pxp_read_config(busp, PCI_DEVFN(17,0), PCI_SECONDARY_BUS, 1, &val);
+
+               sb600_bus = val;
+
+               printk(KERN_CRIT "NEMO SB600 on bus %d.\n",sb600_bus);
+       }
+
+       if (iob_mapbase == NULL)
+       {
+        dn = of_find_compatible_node(NULL, "isa", "pasemi,1682m-iob");
+        if (!dn)
+        {
+               printk(KERN_CRIT "NEMO SB600 missing iob node\n");
+                       return;
+               }
+
+               err = of_address_to_resource(dn, 0, &res);
+        of_node_put(dn);
+
+               if (err)
+               {
+               printk(KERN_CRIT "NEMO SB600 missing resource\n");
+                       return;
+               }
+
+               printk(KERN_CRIT "NEMO SB600 IOB base %08lx\n",res.start);
+
+               iob_mapbase = ioremap(res.start + 0x100, 0x94);
+       }
+
+       if (iob_mapbase != NULL)
+       {
+               if (bus == sb600_bus)
+               {
+                       out_le32(iob_mapbase + 4, in_le32(iob_mapbase + 4) | 0x800);
+               }
+               else
+               {
+                       out_le32(iob_mapbase + 4, in_le32(iob_mapbase + 4) & ~0x800);
+               }
+       }
+}
+#endif
+
+
 static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
 			      int offset, int len, u32 *val)
 {
@@ -126,6 +190,10 @@ static int pa_pxp_read_config(struct pci
 
 	addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+       sb600_set_flag(bus->number);
+#endif
+
 	/*
 	 * Note: the caller has already checked that offset is
 	 * suitably aligned and that len is 1, 2 or 4.
@@ -210,6 +278,9 @@ static int __init pas_add_bridge(struct
 	/* Interpret the "ranges" property */
 	pci_process_bridge_OF_ranges(hose, dev, 1);
 
+	/* Scan for an isa bridge. */
+	isa_bridge_find_early(hose);
+
 	return 0;
 }
 
diff -rupN a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c
--- a/arch/powerpc/platforms/pasemi/setup.c	2017-09-11 17:04:18.256586450 +0200
+++ b/arch/powerpc/platforms/pasemi/setup.c	2017-09-11 17:03:43.042599888 +0200
@@ -34,6 +34,7 @@
 #include <asm/prom.h>
 #include <asm/iommu.h>
 #include <asm/machdep.h>
+#include <asm/i8259.h>
 #include <asm/mpic.h>
 #include <asm/smp.h>
 #include <asm/time.h>
@@ -72,6 +73,17 @@ static void __noreturn pas_restart(char
 		out_le32(reset_reg, 0x6000000);
 }
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+void pas_shutdown(void)
+{
+       /* (added by DStevens 19/06/13)
+          Set the PLD bit that makes the SB600 think the power button is being pressed */
+       void __iomem *pld_map = ioremap(0xf5000000,4096);
+       while (1)
+               out_8(pld_map+7,0x01);
+}
+#endif
+
 #ifdef CONFIG_SMP
 static arch_spinlock_t timebase_lock;
 static unsigned long timebase;
@@ -183,16 +195,30 @@ static int __init pas_setup_mce_regs(voi
 }
 machine_device_initcall(pasemi, pas_setup_mce_regs);
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+static void sb600_8259_cascade(struct irq_desc *desc)
+{
+	struct irq_chip *chip = irq_desc_get_chip(desc);
+	unsigned int cascade_irq = i8259_irq();
+
+	if (cascade_irq !=NO_IRQ)
+               generic_handle_irq(cascade_irq);
+
+	chip->irq_eoi(&desc->irq_data);
+}
+#endif
+
 static __init void pas_init_IRQ(void)
 {
 	struct device_node *np;
-	struct device_node *root, *mpic_node;
+	struct device_node *root, *mpic_node, *i8259_node;
 	unsigned long openpic_addr;
 	const unsigned int *opprop;
 	int naddr, opplen;
 	int mpic_flags;
 	const unsigned int *nmiprop;
 	struct mpic *mpic;
+	int gpio_virq;
 
 	mpic_node = NULL;
 
@@ -244,6 +270,22 @@ static __init void pas_init_IRQ(void)
 		mpic_unmask_irq(irq_get_irq_data(nmi_virq));
 	}
 
+
+#ifdef CONFIG_PPC_PASEMI_NEMO
+       // Connect legacy i8259 controller in SB600
+	i8259_node = of_find_node_by_path("/pxp@0,e0000000");
+	printk("Init i8259\n");
+	i8259_init(i8259_node, 0);
+	of_node_put(i8259_node);
+
+	gpio_virq = irq_create_mapping(NULL, 3);
+	irq_set_irq_type(gpio_virq, IRQ_TYPE_LEVEL_HIGH);
+	irq_set_chained_handler(gpio_virq, sb600_8259_cascade);
+	mpic_unmask_irq(irq_get_irq_data(gpio_virq));
+
+	irq_set_default_host(mpic->irqhost);
+
+#endif
 	of_node_put(mpic_node);
 	of_node_put(root);
 }
@@ -398,6 +440,18 @@ static const struct of_device_id pasemi_
 	{},
 };
 
+static struct resource rtc_resource[] = {{
+	.name = "rtc",
+	.start = 0x70,
+	.end = 0x71,
+	.flags = IORESOURCE_IO,
+}, {
+	.name = "rtc",
+	.start = 8,
+	.end = 8,
+	.flags = IORESOURCE_IRQ,
+}};
+
 static int __init pasemi_publish_devices(void)
 {
 	pasemi_pcmcia_init();
@@ -405,6 +459,10 @@ static int __init pasemi_publish_devices
 	/* Publish OF platform devices for SDC and other non-PCI devices */
 	of_platform_bus_probe(NULL, pasemi_bus_ids, NULL);
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+	platform_device_register_simple("rtc_cmos", -1, rtc_resource, 2);
+#endif
+
 	return 0;
 }
 machine_device_initcall(pasemi, pasemi_publish_devices);
@@ -421,9 +479,13 @@ static int __init pas_probe(void)
 
 	iommu_init_early_pasemi();
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+       pm_power_off              = pas_shutdown;         // Varisys provided a way to turn us off
+#endif
 	return 1;
 }
 
+
 define_machine(pasemi) {
 	.name			= "PA Semi PWRficient",
 	.probe			= pas_probe,
@@ -435,4 +497,7 @@ define_machine(pasemi) {
 	.calibrate_decr		= generic_calibrate_decr,
 	.progress		= pas_progress,
 	.machine_check_exception = pas_machine_check_handler,
+#if 0 // def CONFIG_PPC_PASEMI_NEMO
+       .pci_probe_mode = sb600_pci_probe_mode,
+#endif
 };
diff -rupN a/drivers/ata/pata_atiixp.c b/drivers/ata/pata_atiixp.c
--- a/drivers/ata/pata_atiixp.c	2017-09-11 17:04:26.591307805 +0200
+++ b/drivers/ata/pata_atiixp.c	2017-09-11 17:03:43.043599863 +0200
@@ -278,6 +278,12 @@ static int atiixp_init_one(struct pci_de
 	};
 	const struct ata_port_info *ppi[] = { &info, &info };
 
+        /* SB600 on the Nemo board doesn't have secondary port wired */
+        #ifdef CONFIG_PPC_PASEMI_NEMO
+        if((pdev->device == PCI_DEVICE_ID_ATI_IXP600_IDE))
+            ppi[1] = &ata_dummy_port_info;
+        #endif
+
 	return ata_pci_bmdma_init_one(pdev, ppi, &atiixp_sht, NULL,
 				      ATA_HOST_PARALLEL_SCAN);
 }
diff -rupN a/drivers/ata/pata_of_platform.c b/drivers/ata/pata_of_platform.c
--- a/drivers/ata/pata_of_platform.c	2017-09-11 17:04:26.565308689 +0200
+++ b/drivers/ata/pata_of_platform.c	2017-09-11 17:03:43.044599838 +0200
@@ -40,14 +40,36 @@ static int pata_of_platform_probe(struct
 		return -EINVAL;
 	}
 
-	ret = of_address_to_resource(dn, 1, &ctl_res);
-	if (ret) {
-		dev_err(&ofdev->dev, "can't get CTL address from "
-			"device tree\n");
-		return -EINVAL;
+	if (of_device_is_compatible(dn, "electra-ide")) {
+		/* Altstatus is really at offset 0x3f6 from the primary window
+		 * on electra-ide. Adjust ctl_res and io_res accordingly.
+		 */
+		ctl_res = io_res;
+		ctl_res.start = ctl_res.start+0x3f6;
+		io_res.end = ctl_res.start-1;
+
+#ifdef CONFIG_PPC_PASEMI_NEMO
+	} else if (of_device_is_compatible(dn, "electra-cf")) {
+		/* Task regs are at 0x800, with alt status @ 0x80e in the primary window
+		* on electra-cf. Adjust ctl_res and io_res accordingly.
+		*/
+		ctl_res = io_res;
+		io_res.start += 0x800;
+		ctl_res.start = ctl_res.start + 0x80e;
+		io_res.end = ctl_res.start-1;
+#endif
+	} else {
+		ret = of_address_to_resource(dn, 1, &ctl_res);
+		if (ret) {
+			dev_err(&ofdev->dev, "can't get CTL address from "
+				"device tree\n");
+			return -EINVAL;
+		}
 	}
 
 	irq_res = platform_get_resource(ofdev, IORESOURCE_IRQ, 0);
+	if (irq_res)
+		irq_res->flags = 0;
 
 	of_property_read_u32(dn, "reg-shift", &reg_shift);
 
@@ -60,6 +82,11 @@ static int pata_of_platform_probe(struct
 		dev_info(&ofdev->dev, "pio-mode unspecified, assuming PIO0\n");
 	}
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+       irq_res = 0;                    // force irq off (doesn't seem to work)
+#endif
+
+
 	pio_mask = 1 << pio_mode;
 	pio_mask |= (1 << pio_mode) - 1;
 
@@ -69,6 +96,10 @@ static int pata_of_platform_probe(struct
 
 static const struct of_device_id pata_of_platform_match[] = {
 	{ .compatible = "ata-generic", },
+	{ .compatible = "electra-ide", },
+#ifdef CONFIG_PPC_PASEMI_NEMO
+	{ .compatible = "electra-cf",},
+#endif
 	{ },
 };
 MODULE_DEVICE_TABLE(of, pata_of_platform_match);
diff -rupN a/drivers/i2c/busses/i2c-pasemi.c b/drivers/i2c/busses/i2c-pasemi.c
--- a/drivers/i2c/busses/i2c-pasemi.c	2017-09-11 17:04:23.084427043 +0200
+++ b/drivers/i2c/busses/i2c-pasemi.c	2017-09-11 17:03:43.045599813 +0200
@@ -365,7 +365,6 @@ static int pasemi_smb_probe(struct pci_d
 	smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
 	smbus->adapter.algo = &smbus_algorithm;
 	smbus->adapter.algo_data = smbus;
-	smbus->adapter.nr = PCI_FUNC(dev->devfn);
 
 	/* set up the sysfs linkage to our parent device */
 	smbus->adapter.dev.parent = &dev->dev;
@@ -373,7 +372,7 @@ static int pasemi_smb_probe(struct pci_d
 	reg_write(smbus, REG_CTL, (CTL_MTR | CTL_MRR |
 		  (CLK_100K_DIV & CTL_CLK_M)));
 
-	error = i2c_add_numbered_adapter(&smbus->adapter);
+	error = i2c_add_adapter(&smbus->adapter);
 	if (error)
 		goto out_release_region;
 
diff -rupN a/drivers/pci/probe.c b/drivers/pci/probe.c
--- a/drivers/pci/probe.c	2017-09-11 17:04:23.683406677 +0200
+++ b/drivers/pci/probe.c	2017-09-11 17:03:43.050599688 +0200
@@ -2177,6 +2177,8 @@ static int only_one_child(struct pci_bus
 
 	if (!parent || !pci_is_pcie(parent))
 		return 0;
+	#ifndef CONFIG_PPC_PASEMI_NEMO
+	// SB600 has non-zero devices on non-root bus.
 	if (pci_pcie_type(parent) == PCI_EXP_TYPE_ROOT_PORT)
 		return 1;
 
@@ -2189,6 +2191,7 @@ static int only_one_child(struct pci_bus
 	if (parent->has_secondary_link &&
 	    !pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))
 		return 1;
+	#endif
 	return 0;
 }
 

[PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Christian Zigotzky]

I mean: I haven't gotten an answer from Darren yet. Sorry because of my 
English. I am still learning.

-- Christian


On 22 December 2017 at 10:57AM, Christian Zigotzky wrote:
 > Hi Bjorn,
 >
 > Sorry I'm bothering you again. Is this small out of tree init routine 
in the Nemo patch? I haven't get an answer from Darren yet and I didn't 
found the small out of tree init routine in the Nemo patch. Please find 
attached the Nemo patch. Maybe you can find this small out of tree init 
routine.
 >
 > What do you think of this following code?
 >
 > if (sb600_bus == -1)
 > +       {
 > +               busp = pci_find_bus(0, 0);
 > +               pa_pxp_read_config(busp, PCI_DEVFN(17,0), 
PCI_SECONDARY_BUS, 1, &val);
 > +
 > +               sb600_bus = val;
 > +
 > +               printk(KERN_CRIT "NEMO SB600 on bus %d.\n",sb600_bus);
 > +       }
 >
 > Thanks,
 > Christian
 >
 >
 > On 04 December 2017 at 12:40PM, Darren Stevens wrote:
 > > Hello Bjorn
 > >
 > > Firstly sorry for not being able to join in this discussion, I have 
been
 > > moving house and only got my X1000 set up again yesterday..
 > >
 > > On 30/11/2017, Bjorn Helgaas wrote:
 > >> I *think* something like the patch below should make this work if you
 > >> use the "pci=pcie_scan_all" parameter.  We have some x86 DMI quirks
 > >> that set PCI_SCAN_ALL_PCIE_DEVS automatically.  I don't know how to do
 > >> something similar on powerpc, but maybe you do?
 > >
 > > Actually the root ports on the Nemo's PA6T processor don't respond 
to the
 > > SB600 unless we turn on a special 'relax pci-e' bit in one of its 
control
 > > registers. We use a small out of tree init routine to do this, and 
there
 > > would be the ideal place to put a call to
 > > pci_set_flag(PCI_SCAN_ALL_PCIE_DEVS).
 > >
 > > This patch fixes the last major hurdle to getting the X1000 fully 
supported in
 > > the linux kernel, so thanks very much for that.
 > >
 > > Regards
 > > Darren
 > >
 > >
 >

Re: [PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Michael Ellerman]

Christian Zigotzky <chzigotzky@xenosoft.de> writes:

> Hi Bjorn,
>
> Sorry I'm bothering you again. Is this small out of tree init routine in=
=20
> the Nemo patch? I haven't get an answer from Darren yet and I didn't=20
> found the small out of tree init routine in the Nemo patch. Please find=20
> attached the Nemo patch. Maybe you can find this small out of tree init=20
> routine.
>
> What do you think of this following code?
>
> if (sb600_bus =3D=3D -1)
> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 {
> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0 busp =3D pci_find_bus(0, 0);
> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0 pa_pxp_read_config(busp, PCI_DEVFN(17,0),=20
> PCI_SECONDARY_BUS, 1, &val);
> +
> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0 sb600_bus =3D val;
> +
> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0 printk(KERN_CRIT "NEMO SB600 on bus %d.\n",sb600_bus);
> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 }

I suspect Darren was referring to all of sb600_set_flag().

What we'd really like is to be able to do something like:

void __init pas_pci_init(void)
{
	...

	if (of_find_compatible_node(NULL, NULL, "nemo-something"))
		pci_set_flag(PCI_SCAN_ALL_PCIE_DEVS).


But I don't know if there's anything in the NEMO device tree that we can
use to uniquely identify those machines? ie. the "nemo-something" string.

Can you attach the output of `lsprop /proc/device-tree` ?

cheers

[PATCH] SB600 for the Nemo board has non-zero devices on non-root bus

[Christian Zigotzky]

[-- Attachment #1: Type: text/plain, Size: 885 bytes --]

Hi Michael,

Thanks a lot for your reply! :-)

I have found two interesting lines in the device tree:

compatible       "pasemi,nemo"
model            "pasemi,nemo"

What do you think?

Please find attached the output of `lsprop /proc/device-tree`.

Thanks,
Christian


On 22.12.2017 12:19, Michael Ellerman wrote:
 >
 > I suspect Darren was referring to all of sb600_set_flag().
 >
 > What we'd really like is to be able to do something like:
 >
 > void __init pas_pci_init(void)
 > {
 >     ...
 >
 >     if (of_find_compatible_node(NULL, NULL, "nemo-something"))
 >         pci_set_flag(PCI_SCAN_ALL_PCIE_DEVS).
 >
 >
 > But I don't know if there's anything in the NEMO device tree that we can
 > use to uniquely identify those machines? ie. the "nemo-something" string.
 >
 > Can you attach the output of `lsprop /proc/device-tree` ?
 >
 > cheers
 >



[-- Attachment #2: nemo_device-tree.txt --]
[-- Type: text/plain, Size: 30529 bytes --]

compatible       "pasemi,nemo"
		 "pasemi,pa6t-1682m"
		 "PA6T-1682M"
		 "pasemi,pwrficient"
		 "pasemi"
device_type      "bootrom"
model            "pasemi,nemo"
#interrupt-cells 00000002
#address-cells   00000002
#size-cells      00000002
linux,phandle    7fdff018 (2145382424)
platform-open-pic 00000000 fc000000 00000000 00041000
name             ""

/proc/device-tree/sdc@fc000000:
compatible       "1682m-sdc"
		 "pasemi,pwrficient-sdc"
		 "pasemi,sdc"
device_type      "sdc"
#address-cells   00000001
#size-cells      00000001
reg              00000000 fc000000 00000000 00800000
linux,phandle    7fe2f458 (2145580120)
name             "sdc"

/proc/device-tree/sdc@fc000000/rng@fc105000:
compatible       "1682m-rng"
		 "pasemi,pwrficient-rng"
		 "pasemi,rng"
device_type      "rng"
reg              fc105000 00001000
linux,phandle    7fe2fdd0 (2145582544)
name             "rng"

/proc/device-tree/sdc@fc000000/mdio@0:
compatible       "gpio-mdio"
mdc-pin          00000005
#address-cells   00000001
#size-cells      00000000
reg              00000000 00000000
linux,phandle    7fe3d5a0 (2145637792)
mdio-pin         00000006
name             "mdio"

/proc/device-tree/sdc@fc000000/mdio@0/ethernet-phy@0:
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       00000007 00000001
reg              00000000
linux,phandle    7fe3d860 (2145638496)
name             "ethernet-phy"

/proc/device-tree/sdc@fc000000/openpic@fc000000:
compatible       "pasemi,pwrficient-openpic"
		 "chrp,open-pic"
device_type      "open-pic"
msi-available-ranges 00000200 00000200
#interrupt-cells 00000002
#address-cells   00000000
reg              fc000000 00100000
linux,phandle    7fe2f6e8 (2145580776)
name             "openpic"
interrupt-controller

/proc/device-tree/sdc@fc000000/gizmo@fc104000:
compatible       "1682m-gizmo"
		 "pasemi,pwrficient-gizmo"
		 "pasemi,gizmo"
device_type      "gizmo"
reg              fc104000 00001000
linux,phandle    7fe2fbf0 (2145582064)
name             "gizmo"

/proc/device-tree/sdc@fc000000/gpio@fc103000:
compatible       "1682m-gpio"
		 "pasemi,pwrficient-gpio"
		 "pasemi,gpio"
device_type      "gpio"
reg              fc103000 00001000
linux,phandle    7fe2fa18 (2145581592)
name             "gpio"

/proc/device-tree/options:
MENU_2_LABEL     "Debian Sid/experimental Kernel 4.9"
MENU_4_COMMAND   "set pmu -astate=A4 ; ramdisk -z -addr=0x24000000 -fatfs cf0:slitaz25.gz ; boot -elf -noints -fatfs cf0:vmlinux-3.13.14"
ETH0_HWADDR      "00:50:C2:20:DA:9E"
CFE_MEMORYSIZE   "8192"
MENU_5_LABEL     "Fedora 17 Kernel 3.13.9"
MENU_8_LABEL     "ubuntu MATE 16.04.2 LTS Kernel 4.9"
MENU_1_COMMAND   "setenv amigaboot_quiet Y ;boot -fs=iso atapi0.1:amigaboot.of"
MENU_8_COMMAND   "set pmu -astate=A4 ; setenv bootargs "root=/dev/sdb1 quiet ro splash" ; boot -elf -noints -fatfs cf0:vmlinux-4.9"
bootargs         "root=/dev/sda4"
STARTUP          "speed;menu"
MENU_DEFAULT     "0"
MENU_0_LABEL     "AmigaOS"
MENU_5_COMMAND   73657420 706d7520 2d617374 6174653d
		 4134203b 20736574 656e7620 626f6f74
		 61726773 20227264 2e6d643d 30207264
		 2e6c766d 3d302072 642e646d 3d302053
		 5953464f 4e543d54 72756520 4b455954
		 41424c45 3d646520 72642e6c 756b733d
		 3020726f 6f743d2f 6465762f 73646233
		 204c414e 473d6465 5f44452e 5554462d
		 [191 bytes total]
MENU_3_LABEL     "ubuntu MATE 17.04 Kernel 4.9"
MENU_6_LABEL     "Fedora 25 PPC64 Kernel 4.9"
MENU_2_COMMAND   "set pmu -astate=A4 ; setenv bootargs "root=/dev/sda4" ; boot -elf -noints -fatfs cf0:vmlinux-4.9"
MENU_9_LABEL     "openSUSE Tumbleweed Kernel 4.14"
speed            "set pmu -astate=A4"
MENU_9_COMMAND   "set pmu -astate=A4 ; setenv bootargs "root=/dev/sdb6 splash=silent" ; boot -elf -noints -fatfs cf0:vmlinux-4.14"
BOOT_CONSOLE     "pcconsole0"
CFE_VERSION      "PAS-2.0.30"
little-endian?   00000000
MENU_6_COMMAND   "set pmu -astate=A4 ; setenv bootargs "root=/dev/sdb4" ; boot -elf -noints -fatfs cf0:vmlinux-4.9"
CFE_BOARDNAME    "NEMO"
MENU_1_LABEL     "AmigaOS CD Boot"
MENU_4_LABEL     "SliTaz Snapshot 25 Kernel 3.13.14"
MENU_3_COMMAND   "set pmu -astate=A4 ; setenv bootargs "root=/dev/sdb7 quiet ro splash" ; boot -elf -noints -fatfs cf0:vmlinux-4.9"
MENU_7_LABEL     "openSUSE 11.1 Kernel 4.13"
os4_commandline  "DEBUGLEVEL=0 SERIAL"
MENU_0_COMMAND   "setenv amigaboot_quiet Y ;boot -fs=amigafs ide0.0:amigaboot.of"
linux,phandle    7fe2f1f0 (2145579504)
MENU_TIMEOUT     "6"
MENU_7_COMMAND   "set pmu -astate=A4 ; setenv bootargs "root=/dev/sdb5" ; boot -elf -noints -fatfs cf0:vmlinux-4.13"
framebuffer      "800/600/8/0x90000000/832"
name             "options"

/proc/device-tree/chosen:
linux,stdout-package 7fe35880 (2145605760)
bootargs         "root=/dev/sda4"
cpu              7fe30698 (2145584792)
stdout           7fe35990 (2145606032)
memory           7fe316c8 (2145588936)
stdin            7fe35990 (2145606032)
linux,stdout-path "/bootconsole"
sdc-interrupt-controller 7fe2f6e8 (2145580776)
linux,phandle    7fe34628 (2145601064)
name             "chosen"

/proc/device-tree/openprom:
device_type      "BootROM"
model            "Open Firmware 3"
linux,phandle    7fe2f2f0 (2145579760)
name             "openprom"

/proc/device-tree/localbus@f0000000:
compatible       "pasemi,localbus"
		 "localbus"
device_type      "localbus"
ranges           00000000 00000000 f0000000 0c000000
#interrupt-cells 00000002
#address-cells   00000001
#size-cells      00000001
reg              00000000 f0000000 00000000 0c000000
linux,phandle    7fe342e0 (2145600224)
name             "localbus"

/proc/device-tree/localbus@f0000000/cf@1000000:
compatible       "pasemi,chitra-cf"
		 "pasemi,electra-cf"
		 "electra-cf"
card-3v-gpio     0000000a (10)
device_type      "electra-cf"
card-vsense-gpio 00000001
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       00000000 00000001
reg              00000000 00001000 01000000 00001000
card-detect-gpio 0000000e (14)
linux,phandle    7fe3da70 (2145639024)
card-5v-gpio     0000000b (11)
name             "cf"

/proc/device-tree/memory:
device_type      "memory"
available        00000000 00000000 00000000 7fd1d000
		 00000001 00000000 00000001 80000000
reg              00000000 00000000 00000000 80000000
		 00000001 00000000 00000001 80000000
linux,phandle    7fe316c8 (2145588936)
name             "memory"

/proc/device-tree/pxp@0,e0000000:
compatible       "pasemi,rootbus"
		 "pa-pxp"
device_type      "pci"
interrupt-map-mask 00000000 00000000 00000000 000000ff
model            "pa"
ranges           00000000 00000000 e0000000 00000000
		 e0000000 00000000 10000000 01000000
		 00000000 00000000 00000000 fc800000
		 00000000 00800000 02000000 00000000
		 80000000 00000000 80000000 00000000
		 60000000 02000000 00000000 e0000000
		 00000000 e0000000 00000000 00100000
		 02000000 00000000 fd800000 00000000
		 [168 bytes total]
#interrupt-cells 00000001
bus-range        00000000 000000ff
#address-cells   00000003
interrupt-map    00000000 00000000 00000000 00000030
		 7fe2f6e8 00000030 00000001 00000000
		 00000000 00000000 00000031 7fe2f6e8
		 00000031 00000001 00000000 00000000
		 00000000 00000032 7fe2f6e8 00000032
		 00000001 00000000 00000000 00000000
		 00000033 7fe2f6e8 00000033 00000001
#size-cells      00000002
reg              00000000 e0000000 00000000 10000000
linux,phandle    7fe2ffa8 (2145583016)
name             "pxp"
interrupt-controller

/proc/device-tree/pxp@0,e0000000/i2c@1c,2:
assigned-addresses 8100e210 00000000 007f0280 00000000 00000040
device_type      "i2c"
revision-id      00000001
class-code       000c0500 (787712)
vendor-id        00001959 (6489)
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       00000048 00000001
device-id        0000a003 (40963)
reg              0000e200 00000000 00000000 00000000 00000000
		 0100e210 00000000 00000000 00000000 00000040
linux,phandle    7fe33c80 (2145598592)
name             "i2c"

/proc/device-tree/pxp@0,e0000000/pci@8:
device_type      "pci"
revision-id      00000012 (18)
class-code       000b2000 (729088)
vendor-id        00001959 (6489)
device-id        0000a000 (40960)
reg              00004000 00000000 00000000 00000000 00000000
linux,phandle    7fe383f8 (2145616888)
name             "pci"

/proc/device-tree/pxp@0,e0000000/serial@1d,1:
current-speed    0001c200 (115200)
compatible       "ns16550"
		 "pciclass,0700"
assigned-addresses 8100e910 00000000 007f02f8 00000000 00000008
device_type      "serial"
revision-id      00000002
class-code       00070003 (458755)
vendor-id        00001959 (6489)
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       0000004a 00000001
device-id        0000a004 (40964)
reg              0000e900 00000000 00000000 00000000 00000000
		 0100e910 00000000 00000000 00000000 00000008
clock-frequency  07f28155 (133333333)
linux,phandle    7fe31db0 (2145590704)
name             "serial"

/proc/device-tree/pxp@0,e0000000/pci@1b:
device_type      "pci"
revision-id      00000011 (17)
class-code       00088000 (557056)
vendor-id        00001959 (6489)
device-id        0000a00b (40971)
reg              0000d800 00000000 00000000 00000000 00000000
linux,phandle    7fe38d78 (2145619320)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@11,2:
device_type      "pci"
revision-id      00000011 (17)
class-code       00060400 (394240)
vendor-id        00001959 (6489)
#interrupt-cells 00000001
bus-range        00000008 00000008
#address-cells   00000003
#size-cells      00000002
device-id        0000a002 (40962)
reg              00008a00 00000000 00000000 00000000 00000000
linux,phandle    7fe367d0 (2145609680)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@4:
device_type      "pci"
revision-id      00000011 (17)
class-code       00050000 (327680)
vendor-id        00001959 (6489)
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       00000058 00000001
device-id        0000a00a (40970)
reg              00002000 00000000 00000000 00000000 00000000
linux,phandle    7fe37d08 (2145615112)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@10:
device_type      "pci"
revision-id      00000011 (17)
class-code       00060400 (394240)
ranges           01000000 00000000 00002000 01000000
		 00000000 00002000 00000000 00001000
		 02000000 00000000 90000000 02000000
		 00000000 90000000 00000000 10100000
vendor-id        00001959 (6489)
#interrupt-cells 00000001
bus-range        00000001 00000001
#address-cells   00000003
#size-cells      00000002
device-id        0000a002 (40962)
reg              00008000 00000000 00000000 00000000 00000000
linux,phandle    7fe374d8 (2145613016)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@10/pci@0,1:
assigned-addresses 82010110 00000000 a0040000 00000000 00004000
device_type      "pci"
revision-id      00000000
subsystem-id     0000aa88 (43656)
class-code       00040300 (262912)
vendor-id        00001002 (4098)
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       00000031 00000001
device-id        0000aa88 (43656)
reg              00010100 00000000 00000000 00000000 00000000
		 02010110 00000000 00000000 00000000 00004000
subsystem-vendor-id 00001682 (5762)
linux,phandle    7fe39948 (2145622344)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@10/pci@0:
assigned-addresses c2010010 00000000 90000000 00000000 10000000
		 82010018 00000000 a0020000 00000000 00020000
		 81010020 00000000 00002000 00000000 00000100
device_type      "pci"
revision-id      00000000
subsystem-id     00003107 (12551)
class-code       00030000 (196608)
vendor-id        00001002 (4098)
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       00000030 00000001
device-id        00006738 (26424)
reg              00010000 00000000 00000000 00000000 00000000
		 42010010 00000000 00000000 00000000 10000000
		 02010018 00000000 00000000 00000000 00020000
		 01010020 00000000 00000000 00000000 00000100
subsystem-vendor-id 00001682 (5762)
linux,phandle    7fe39458 (2145621080)
name             "pci"

/proc/device-tree/pxp@0,e0000000/i2c@1c,1:
assigned-addresses 8100e110 00000000 007f0240 00000000 00000040
device_type      "i2c"
revision-id      00000001
class-code       000c0500 (787712)
vendor-id        00001959 (6489)
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       00000047 00000001
device-id        0000a003 (40963)
reg              0000e100 00000000 00000000 00000000 00000000
		 0100e110 00000000 00000000 00000000 00000040
linux,phandle    7fe33890 (2145597584)
name             "i2c"

/proc/device-tree/pxp@0,e0000000/pci@1e:
assigned-addresses 8100f010 00000000 007f0400 00000000 00000100
		 8100f014 00000000 007f0500 00000000 00000100
device_type      "pci"
revision-id      00000012 (18)
class-code       000601ff (393727)
vendor-id        00001959 (6489)
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       00000051 00000001
device-id        0000a008 (40968)
reg              0000f000 00000000 00000000 00000000 00000000
		 0100f010 00000000 00000000 00000000 00000100
		 0100f014 00000000 00000000 00000000 00000100
linux,phandle    7fe39040 (2145620032)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@9:
device_type      "pci"
revision-id      00000012 (18)
class-code       000b2000 (729088)
vendor-id        00001959 (6489)
device-id        0000a000 (40960)
reg              00004800 00000000 00000000 00000000 00000000
linux,phandle    7fe386c0 (2145617600)
name             "pci"

/proc/device-tree/pxp@0,e0000000/io-bridge@0:
compatible       "pasemi,1682m-iob"
		 "pasemi,io-bridge"
assigned-addresses 82000000 00000000 e0000000 00000000 00002000
		 c2000000 00000000 fd800000 00000000 00001000
device_type      "isa"
revision-id      00000012 (18)
class-code       00060000 (393216)
vendor-id        00001959 (6489)
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       00000056 00000001
device-id        0000a001 (40961)
reg              00000000 00000000 00000000 00000000 00000000
		 82000000 00000000 e0000000 00000000 00002000
		 c2000000 00000000 fd800000 00000000 00001000
linux,phandle    7fe32728 (2145593128)
name             "io-bridge"

/proc/device-tree/pxp@0,e0000000/pci@15:
assigned-addresses 82000000 00000000 e00a8000 00000000 00001000
device_type      "pci"
revision-id      00000011 (17)
class-code       00020000 (131072)
vendor-id        00001959 (6489)
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       00000044 00000001
device-id        0000a006 (40966)
reg              0000a800 00000000 00000000 00000000 00000000
		 82000000 00000000 e00a8000 00000000 00001000
linux,phandle    7fe38988 (2145618312)
name             "pci"

/proc/device-tree/pxp@0,e0000000/dma-engine@1a:
compatible       "1682m-dma"
		 "pasemi,dma-engine"
assigned-addresses 82000000 00000000 e00d0000 00000000 00001000
device_type      "dma-engine"
revision-id      00000012 (18)
class-code       000801ff (524799)
vendor-id        00001959 (6489)
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       00000080 00000001
device-id        0000a007 (40967)
reg              0000d000 00000000 00000000 00000000 00000000
		 82000000 00000000 e00d0000 00000000 00001000
linux,phandle    7fe322b8 (2145591992)
name             "dma-engine"

/proc/device-tree/pxp@0,e0000000/pci@11,3:
device_type      "pci"
revision-id      00000011 (17)
class-code       00060400 (394240)
vendor-id        00001959 (6489)
#interrupt-cells 00000001
bus-range        00000009 00000009
#address-cells   00000003
#size-cells      00000002
device-id        0000a002 (40962)
reg              00008b00 00000000 00000000 00000000 00000000
linux,phandle    7fe363a8 (2145608616)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@5:
device_type      "pci"
revision-id      00000011 (17)
class-code       00050000 (327680)
vendor-id        00001959 (6489)
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       0000005a 00000001
device-id        0000a00a (40970)
reg              00002800 00000000 00000000 00000000 00000000
linux,phandle    7fe38080 (2145616000)
name             "pci"

/proc/device-tree/pxp@0,e0000000/i2c@1c:
assigned-addresses 8100e010 00000000 007f0200 00000000 00000040
device_type      "i2c"
revision-id      00000001
class-code       000c0500 (787712)
vendor-id        00001959 (6489)
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       00000046 00000001
device-id        0000a003 (40963)
reg              0000e000 00000000 00000000 00000000 00000000
		 0100e010 00000000 00000000 00000000 00000040
linux,phandle    7fe334a0 (2145596576)
name             "i2c"

/proc/device-tree/pxp@0,e0000000/cache-controller@1:
compatible       "pasemi,1682m-l2c"
		 "pasemi,l2c"
device_type      "cache-controller"
revision-id      00000011 (17)
class-code       00058000 (360448)
vendor-id        00001959 (6489)
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       00000052 00000001
device-id        0000a009 (40969)
reg              00000800 00000000 00000000 00000000 00000000
linux,phandle    7fe32bc8 (2145594312)
name             "cache-controller"

/proc/device-tree/pxp@0,e0000000/pci@11:
device_type      "pci"
revision-id      00000011 (17)
class-code       00060400 (394240)
ranges           01000000 00000000 00000000 01000000
		 00000000 00000000 00000000 00004000
		 02000000 00000000 a0100000 02000000
		 00000000 a0100000 00000000 00300000
vendor-id        00001959 (6489)
#interrupt-cells 00000001
bus-range        00000005 00000006
#address-cells   00000003
#size-cells      00000002
device-id        0000a002 (40962)
reg              00008800 00000000 00000000 00000000 00000000
linux,phandle    7fe37020 (2145611808)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@11/pci@14,1:
assigned-addresses 8105a110 00000000 00001030 00000000 00000008
		 8105a114 00000000 00001054 00000000 00000004
		 8105a118 00000000 00001038 00000000 00000008
		 8105a11c 00000000 00001050 00000000 00000004
		 8105a120 00000000 00001000 00000000 00000010
device_type      "pci"
revision-id      00000000
class-code       00010183 (65923)
vendor-id        00001002 (4098)
interrupt-parent 7fe2ffa8 (2145583016)
interrupts       00000009 00000001
device-id        0000438c (17292)
reg              0005a100 00000000 00000000 00000000 00000000 0105a110
		 00000000 00000000 00000000 00000008 0105a114 00000000
		 00000000 00000000 00000004 0105a118 00000000 00000000
		 00000000 00000008 0105a11c 00000000 00000000 00000000
		 00000004 0105a120 00000000 00000000 00000000 00000010
linux,phandle    7fe3bfb0 (2145632176)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@11/pci@13,5:
assigned-addresses 82059d10 00000000 a0209800 00000000 00000100
device_type      "pci"
revision-id      00000000
class-code       000c0320 (787232)
vendor-id        00001002 (4098)
interrupt-parent 7fe2ffa8 (2145583016)
interrupts       0000000c 00000001
device-id        00004386 (17286)
reg              00059d00 00000000 00000000 00000000 00000000
		 02059d10 00000000 00000000 00000000 00000100
linux,phandle    7fe3b858 (2145630296)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@11/pci@13,3:
assigned-addresses 82059b10 00000000 a0204000 00000000 00001000
device_type      "pci"
revision-id      00000000
class-code       000c0310 (787216)
vendor-id        00001002 (4098)
interrupt-parent 7fe2ffa8 (2145583016)
interrupts       0000000a 00000001
device-id        0000438a (17290)
reg              00059b00 00000000 00000000 00000000 00000000
		 02059b10 00000000 00000000 00000000 00001000
linux,phandle    7fe3b078 (2145628280)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@11/pci@14:
assigned-addresses 8105a010 00000000 00001020 00000000 00000010
		 8205a014 00000000 a0209000 00000000 00000400
device_type      "pci"
revision-id      00000014 (20)
class-code       000c0500 (787712)
vendor-id        00001002 (4098)
device-id        00004385 (17285)
reg              0005a000 00000000 00000000 00000000 00000000
		 0105a010 00000000 00000000 00000000 00000010
		 0205a014 00000000 00000000 00000000 00000400
linux,phandle    7fe3bc48 (2145631304)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@11/pci@13,1:
assigned-addresses 82059910 00000000 a0207000 00000000 00001000
device_type      "pci"
revision-id      00000000
class-code       000c0310 (787216)
vendor-id        00001002 (4098)
interrupt-parent 7fe2ffa8 (2145583016)
interrupts       0000000a 00000001
device-id        00004388 (17288)
reg              00059900 00000000 00000000 00000000 00000000
		 02059910 00000000 00000000 00000000 00001000
linux,phandle    7fe3a898 (2145626264)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@11/pci@12:
assigned-addresses 81059010 00000000 00001040 00000000 00000008 81059014
		 00000000 0000105c 00000000 00000004 81059018 00000000
		 00001048 00000000 00000008 8105901c 00000000 00001058
		 00000000 00000004 81059020 00000000 00001010 00000000
		 00000010 82059024 00000000 a0209400 00000000 00000400
device_type      "pci"
revision-id      00000000
class-code       0001018f (65935)
vendor-id        00001002 (4098)
interrupt-parent 7fe2ffa8 (2145583016)
interrupts       00000009 00000001
device-id        00004380 (17280)
reg              00059000 00000000 00000000 00000000
		 00000000 01059010 00000000 00000000
		 00000000 00000008 01059014 00000000
		 00000000 00000000 00000004 01059018
		 00000000 00000000 00000000 00000008
		 0105901c 00000000 00000000 00000000
		 00000004 01059020 00000000 00000000
		 00000000 00000010 02059024 00000000
		 [140 bytes total]
linux,phandle    7fe39de8 (2145623528)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@11/pci@12/ide0.0:
device_type      "block"
linux,phandle    7fe3a2a0 (2145624736)
name             "ide0.0"

/proc/device-tree/pxp@0,e0000000/pci@11/pci@12/atapi0.1:
device_type      "block"
linux,phandle    7fe3a3a0 (2145624992)
name             "atapi0.1"

/proc/device-tree/pxp@0,e0000000/pci@11/pci@14,4:
device_type      "pci"
revision-id      00000000
class-code       00060400 (394240)
ranges           01000000 00000000 00003000 01000000
		 00000000 00003000 00000000 00001000
		 02000000 00000000 a0300000 02000000
		 00000000 a0300000 00000000 00100000
vendor-id        00001002 (4098)
#interrupt-cells 00000001
bus-range        00000006 00000006
#address-cells   00000003
#size-cells      00000002
device-id        00004384 (17284)
reg              0005a400 00000000 00000000 00000000 00000000
linux,phandle    7fe3cc20 (2145635360)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@11/pci@14,4/pci@5:
assigned-addresses 81062810 00000000 00003000 00000000 00000100
		 82062814 00000000 a0310000 00000000 00000100
device_type      "pci"
revision-id      00000010 (16)
subsystem-id     00008139 (33081)
class-code       00020000 (131072)
vendor-id        000010ec (4332)
interrupt-parent 7fe2ffa8 (2145583016)
interrupts       00000004 00000001
device-id        00008139 (33081)
reg              00062800 00000000 00000000 00000000 00000000
		 01062810 00000000 00000000 00000000 00000100
		 02062814 00000000 00000000 00000000 00000100
subsystem-vendor-id 000010ec (4332)
linux,phandle    7fe3d0d8 (2145636568)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@11/pci@14,2:
assigned-addresses 8205a210 00000000 a0200000 00000000 00004000
device_type      "pci"
revision-id      00000000
subsystem-id     00001000 (4096)
class-code       00040300 (262912)
vendor-id        00001002 (4098)
interrupt-parent 7fe2ffa8 (2145583016)
interrupts       00000009 00000001
device-id        00004383 (17283)
reg              0005a200 00000000 00000000 00000000 00000000
		 0205a210 00000000 00000000 00000000 00004000
subsystem-vendor-id 00001888 (6280)
linux,phandle    7fe3c440 (2145633344)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@11/pci@13,4:
assigned-addresses 82059c10 00000000 a0205000 00000000 00001000
device_type      "pci"
revision-id      00000000
class-code       000c0310 (787216)
vendor-id        00001002 (4098)
interrupt-parent 7fe2ffa8 (2145583016)
interrupts       0000000b 00000001
device-id        0000438b (17291)
reg              00059c00 00000000 00000000 00000000 00000000
		 02059c10 00000000 00000000 00000000 00001000
linux,phandle    7fe3b468 (2145629288)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@11/pci@13,2:
assigned-addresses 82059a10 00000000 a0206000 00000000 00001000
device_type      "pci"
revision-id      00000000
class-code       000c0310 (787216)
vendor-id        00001002 (4098)
interrupt-parent 7fe2ffa8 (2145583016)
interrupts       0000000b 00000001
device-id        00004389 (17289)
reg              00059a00 00000000 00000000 00000000 00000000
		 02059a10 00000000 00000000 00000000 00001000
linux,phandle    7fe3ac88 (2145627272)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@11/pci@13:
assigned-addresses 82059810 00000000 a0208000 00000000 00001000
device_type      "pci"
revision-id      00000000
class-code       000c0310 (787216)
vendor-id        00001002 (4098)
interrupt-parent 7fe2ffa8 (2145583016)
interrupts       00000009 00000001
device-id        00004387 (17287)
reg              00059800 00000000 00000000 00000000 00000000
		 02059810 00000000 00000000 00000000 00001000
linux,phandle    7fe3a4a8 (2145625256)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@11/pci@14,3:
assigned-addresses 8205a310 00000000 a0100000 00000000 00100000
device_type      "pci"
revision-id      00000000
class-code       00060100 (393472)
vendor-id        00001002 (4098)
device-id        0000438d (17293)
reg              0005a300 00000000 00000000 00000000 00000000
		 0205a310 00000000 00000000 00000000 00100000
linux,phandle    7fe3c8e0 (2145634528)
name             "pci"

/proc/device-tree/pxp@0,e0000000/pci@11,1:
device_type      "pci"
revision-id      00000011 (17)
class-code       00060400 (394240)
vendor-id        00001959 (6489)
#interrupt-cells 00000001
bus-range        00000007 00000007
#address-cells   00000003
#size-cells      00000002
device-id        0000a002 (40962)
reg              00008900 00000000 00000000 00000000 00000000
linux,phandle    7fe36bf8 (2145610744)
name             "pci"

/proc/device-tree/pxp@0,e0000000/serial@1d:
current-speed    0001c200 (115200)
compatible       "ns16550"
		 "pciclass,0700"
assigned-addresses 8100e810 00000000 007f03f8 00000000 00000008
device_type      "serial"
revision-id      00000002
class-code       00070003 (458755)
vendor-id        00001959 (6489)
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       00000049 00000001
device-id        0000a004 (40964)
reg              0000e800 00000000 00000000 00000000 00000000
		 0100e810 00000000 00000000 00000000 00000008
clock-frequency  07f28155 (133333333)
linux,phandle    7fe318a8 (2145589416)
name             "serial"

/proc/device-tree/pxp@0,e0000000/ethernet@14,3:
phy-handle       7fe3d860 (2145638496)
compatible       "pasemi,1682m-gmac"
		 "pasemi,ethernet"
assigned-addresses 82000000 00000000 e00a3000 00000000 00001000
local-mac-address 02 00 ffffffe0 0a 30 00                              ....0.
device_type      "ethernet"
revision-id      00000011 (17)
class-code       00020000 (131072)
vendor-id        00001959 (6489)
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       00000043 00000001
device-id        0000a005 (40965)
reg              0000a300 00000000 00000000 00000000 00000000
		 82000000 00000000 e00a3000 00000000 00001000
linux,phandle    7fe32fd0 (2145595344)
name             "ethernet"

/proc/device-tree/pxp@0,e0000000/pci@3:
device_type      "pci"
revision-id      00000013 (19)
class-code       00080080 (524416)
vendor-id        00001959 (6489)
interrupt-parent 7fe2f6e8 (2145580776)
interrupts       00000054 00000001
device-id        0000a00c (40972)
reg              00001800 00000000 00000000 00000000 00000000
linux,phandle    7fe37990 (2145614224)
name             "pci"

/proc/device-tree/lpc@fe000000:
device_type      "lpc"
ranges           fe000000 00000000 fe000000 02000000
#address-cells   00000001
#size-cells      00000001
reg              00000000 fe000000 00000000 02000000
linux,phandle    7fe34070 (2145599600)
name             "lpc"

/proc/device-tree/bootconsole:
device_type      "bootconsole"
linux,phandle    7fe35880 (2145605760)
name             "bootconsole"

/proc/device-tree/cpus:
#address-cells   00000001
#size-cells      00000000
linux,phandle    7fe30540 (2145584448)
name             "cpus"

/proc/device-tree/cpus/PowerPC,PA6T@0:
bus-frequency    35a4e900 (900000000)
64-bit          
timebase-frequency 03f940aa (66666666)
graphics        
device_type      "cpu"
ibm,segment-page-sizes 0000000c 00000000 00000001 0000000c
		 00000000 0000000e 00000020 00000001
		 0000000e 00000001 00000010 00000110
		 00000001 00000010 00000003 00000012
		 00000130 00000001 00000012 0000000f
		 00000014 00000030 00000001 00000014
		 0000001f 00000018 00000100 00000001
		 00000018 00000000 0000001e 00000120
		 [140 bytes total]
i-cache-line-size 00000040 (64)
cpu-version      00900102 (9437442)
i-cache-block-size 00000040 (64)
reg              00000000
d-cache-block-size 00000040 (64)
clock-frequency  6b49d200 (1800000000)
ibm,processor-segment-sizes 0000001c 00000028
linux,phandle    7fe30698 (2145584792)
d-cache-size     00010000 (65536)
i-cache-size     00010000 (65536)
general-purpose 
name             "PowerPC,PA6T"
ibm,processor-page-sizes 0000000c 0000000e 00000010 00000012
		 00000014 00000018 0000001e
d-cache-sets     00000002
i-cache-sets     00000002
d-cache-line-size 00000040 (64)

/proc/device-tree/cpus/PowerPC,PA6T@1:
bus-frequency    35a4e900 (900000000)
64-bit          
timebase-frequency 03f940aa (66666666)
graphics        
device_type      "cpu"
ibm,segment-page-sizes 0000000c 00000000 00000001 0000000c
		 00000000 0000000e 00000020 00000001
		 0000000e 00000001 00000010 00000110
		 00000001 00000010 00000003 00000012
		 00000130 00000001 00000012 0000000f
		 00000014 00000030 00000001 00000014
		 0000001f 00000018 00000100 00000001
		 00000018 00000000 0000001e 00000120
		 [140 bytes total]
i-cache-line-size 00000040 (64)
cpu-version      00900102 (9437442)
i-cache-block-size 00000040 (64)
reg              00000001
d-cache-block-size 00000040 (64)
clock-frequency  6b49d200 (1800000000)
ibm,processor-segment-sizes 0000001c 00000028
linux,phandle    7fe30eb0 (2145586864)
d-cache-size     00010000 (65536)
i-cache-size     00010000 (65536)
general-purpose 
name             "PowerPC,PA6T"
ibm,processor-page-sizes 0000000c 0000000e 00000010 00000012
		 00000014 00000018 0000001e
d-cache-sets     00000002
i-cache-sets     00000002
d-cache-line-size 00000040 (64)

[PATCH 0/1] PCI set flag PCI_SCAN_ALL_PCIE_DEVS for P.A. Semi boards

[Christian Zigotzky]

On 02 December 2017 at 00:27PM, Bjorn Helgaas wrote:
 > On Fri, Dec 01, 2017 at 11:08:46PM +0100, Christian Zigotzky wrote:
 >> On 30.11.2017 23:42, Bjorn Helgaas wrote:
 >>>
 >>> 00:11.0 claims to be a PCIe Root Port leading to [bus 05-06]. That
 >>> means there's a Link (presumably this A-Link II Express thing), and the
 >>> downstream end of the Link *should* be a PCIe Upstream Port on bus 05,
 >>> but no such device is visible.  I suppose the SB600 does implement
 >>> some sort of PCIe Port there, but keeps it invisible to software, and
 >>> at the same time, contains an invisible bridge that connects the Link
 >>> to all the conventional PCI devices on bus 05.
 >>>
 >>> When we scan bus 05, we do this:
 >>>
 >>>    pci_scan_child_bus_extend(bus=05)
 >>>      for (devfn = 0; devfn < 0x100; devfn += 8)
 >>>        pci_scan_slot(05, 00.0)
 >>>          pci_scan_single_device
 >>>            pci_scan_device(05, 00.0)           # fails; no 05:00.0
 >>>        pci_scan_slot(05, 01.0)
 >>>          only_one_child(bus=05)
 >>>            parent = 00:11.0
 >>>            pci_pcie_type(00:11.0) == ROOT_PORT # returns true
 >>>
 >>> Since only_one_child() sees that 00:11.0 is a Root Port, we give up
 >>> before we even get to the PCI_SCAN_ALL_PCIE_DEVS test.
 >>>
 >>> I *think* something like the patch below should make this work if you
 >>> use the "pci=pcie_scan_all" parameter.  We have some x86 DMI quirks
 >>> that set PCI_SCAN_ALL_PCIE_DEVS automatically.  I don't know how to do
 >>> something similar on powerpc, but maybe you do?
 >>>
 >>
 >> Hi Bjorn,
 >>
 >> I tested your new patch today. It boots with the boot argument
 >> "pci=pcie_scan_all". Well done! :-)
 >>
 >> It doesn't boot without the boot argument "pci=pcie_scan_all".
 >
 > Thanks for testing that.  I'll merge a similar patch for v4.16.
 >
 > I don't think using "pci=pcie_scan_all" is really an acceptable
 > long-term answer for you, though.  Is there some way we can identify
 > at run-time whether we're on a Nemo system?  If so, we can make this
 > happen automatically.
 >
 > Bjorn
 >

Hi Bjorn,
Hi All,

Olof Johansson has created a patch for us. With this patch, 
"pci=pcie_scan_all" executes automatically on P.A. Semi boards. We don't 
need to add 'pci=pcie_scan_all' to the
kernel boot arguments anymore. Could you please add Olof's patch to the 
official kernel source code?

arch/powerpc/platforms/pasemi/pci.c | 2 ++
  1 file changed, 2 insertions(+)

Thanks,
Christian

[PATCH 1/1] PCI set flag PCI_SCAN_ALL_PCIE_DEVS for P.A. Semi boards

[Christian Zigotzky]

Bjorn Helgaas created a patch for making PCI_SCAN_ALL_PCIE_DEVS work for 
Root Ports as well as Downstream. Previously PCI_SCAN_ALL_PCIE_DEVS (set 
by quirks or the "pci=pcie_scan_all"
kernel parameter) only affected Switch Downstream Ports, not Root Ports. 
The problem is, that we have to add always the boot argument 
"pci=pcie_scan_all" for using Bjorn's improvements. Without the boot 
argument "pci=pcie_scan_all", the kernel doesn't boot on P.A. Semi 
boards with SB600 chipset (SB600 chipset is connected via PCIe x4 to the 
P.A. Semi’s PA6T-1682M System-on-a-Chip) because the kernel can't find 
any drives connected to the SB600 anymore. Olof Johansson has created a 
patch for executing "pci=pcie_scan_all" automatically on P.A. Semi 
boards. With his patch, we don't need to add 'pci=pcie_scan_all' to the 
kernel boot arguments anymore.

---

arch/powerpc/platforms/pasemi/pci.c | 2 ++
  1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/platforms/pasemi/pci.c 
b/arch/powerpc/platforms/pasemi/pci.c
index 5ff6108..ea54ed2 100644
--- a/arch/powerpc/platforms/pasemi/pci.c
+++ b/arch/powerpc/platforms/pasemi/pci.c
@@ -224,6 +224,8 @@ void __init pas_pci_init(void)
          return;
      }

+    pci_set_flags(PCI_SCAN_ALL_PCIE_DEVS);
+
      for (np = NULL; (np = of_get_next_child(root, np)) != NULL;)
          if (np->name && !strcmp(np->name, "pxp") && !pas_add_bridge(np))
              of_node_get(np);

--

Re: [PATCH 1/1] PCI set flag PCI_SCAN_ALL_PCIE_DEVS for P.A. Semi boards

[Bjorn Helgaas]

On Fri, Mar 16, 2018 at 01:55:36PM +0100, Christian Zigotzky wrote:
> Bjorn Helgaas created a patch for making PCI_SCAN_ALL_PCIE_DEVS work for
> Root Ports as well as Downstream. Previously PCI_SCAN_ALL_PCIE_DEVS (set by
> quirks or the "pci=pcie_scan_all"
> kernel parameter) only affected Switch Downstream Ports, not Root Ports. The
> problem is, that we have to add always the boot argument "pci=pcie_scan_all"
> for using Bjorn's improvements. Without the boot argument
> "pci=pcie_scan_all", the kernel doesn't boot on P.A. Semi boards with SB600
> chipset (SB600 chipset is connected via PCIe x4 to the P.A. Semi’s
> PA6T-1682M System-on-a-Chip) because the kernel can't find any drives
> connected to the SB600 anymore. Olof Johansson has created a patch for
> executing "pci=pcie_scan_all" automatically on P.A. Semi boards. With his
> patch, we don't need to add 'pci=pcie_scan_all' to the kernel boot arguments
> anymore.

The patch looks fine, but I need a signed-off-by line before I can apply
it.  See https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/submitting-patches.rst

> ---
> 
> arch/powerpc/platforms/pasemi/pci.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/powerpc/platforms/pasemi/pci.c
> b/arch/powerpc/platforms/pasemi/pci.c
> index 5ff6108..ea54ed2 100644
> --- a/arch/powerpc/platforms/pasemi/pci.c
> +++ b/arch/powerpc/platforms/pasemi/pci.c
> @@ -224,6 +224,8 @@ void __init pas_pci_init(void)
>          return;
>      }
> 
> +    pci_set_flags(PCI_SCAN_ALL_PCIE_DEVS);
> +
>      for (np = NULL; (np = of_get_next_child(root, np)) != NULL;)
>          if (np->name && !strcmp(np->name, "pxp") && !pas_add_bridge(np))
>              of_node_get(np);
> 
> --
> 
> 

Re: [PATCH 1/1] PCI set flag PCI_SCAN_ALL_PCIE_DEVS for P.A. Semi boards

[Christian Zigotzky]

Hello Bjorn,

Thanks for your reply. Olof wrote this patch.

@Olof
Could you please sign off this patch?

Thanks,
Christian

On 19. Mar 2018, at 20:13, Bjorn Helgaas <helgaas@kernel.org> wrote:

The patch looks fine, but I need a signed-off-by line before I can apply
it.  See https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/=
tree/Documentation/process/submitting-patches.rst

---

arch/powerpc/platforms/pasemi/pci.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/platforms/pasemi/pci.c
b/arch/powerpc/platforms/pasemi/pci.c
index 5ff6108..ea54ed2 100644
--- a/arch/powerpc/platforms/pasemi/pci.c
+++ b/arch/powerpc/platforms/pasemi/pci.c
@@ -224,6 +224,8 @@ void __init pas_pci_init(void)
         return;
     }

+    pci_set_flags(PCI_SCAN_ALL_PCIE_DEVS);
+
     for (np =3D NULL; (np =3D of_get_next_child(root, np)) !=3D NULL;)
         if (np->name && !strcmp(np->name, "pxp") && !pas_add_bridge(np))
             of_node_get(np);

--

Re: [PATCH 1/1] PCI set flag PCI_SCAN_ALL_PCIE_DEVS for P.A. Semi boards

[Michael Ellerman]

Bjorn Helgaas <helgaas@kernel.org> writes:

> On Fri, Mar 16, 2018 at 01:55:36PM +0100, Christian Zigotzky wrote:
>> Bjorn Helgaas created a patch for making PCI_SCAN_ALL_PCIE_DEVS work for
>> Root Ports as well as Downstream. Previously PCI_SCAN_ALL_PCIE_DEVS (set=
 by
>> quirks or the "pci=3Dpcie_scan_all"
>> kernel parameter) only affected Switch Downstream Ports, not Root Ports.=
 The
>> problem is, that we have to add always the boot argument "pci=3Dpcie_sca=
n_all"
>> for using Bjorn's improvements. Without the boot argument
>> "pci=3Dpcie_scan_all", the kernel doesn't boot on P.A. Semi boards with =
SB600
>> chipset (SB600 chipset is connected via PCIe x4 to the P.A. Semi=E2=80=
=99s
>> PA6T-1682M System-on-a-Chip) because the kernel can't find any drives
>> connected to the SB600 anymore. Olof Johansson has created a patch for
>> executing "pci=3Dpcie_scan_all" automatically on P.A. Semi boards. With =
his
>> patch, we don't need to add 'pci=3Dpcie_scan_all' to the kernel boot arg=
uments
>> anymore.
>
> The patch looks fine, but I need a signed-off-by line before I can apply
> it.  See https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.g=
it/tree/Documentation/process/submitting-patches.rst

I'm happy to take it, I've been meaning to check if Olof sent a SOB in
his original mail but haven't got to it.

...

Yes, he did, see below.

So I'll merge that, I'll add a Tested-by for you Christian.

Christian please don't remove any of the tags when submitting other
peoples' patches in future.

cheers


>From a3b390277627b0342c8ccfc16e58679e0d8abdde Mon Sep 17 00:00:00 2001
From: Olof Johansson <olof@lixom.net>
Date: Sat, 2 Dec 2017 14:56:36 -0800
Subject: [PATCH] powerpc/pasemi: set PCI_SCAN_ALL_PCI_DEVS

Needed on Amiga X1000 with SB600.

Reported-by: Christian Zigotzky <chzigotzky@xenosoft.de>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
---
 arch/powerpc/platforms/pasemi/pci.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/p=
asemi/pci.c
index 5ff6108..ea54ed2 100644
--- a/arch/powerpc/platforms/pasemi/pci.c
+++ b/arch/powerpc/platforms/pasemi/pci.c
@@ -224,6 +224,8 @@ void __init pas_pci_init(void)
		return;
	}

+	pci_set_flag(PCI_SCAN_ALL_PCIE_DEVS):
+
	for (np =3D NULL; (np =3D of_get_next_child(root, np)) !=3D NULL;)
		if (np->name && !strcmp(np->name, "pxp") && !pas_add_bridge(np))
			of_node_get(np);

[PATCH 1/1] PCI set flag PCI_SCAN_ALL_PCIE_DEVS for P.A. Semi boards

[Christian Zigotzky]

Michael,

Thanks for the hint because of removing tags and thanks a lot for adding 
the patch to the official source code. This patch helps us a lot.

Have a nice day!

Christian

On 19 March 2018 at 11:32PM, Michael Ellerman wrote:
 >
 > I'm happy to take it, I've been meaning to check if Olof sent a SOB in
 > his original mail but haven't got to it.
 >
 > ...
 >
 > Yes, he did, see below.
 >
 > So I'll merge that, I'll add a Tested-by for you Christian.
 >
 > Christian please don't remove any of the tags when submitting other
 > peoples' patches in future.
 >
 > cheers
 >
 >
 > >From a3b390277627b0342c8ccfc16e58679e0d8abdde Mon Sep 17 00:00:00 2001
 > From: Olof Johansson <olof@lixom.net>
 > Date: Sat, 2 Dec 2017 14:56:36 -0800
 > Subject: [PATCH] powerpc/pasemi: set PCI_SCAN_ALL_PCI_DEVS
 >
 > Needed on Amiga X1000 with SB600.
 >
 > Reported-by: Christian Zigotzky <chzigotzky@xenosoft.de>
 > Cc: Bjorn Helgaas <bhelgaas@google.com>
 > Signed-off-by: Olof Johansson <olof@lixom.net>
 > ---
 >  arch/powerpc/platforms/pasemi/pci.c | 2 ++
 >  1 file changed, 2 insertions(+)
 >
 > diff --git a/arch/powerpc/platforms/pasemi/pci.c 
b/arch/powerpc/platforms/pasemi/pci.c
 > index 5ff6108..ea54ed2 100644
 > --- a/arch/powerpc/platforms/pasemi/pci.c
 > +++ b/arch/powerpc/platforms/pasemi/pci.c
 > @@ -224,6 +224,8 @@ void __init pas_pci_init(void)
 >         return;
 >     }
 >
 > +    pci_set_flag(PCI_SCAN_ALL_PCIE_DEVS):
 > +
 >     for (np = NULL; (np = of_get_next_child(root, np)) != NULL;)
 >         if (np->name && !strcmp(np->name, "pxp") && !pas_add_bridge(np))
 >             of_node_get(np);
 >

Re: PCI set flag PCI_SCAN_ALL_PCIE_DEVS for P.A. Semi boards

[Darren Stevens]

Hello Michael

On 20/03/2018, Michael Ellerman wrote:
>> The patch looks fine, but I need a signed-off-by line before I can apply
>> it.  See https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/submitting-patches.rst
>
> I'm happy to take it, I've been meaning to check if Olof sent a SOB in
> his original mail but haven't got to it.

If thats the way you want to go... We still have an out-of-tree patch we need to apply, which I think is the right place for this. In fact I submitted some patches at the end of last year with a cleaned up version (including the above patch). Here are links:

https://patchwork.ozlabs.org/patch/854270/
https://patchwork.ozlabs.org/patch/854269/
https://patchwork.ozlabs.org/patch/854271/
https://patchwork.ozlabs.org/patch/854268/

These seem to have been missed somehow. (I intended them for 4.16)

If these are suitable, the only thing left would be the pasemi i2c bus patch, which keeps getting ignored by the i2c guys.

Regards
Darren

Re: [PATCH 1/1] PCI set flag PCI_SCAN_ALL_PCIE_DEVS for P.A. Semi boards

[Christian Zigotzky]

Hi Michael,

Many thanks for your help. Did you merge Olof=E2=80=98s patch? I still have t=
o patch the 4.17 source code.

Thanks,
Christian

Sent from my iPhone

> On 19. Mar 2018, at 23:32, Michael Ellerman <mpe@ellerman.id.au> wrote:
>=20
> Bjorn Helgaas <helgaas@kernel.org> writes:
>=20
>>> On Fri, Mar 16, 2018 at 01:55:36PM +0100, Christian Zigotzky wrote:
>>> Bjorn Helgaas created a patch for making PCI_SCAN_ALL_PCIE_DEVS work for=

>>> Root Ports as well as Downstream. Previously PCI_SCAN_ALL_PCIE_DEVS (set=
 by
>>> quirks or the "pci=3Dpcie_scan_all"
>>> kernel parameter) only affected Switch Downstream Ports, not Root Ports.=
 The
>>> problem is, that we have to add always the boot argument "pci=3Dpcie_sca=
n_all"
>>> for using Bjorn's improvements. Without the boot argument
>>> "pci=3Dpcie_scan_all", the kernel doesn't boot on P.A. Semi boards with S=
B600
>>> chipset (SB600 chipset is connected via PCIe x4 to the P.A. Semi=E2=80=99=
s
>>> PA6T-1682M System-on-a-Chip) because the kernel can't find any drives
>>> connected to the SB600 anymore. Olof Johansson has created a patch for
>>> executing "pci=3Dpcie_scan_all" automatically on P.A. Semi boards. With h=
is
>>> patch, we don't need to add 'pci=3Dpcie_scan_all' to the kernel boot arg=
uments
>>> anymore.
>>=20
>> The patch looks fine, but I need a signed-off-by line before I can apply
>> it.  See https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.g=
it/tree/Documentation/process/submitting-patches.rst
>=20
> I'm happy to take it, I've been meaning to check if Olof sent a SOB in
> his original mail but haven't got to it.
>=20
> ...
>=20
> Yes, he did, see below.
>=20
> So I'll merge that, I'll add a Tested-by for you Christian.
>=20
> Christian please don't remove any of the tags when submitting other
> peoples' patches in future.
>=20
> cheers
>=20
>=20
> =46rom a3b390277627b0342c8ccfc16e58679e0d8abdde Mon Sep 17 00:00:00 2001
> From: Olof Johansson <olof@lixom.net>
> Date: Sat, 2 Dec 2017 14:56:36 -0800
> Subject: [PATCH] powerpc/pasemi: set PCI_SCAN_ALL_PCI_DEVS
>=20
> Needed on Amiga X1000 with SB600.
>=20
> Reported-by: Christian Zigotzky <chzigotzky@xenosoft.de>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Signed-off-by: Olof Johansson <olof@lixom.net>
> ---
> arch/powerpc/platforms/pasemi/pci.c | 2 ++
> 1 file changed, 2 insertions(+)
>=20
> diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/=
pasemi/pci.c
> index 5ff6108..ea54ed2 100644
> --- a/arch/powerpc/platforms/pasemi/pci.c
> +++ b/arch/powerpc/platforms/pasemi/pci.c
> @@ -224,6 +224,8 @@ void __init pas_pci_init(void)
>        return;
>    }
>=20
> +    pci_set_flag(PCI_SCAN_ALL_PCIE_DEVS):
> +
>    for (np =3D NULL; (np =3D of_get_next_child(root, np)) !=3D NULL;)
>        if (np->name && !strcmp(np->name, "pxp") && !pas_add_bridge(np))
>            of_node_get(np);

Re: SB600 for the Nemo board has non-zero devices on non-root bus

[Michael Ellerman]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain, Size: 2311 bytes --]

On Wed, 2017-12-06 at 11:03:52 UTC, Christian Zigotzky wrote:
> On 06 December 2017 at 09:37AM, Christian Zigotzky wrote:
>  > On 03 December 2017 at 10:43AM, Christian Zigotzky wrote:
>  > >
>  > > On 3. Dec 2017, at 00:02, Olof Johansson <olof@lixom.net> wrote:
>  > >>
>  > >> Typo, should be ';', not ':'. I obviously didn't even try 
> compiling this. :)
>  > >>
>  > >>
>  > >> -Olof
>  > >
>  > > Hi Olof,
>  > >
>  > > Thanks a lot for your patch! I will test it on Wednesday.
>  > >
>  > > Cheers,
>  > > Christian
>  >
>  >
>  > Hi Olof,
>  >
>  > I tested your patch today. Unfortunately the kernel 4.15-rc2 doesn't 
> compile with your patch.
>  >
>  > Error messages:
>  >
>  >                        ^~~~~~~~~
>  > arch/powerpc/platforms/pasemi/pci.c: In function ‘pas_pci_init’:
>  > arch/powerpc/platforms/pasemi/pci.c:298:2: error: implicit 
> declaration of function ‘pci_set_flag’ 
> [-Werror=implicit-function-declaration]
>  >   pci_set_flag(PCI_SCAN_ALL_PCIE_DEVS);
>  >   ^~~~~~~~~~~~
>  > cc1: some warnings being treated as errors
>  >
>  > ---
>  >
>  > I figured out that we need 'pci_set_flags' instead of 'pci_set_flag'. 
> I modified your patch and after that the kernel compiles. Please find 
> attached the new patch.
>  >
>  > Cheers,
>  > Christian
> 
> Hi Olof,
> 
> Many thanks for your patch! :-) The RC2 of kernel 4.15 boots without any 
> problems on my P.A. Semi Nemo board (A-EON AmigaOne X1000). I don’t need 
> the additional boot argument 'pci=pcie_scan_all' anymore.
> 
> Is it possible to merge it via the powerpc tree?
> 
> Thanks,
> Christian
> 
> arch/powerpc/platforms/pasemi/pci.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
> index 5ff6108..ea54ed2 100644
> --- a/arch/powerpc/platforms/pasemi/pci.c
> +++ b/arch/powerpc/platforms/pasemi/pci.c
> @@ -224,6 +224,8 @@ void __init pas_pci_init(void)
>  		return;
>  	}
>  
> +	pci_set_flags(PCI_SCAN_ALL_PCIE_DEVS);
> +
>  	for (np = NULL; (np = of_get_next_child(root, np)) != NULL;)
>  		if (np->name && !strcmp(np->name, "pxp") && !pas_add_bridge(np))
>  			of_node_get(np);

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/eff06ef0891d200eb0ddd156c6e96c

cheers