From: Michal Simek <michal.simek@xilinx.com>
To: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>,
<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>
Cc: <lorenzo.pieralisi@arm.com>, <bhelgaas@google.com>, <robh@kernel.org>
Subject: Re: [PATCH] dt-bindings: PCI: xilinx-cpm: Change reg property order
Date: Fri, 29 Apr 2022 15:27:22 +0200 [thread overview]
Message-ID: <fc268228-8188-953b-6990-d694cd499386@xilinx.com> (raw)
In-Reply-To: <20220429130221.32113-1-bharat.kumar.gogada@xilinx.com>
On 4/29/22 15:02, Bharat Kumar Gogada wrote:
> Describe cpm reg property before cfg reg property to align with
> node name.
>
> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
> ---
> .../devicetree/bindings/pci/xilinx-versal-cpm.yaml | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> index 32f4641085bc..cca395317a4c 100644
> --- a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> +++ b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> @@ -18,13 +18,13 @@ properties:
>
> reg:
> items:
> - - description: Configuration space region and bridge registers.
> - description: CPM system level control and status registers.
> + - description: Configuration space region and bridge registers.
>
> reg-names:
> items:
> - - const: cfg
> - const: cpm_slcr
> + - const: cfg
>
> interrupts:
> maxItems: 1
> @@ -86,9 +86,9 @@ examples:
> ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>,
> <0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>;
> msi-map = <0x0 &its_gic 0x0 0x10000>;
> - reg = <0x6 0x00000000 0x0 0x10000000>,
> - <0x0 0xfca10000 0x0 0x1000>;
> - reg-names = "cfg", "cpm_slcr";
> + reg = <0x0 0xfca10000 0x0 0x1000>,
> + <0x6 0x00000000 0x0 0x10000000>;
> + reg-names = "cpm_slcr", "cfg";
> pcie_intc_0: interrupt-controller {
> #address-cells = <0>;
> #interrupt-cells = <1>;
Acked-by: Michal Simek <michal.simek@amd.com>
Thanks,
Michal
next prev parent reply other threads:[~2022-04-29 13:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-29 13:02 [PATCH] dt-bindings: PCI: xilinx-cpm: Change reg property order Bharat Kumar Gogada
2022-04-29 13:27 ` Michal Simek [this message]
2022-05-04 15:43 ` Rob Herring
2022-05-10 7:29 ` Michal Simek
2022-05-10 16:00 ` Rob Herring
2022-05-10 17:18 ` Michal Simek
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