From: Frank Wunderlich <frank-w@public-files.de>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: "Frank Wunderlich" <linux@fw-web.de>,
linux-rockchip@lists.infradead.org,
"Kishon Vijay Abraham I" <kishon@ti.com>,
"Vinod Koul" <vkoul@kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Heiko Stuebner" <heiko@sntech.de>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Johan Jonker" <jbx6244@gmail.com>,
"Peter Geis" <pgwipeout@gmail.com>,
"Michael Riesch" <michael.riesch@wolfvision.net>,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Aw: Re: Re: [RFC/RFT 2/6] dt-bindings: soc: grf: add pcie30-{phy,pipe}-grf
Date: Wed, 20 Apr 2022 15:04:38 +0200 [thread overview]
Message-ID: <trinity-bf1af823-9e46-4da7-bec5-6e749a4dc2e3-1650459878842@3c-app-gmx-bap05> (raw)
In-Reply-To: <8b9ad0a6-acc0-aad9-c49d-e4a4b38374bb@linaro.org>
> Gesendet: Dienstag, 19. April 2022 um 21:40 Uhr
> Von: "Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>
> On 19/04/2022 19:29, Frank Wunderlich wrote:
> >> Gesendet: Montag, 18. April 2022 um 17:54 Uhr
> >> Von: "Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>
> >
> >>> --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
> >>> +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
> >>> @@ -14,6 +14,8 @@ properties:
> >>> oneOf:
> >>> - items:
> >>> - enum:
> >>> + - rockchip,pcie30-phy-grf
> >>> + - rockchip,pcie30-pipe-grf
> >>
> >> These are without SoC parts. Are these PCIe v3 General Register Files
> >> part of some PCIe spec?
> >
> > imho they are shared across SoCs rk3568 and rk3588, but have only seen rk3568 implementation yet.
> > PCIe driver currently supports these 2 Soc (different offsets in the Phy-GRF), but can only test rk3568.
> >
> > pipe-grf seems only be used for rk35688 (offset used in probe is defined for this SoC), which i cannot test.
> >
> > so i have left them SoC independed.
>
> Compatibles should be SoC dependent, with some exceptions. Lack of
> documentation or lack of possibility of testing is actually argument
> against any exception, so they should be SoC specific/dependent.
so i will change to
- rockchip,rk3568-pcie30-phy-grf
- rockchip,rk3588-pcie30-pipe-grf
and maybe add
- rockchip,rk3588-pcie30-phy-grf
these compatibles are not directly taken by any driver as the nodes be linked via phandle (rockchip,phy-grf property) from the phy driver (rockchip,rk3568-pcie3-phy / rockchip,rk3588-pcie3-phy). So these compatibles are only in the yaml and dts present.
regards Frank
next prev parent reply other threads:[~2022-04-20 13:05 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-16 13:54 [RFC/RFT 0/6] RK3568 PCIe V3 support Frank Wunderlich
2022-04-16 13:54 ` [RFC/RFT 1/6] dt-bindings: phy: rockchip: add pcie3 phy Frank Wunderlich
2022-04-18 15:52 ` Krzysztof Kozlowski
2022-04-19 17:49 ` Aw: " Frank Wunderlich
2022-04-19 19:43 ` Krzysztof Kozlowski
2022-04-19 20:36 ` Aw: " Frank Wunderlich
2022-04-19 20:48 ` Krzysztof Kozlowski
2022-04-16 13:54 ` [RFC/RFT 2/6] dt-bindings: soc: grf: add pcie30-{phy,pipe}-grf Frank Wunderlich
2022-04-18 15:54 ` Krzysztof Kozlowski
2022-04-19 17:29 ` Aw: " Frank Wunderlich
2022-04-19 19:40 ` Krzysztof Kozlowski
2022-04-20 13:04 ` Frank Wunderlich [this message]
2022-04-16 13:54 ` [RFC/RFT 3/6] phy: rockchip: Support pcie v3 Frank Wunderlich
2022-04-18 10:38 ` Vinod Koul
2022-04-18 15:57 ` Krzysztof Kozlowski
2022-04-20 7:29 ` Philipp Zabel
2022-04-16 13:54 ` [RFC/RFT 4/6] PCI: rockchip-dwc: add pcie bifurcation Frank Wunderlich
2022-04-16 23:30 ` Bjorn Helgaas
2022-04-17 9:08 ` Aw: " Frank Wunderlich
2022-04-18 15:53 ` Bjorn Helgaas
2022-04-18 16:17 ` Peter Geis
2022-04-21 15:41 ` Aw: " Frank Wunderlich
2022-04-16 13:54 ` [RFC/RFT 5/6] arm64: dts: rockchip: rk3568: Add PCIe v3 nodes Frank Wunderlich
2022-04-16 13:54 ` [RFC/RFT 6/6] arm64: dts: rockchip: Add PCIe v3 nodes to BPI-R2-Pro Frank Wunderlich
2022-04-18 15:57 ` Krzysztof Kozlowski
2022-05-11 19:26 ` [RFC/RFT 0/6] RK3568 PCIe V3 support Piotr Oniszczuk
2022-05-11 20:10 ` Frank Wunderlich
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=trinity-bf1af823-9e46-4da7-bec5-6e749a4dc2e3-1650459878842@3c-app-gmx-bap05 \
--to=frank-w@public-files.de \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=heiko@sntech.de \
--cc=jbx6244@gmail.com \
--cc=kishon@ti.com \
--cc=krzk+dt@kernel.org \
--cc=krzysztof.kozlowski@linaro.org \
--cc=kw@linux.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=linux@fw-web.de \
--cc=lorenzo.pieralisi@arm.com \
--cc=michael.riesch@wolfvision.net \
--cc=p.zabel@pengutronix.de \
--cc=pgwipeout@gmail.com \
--cc=robh+dt@kernel.org \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).