From: Jie Zhan <zhanjie9@hisilicon.com>
To: <will@kernel.org>, <mark.rutland@arm.com>,
<mathieu.poirier@linaro.org>, <suzuki.poulose@arm.com>,
<mike.leach@linaro.org>, <leo.yan@linaro.org>,
<john.g.garry@oracle.com>, <james.clark@arm.com>,
<peterz@infradead.org>, <mingo@redhat.com>, <acme@kernel.org>,
<corbet@lwn.net>, <jonathan.cameron@huawei.com>
Cc: <zhangshaokun@hisilicon.com>, <shenyang39@huawei.com>,
<hejunhao3@huawei.com>, <yangyicong@hisilicon.com>,
<prime.zeng@huawei.com>, <suntao25@huawei.com>,
<jiazhao4@hisilicon.com>, <linuxarm@huawei.com>,
<linux-doc@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-perf-users@vger.kernel.org>
Subject: Re: [RFC PATCH v1 0/4] HiSilicon Performance Monitor Control Unit
Date: Mon, 27 Feb 2023 16:49:46 +0800 [thread overview]
Message-ID: <75a1b477-5325-bec9-5750-b09bf0e5dfb0@hisilicon.com> (raw)
In-Reply-To: <20230206065146.645505-1-zhanjie9@hisilicon.com>
Please can anyone have a look at this PMCU patchset and provide some
comments?
It is much related to the ARM PMU.
We are looking forward to the feedback.
Any relevant comments/questions, with respect to software or hardware
design, use cases, coding, are welcome.
Kind regards,
Jie
On 06/02/2023 14:51, Jie Zhan wrote:
> HiSilicon Performance Monitor Control Unit (PMCU) is a device that offloads
> PMU accesses from CPUs, handling the configuration, event switching, and
> counter reading of core PMUs on Kunpeng SoC. It facilitates fine-grained
> and multi-PMU-event CPU profiling, in which scenario the current 'perf'
> scheme may lose events or drop sampling frequency. With PMCU, users can
> reliably obtain the data of up to 240 PMU events with the sample interval
> of events down to 1ms, while the software overhead of accessing PMUs, as
> well as its impact on target workloads, is reduced.
>
> This patchset contains the documentation, driver, and user perf tool
> support to enable using PMCU with the 'perf_event' framework.
>
> Here are two key questions requested for comments:
>
> - How do we make it compatible with arm_pmu drivers?
>
> Hardware-wise, PMCU uses the existing core PMUs, so PMUs can be accessed
> from CPU and PMCU simultaneously. The current hardware can't guarantee
> mutual exclusive accesses. Hence, scheduling arm_pmu and PMCU events at
> the same time may mess up the operation of PMUs, delivering incorrect
> data for both events, e.g. unexpected events or sample periods.
> Software-wise, we probably need to prevent the two types of events from
> running at the same time, but currently there isn't a clear solution.
>
> - Currently we reply on a sysfs file for users to input event numbers. Is
> there a better way to pass many events?
>
> The perf framework only allows three 64-bit config fields for custom PMU
> configs. Obviously, this can't satisfy our need for passing many events
> at a time. As an event number is 16-bit wide, the config fields can only
> take up to 12 events at a time, or up to 192 events even if we do a
> bitmap of events (and there are more than 192 available event numbers).
> Hence, the current design takes an array of event numbers from a sysfs
> file before starting profiling. However, this may go against the common
> way to schedule perf events through perf commands.
>
> Jie Zhan (4):
> docs: perf: Add documentation for HiSilicon PMCU
> drivers/perf: hisi: Add driver support for HiSilicon PMCU
> perf tool: Add HiSilicon PMCU data recording support
> perf tool: Add HiSilicon PMCU data decoding support
>
> Documentation/admin-guide/perf/hisi-pmcu.rst | 183 +++
> Documentation/admin-guide/perf/index.rst | 1 +
> drivers/perf/hisilicon/Kconfig | 15 +
> drivers/perf/hisilicon/Makefile | 1 +
> drivers/perf/hisilicon/hisi_pmcu.c | 1096 ++++++++++++++++++
> tools/perf/arch/arm/util/auxtrace.c | 61 +
> tools/perf/arch/arm64/util/Build | 2 +-
> tools/perf/arch/arm64/util/hisi-pmcu.c | 145 +++
> tools/perf/util/Build | 1 +
> tools/perf/util/auxtrace.c | 4 +
> tools/perf/util/auxtrace.h | 1 +
> tools/perf/util/hisi-pmcu.c | 305 +++++
> tools/perf/util/hisi-pmcu.h | 19 +
> 13 files changed, 1833 insertions(+), 1 deletion(-)
> create mode 100644 Documentation/admin-guide/perf/hisi-pmcu.rst
> create mode 100644 drivers/perf/hisilicon/hisi_pmcu.c
> create mode 100644 tools/perf/arch/arm64/util/hisi-pmcu.c
> create mode 100644 tools/perf/util/hisi-pmcu.c
> create mode 100644 tools/perf/util/hisi-pmcu.h
>
>
> base-commit: 830b3c68c1fb1e9176028d02ef86f3cf76aa2476
next prev parent reply other threads:[~2023-02-27 9:00 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-06 6:51 [RFC PATCH v1 0/4] HiSilicon Performance Monitor Control Unit Jie Zhan
2023-02-06 6:51 ` [RFC PATCH v1 1/4] docs: perf: Add documentation for HiSilicon PMCU Jie Zhan
2023-02-07 3:03 ` Jie Zhan
2023-03-17 13:37 ` Jonathan Cameron
2023-03-24 9:32 ` Jie Zhan
2023-03-24 12:14 ` Jonathan Cameron
2023-03-25 2:48 ` Jie Zhan
2023-02-06 6:51 ` [RFC PATCH v1 2/4] drivers/perf: hisi: Add driver support " Jie Zhan
2023-03-17 14:52 ` Jonathan Cameron
2023-03-25 10:21 ` Jie Zhan
2023-02-06 6:51 ` [RFC PATCH v1 3/4] perf tool: Add HiSilicon PMCU data recording support Jie Zhan
2023-03-17 15:13 ` Jonathan Cameron
2023-02-06 6:51 ` [RFC PATCH v1 4/4] perf tool: Add HiSilicon PMCU data decoding support Jie Zhan
2023-02-27 8:49 ` Jie Zhan [this message]
2023-03-17 13:11 ` [RFC PATCH v1 0/4] HiSilicon Performance Monitor Control Unit Jonathan Cameron
2023-04-19 8:01 ` Jie Zhan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=75a1b477-5325-bec9-5750-b09bf0e5dfb0@hisilicon.com \
--to=zhanjie9@hisilicon.com \
--cc=acme@kernel.org \
--cc=corbet@lwn.net \
--cc=hejunhao3@huawei.com \
--cc=james.clark@arm.com \
--cc=jiazhao4@hisilicon.com \
--cc=john.g.garry@oracle.com \
--cc=jonathan.cameron@huawei.com \
--cc=leo.yan@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-perf-users@vger.kernel.org \
--cc=linuxarm@huawei.com \
--cc=mark.rutland@arm.com \
--cc=mathieu.poirier@linaro.org \
--cc=mike.leach@linaro.org \
--cc=mingo@redhat.com \
--cc=peterz@infradead.org \
--cc=prime.zeng@huawei.com \
--cc=shenyang39@huawei.com \
--cc=suntao25@huawei.com \
--cc=suzuki.poulose@arm.com \
--cc=will@kernel.org \
--cc=yangyicong@hisilicon.com \
--cc=zhangshaokun@hisilicon.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).