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From: Minda Chen <minda.chen@starfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	Conor Dooley <conor@kernel.org>, "Vinod Koul" <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Pawel Laszczak <pawell@cadence.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Peter Chen <peter.chen@kernel.org>,
	Roger Quadros <rogerq@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-phy@lists.infradead.org>, <linux-usb@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>
Subject: Re: [PATCH v3 5/5] dts: usb: add StarFive JH7110 USB dts configuration.
Date: Fri, 17 Mar 2023 18:59:25 +0800	[thread overview]
Message-ID: <11873190-a8ff-e93d-5c08-8a24903c170d@starfivetech.com> (raw)
In-Reply-To: <79593668-6ded-7290-f39b-e226d30e6e95@linaro.org>



On 2023/3/17 16:44, Krzysztof Kozlowski wrote:
> On 15/03/2023 11:44, Minda Chen wrote:
>> USB Glue layer and Cadence USB subnode configuration,
>> also includes USB and PCIe phy dts configuration.
>> 
>> Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
> 
> Use subject prefixes matching the subsystem (which you can get for
> example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
> your patch is touching).
>ok
>> ---
>>  .../jh7110-starfive-visionfive-2.dtsi         |  7 +++
>>  arch/riscv/boot/dts/starfive/jh7110.dtsi      | 54 +++++++++++++++++++
>>  2 files changed, 61 insertions(+)
>> 
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> index a132debb9b53..c64476aebc1a 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> @@ -236,3 +236,10 @@
>>  	pinctrl-0 = <&uart0_pins>;
>>  	status = "okay";
>>  };
>> +
>> +&usb0 {
>> +	status = "okay";
>> +	usbdrd_cdns3: usb@0 {
> 
> You should rather override by phandle this as well.
> 
I will remove the wrapper node 'usb0'. 

Just like this :
+&usbdrd_cdns3 {
+       dr_mode = "peripheral";
+};


(similar configuration in arch/arm64/boot/dts/ti/k3-j721e-sk.dts, usb1 node)
   &usb1 {
        dr_mode = "host";
        ....
  
>> +		dr_mode = "peripheral";
>> +	};
>> +};
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> index f70a4ed47eb4..17722fd1be62 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> @@ -362,6 +362,60 @@
>>  			status = "disabled";
>>  		};
>>  
>> +		usb0: usb@10100000 {
>> +			compatible = "starfive,jh7110-usb";
>> +			clocks = <&stgcrg JH7110_STGCLK_USB0_LPM>,
>> +				 <&stgcrg JH7110_STGCLK_USB0_STB>,
>> +				 <&stgcrg JH7110_STGCLK_USB0_APB>,
>> +				 <&stgcrg JH7110_STGCLK_USB0_AXI>,
>> +				 <&stgcrg JH7110_STGCLK_USB0_UTMI_APB>;
>> +			clock-names = "lpm", "stb", "apb", "axi", "utmi_apb";
>> +			resets = <&stgcrg JH7110_STGRST_USB0_PWRUP>,
>> +				 <&stgcrg JH7110_STGRST_USB0_APB>,
>> +				 <&stgcrg JH7110_STGRST_USB0_AXI>,
>> +				 <&stgcrg JH7110_STGRST_USB0_UTMI_APB>;
>> +			starfive,stg-syscon = <&stg_syscon 0x4 0xc4 0x148 0x1f4>;
>> +			starfive,sys-syscon = <&sys_syscon 0x18>;
>> +			status = "disabled";
>> +			#address-cells = <1>;
>> +			#size-cells = <1>;
>> +			ranges = <0x0 0x0 0x10100000 0x100000>;
> 
> reg and ranges should be second property. This also applies to your
> binding example.
> 
> 
ok, thanks
> Best regards,
> Krzysztof
> 

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  reply	other threads:[~2023-03-17 10:59 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-15 10:44 [PATCH v3 0/5] Add JH7110 USB and USB PHY driver support Minda Chen
2023-03-15 10:44 ` [PATCH v3 1/5] dt-bindings: phy: Add StarFive JH7110 USB/PCIe document Minda Chen
2023-03-17  8:39   ` Krzysztof Kozlowski
2023-03-17 10:29     ` Minda Chen
2023-03-15 10:44 ` [PATCH v3 2/5] phy: starfive: add JH7110 PCIE 2.0 and USB 2.0 PHY driver Minda Chen
2023-03-20  8:55   ` Vinod Koul
2023-03-20 11:00     ` Minda Chen
2023-03-15 10:44 ` [PATCH v3 3/5] dt-binding: Add JH7110 USB wrapper layer doc Minda Chen
2023-03-16  2:43   ` Peter Chen
2023-03-17  8:43   ` Krzysztof Kozlowski
2023-03-17 10:30     ` Minda Chen
2023-03-23  9:23   ` Philipp Zabel
2023-03-27 11:04     ` Minda Chen
2023-03-15 10:44 ` [PATCH v3 4/5] usb: cdns3: add StarFive JH7110 USB driver Minda Chen
2023-03-15 13:32   ` Dongliang Mu
2023-03-16 11:17     ` Minda Chen
2023-03-16  2:46   ` Peter Chen
2023-03-16 11:16     ` Minda Chen
2023-03-20 15:26   ` Rob Herring
2023-03-21 11:50     ` Minda Chen
2023-03-23  9:29   ` Philipp Zabel
2023-03-27 11:04     ` Minda Chen
2023-03-15 10:44 ` [PATCH v3 5/5] dts: usb: add StarFive JH7110 USB dts configuration Minda Chen
2023-03-16  2:43   ` Peter Chen
2023-03-16  3:02     ` Minda Chen
2023-03-17  8:44   ` Krzysztof Kozlowski
2023-03-17 10:59     ` Minda Chen [this message]
2023-03-20 15:34   ` Rob Herring
2023-03-21 12:35     ` Minda Chen
2023-03-22  8:00       ` Roger Quadros
2023-03-22 10:50         ` Minda Chen

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