* [PATCH v2 1/9] dt-bindings: phy: migrate combo QMP PHY bindings to qcom,sc8280xp-qmp-usb43dp-phy.yaml
2023-03-26 0:57 [PATCH v2 0/9] phy: qcom-qmp-combo: convert to newer style of bindings Dmitry Baryshkov
@ 2023-03-26 0:57 ` Dmitry Baryshkov
2023-03-28 7:02 ` Krzysztof Kozlowski
2023-03-28 10:45 ` Krzysztof Kozlowski
2023-03-26 0:57 ` [PATCH v2 2/9] phy: qcom-qmp-combo: simplify clock handling Dmitry Baryshkov
` (7 subsequent siblings)
8 siblings, 2 replies; 21+ messages in thread
From: Dmitry Baryshkov @ 2023-03-26 0:57 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
Migrate legacy bindings (described in qcom,sc7180-qmp-usb3-dp-phy.yaml)
to qcom,sc8280xp-qmp-usb43dp-phy.yaml. This removes a need to declare
the child PHY node or split resource regions.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../phy/qcom,sc7180-qmp-usb3-dp-phy.yaml | 278 ------------------
.../phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml | 45 ++-
2 files changed, 43 insertions(+), 280 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml
deleted file mode 100644
index a2ddf718ba76..000000000000
--- a/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml
+++ /dev/null
@@ -1,278 +0,0 @@
-# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Qualcomm QMP USB3 DP PHY controller (SC7180)
-
-description:
- The QMP PHY controller supports physical layer functionality for a number of
- controllers on Qualcomm chipsets, such as, PCIe, UFS and USB.
-
- Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see
- qcom,sc8280xp-qmp-usb43dp-phy.yaml.
-
-maintainers:
- - Wesley Cheng <quic_wcheng@quicinc.com>
-
-properties:
- compatible:
- oneOf:
- - enum:
- - qcom,sc7180-qmp-usb3-dp-phy
- - qcom,sc8180x-qmp-usb3-dp-phy
- - qcom,sdm845-qmp-usb3-dp-phy
- - qcom,sm8150-qmp-usb3-dp-phy
- - qcom,sm8250-qmp-usb3-dp-phy
- - items:
- - enum:
- - qcom,sc7280-qmp-usb3-dp-phy
- - const: qcom,sm8250-qmp-usb3-dp-phy
-
- reg:
- items:
- - description: Address and length of PHY's USB serdes block.
- - description: Address and length of the DP_COM control block.
- - description: Address and length of PHY's DP serdes block.
-
- reg-names:
- items:
- - const: usb
- - const: dp_com
- - const: dp
-
- "#address-cells":
- enum: [ 1, 2 ]
-
- "#size-cells":
- enum: [ 1, 2 ]
-
- ranges: true
-
- clocks:
- minItems: 3
- maxItems: 4
-
- clock-names:
- minItems: 3
- maxItems: 4
-
- power-domains:
- maxItems: 1
-
- resets:
- items:
- - description: reset of phy block.
- - description: phy common block reset.
-
- reset-names:
- items:
- - const: phy
- - const: common
-
- vdda-phy-supply:
- description:
- Phandle to a regulator supply to PHY core block.
-
- vdda-pll-supply:
- description:
- Phandle to 1.8V regulator supply to PHY refclk pll block.
-
- vddp-ref-clk-supply:
- description:
- Phandle to a regulator supply to any specific refclk pll block.
-
-# Required nodes:
-patternProperties:
- "^usb3-phy@[0-9a-f]+$":
- type: object
- additionalProperties: false
- description:
- The USB3 PHY.
-
- properties:
- reg:
- items:
- - description: Address and length of TX.
- - description: Address and length of RX.
- - description: Address and length of PCS.
- - description: Address and length of TX2.
- - description: Address and length of RX2.
- - description: Address and length of pcs_misc.
-
- clocks:
- items:
- - description: pipe clock
-
- clock-names:
- deprecated: true
- items:
- - const: pipe0
-
- clock-output-names:
- items:
- - const: usb3_phy_pipe_clk_src
-
- '#clock-cells':
- const: 0
-
- '#phy-cells':
- const: 0
-
- required:
- - reg
- - clocks
- - '#clock-cells'
- - '#phy-cells'
-
- "^dp-phy@[0-9a-f]+$":
- type: object
- additionalProperties: false
- description:
- The DP PHY.
-
- properties:
- reg:
- items:
- - description: Address and length of TX.
- - description: Address and length of RX.
- - description: Address and length of PCS.
- - description: Address and length of TX2.
- - description: Address and length of RX2.
-
- '#clock-cells':
- const: 1
-
- '#phy-cells':
- const: 0
-
- required:
- - reg
- - '#clock-cells'
- - '#phy-cells'
-
-required:
- - compatible
- - reg
- - "#address-cells"
- - "#size-cells"
- - ranges
- - clocks
- - clock-names
- - resets
- - reset-names
- - vdda-phy-supply
- - vdda-pll-supply
-
-allOf:
- - if:
- properties:
- compatible:
- enum:
- - qcom,sc7180-qmp-usb3-dp-phy
- - qcom,sdm845-qmp-usb3-dp-phy
- then:
- properties:
- clocks:
- items:
- - description: Phy aux clock
- - description: Phy config clock
- - description: 19.2 MHz ref clk
- - description: Phy common block aux clock
- clock-names:
- items:
- - const: aux
- - const: cfg_ahb
- - const: ref
- - const: com_aux
-
- - if:
- properties:
- compatible:
- enum:
- - qcom,sc8180x-qmp-usb3-dp-phy
- - qcom,sm8150-qmp-usb3-dp-phy
- then:
- properties:
- clocks:
- items:
- - description: Phy aux clock
- - description: 19.2 MHz ref clk
- - description: Phy common block aux clock
- clock-names:
- items:
- - const: aux
- - const: ref
- - const: com_aux
-
- - if:
- properties:
- compatible:
- enum:
- - qcom,sm8250-qmp-usb3-dp-phy
- then:
- properties:
- clocks:
- items:
- - description: Phy aux clock
- - description: Board XO source
- - description: Phy common block aux clock
- clock-names:
- items:
- - const: aux
- - const: ref_clk_src
- - const: com_aux
-
-additionalProperties: false
-
-examples:
- - |
- #include <dt-bindings/clock/qcom,gcc-sdm845.h>
- usb_1_qmpphy: phy-wrapper@88e9000 {
- compatible = "qcom,sdm845-qmp-usb3-dp-phy";
- reg = <0x088e9000 0x18c>,
- <0x088e8000 0x10>,
- <0x088ea000 0x40>;
- reg-names = "usb", "dp_com", "dp";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x088e9000 0x2000>;
-
- clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
- <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
- <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
- clock-names = "aux", "cfg_ahb", "ref", "com_aux";
-
- resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
- <&gcc GCC_USB3_DP_PHY_PRIM_BCR>;
- reset-names = "phy", "common";
-
- vdda-phy-supply = <&vdda_usb2_ss_1p2>;
- vdda-pll-supply = <&vdda_usb2_ss_core>;
-
- usb3-phy@200 {
- reg = <0x200 0x128>,
- <0x400 0x200>,
- <0xc00 0x218>,
- <0x600 0x128>,
- <0x800 0x200>,
- <0xa00 0x100>;
- #clock-cells = <0>;
- #phy-cells = <0>;
- clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
- clock-output-names = "usb3_phy_pipe_clk_src";
- };
-
- dp-phy@88ea200 {
- reg = <0xa200 0x200>,
- <0xa400 0x200>,
- <0xaa00 0x200>,
- <0xa600 0x200>,
- <0xa800 0x200>;
- #clock-cells = <1>;
- #phy-cells = <0>;
- };
- };
diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
index 3cd5fc3e8fab..93444e96b512 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
@@ -16,8 +16,14 @@ description:
properties:
compatible:
enum:
+ - qcom,sc7180-qmp-usb3-dp-phy
+ - qcom,sc7280-qmp-usb3-dp-phy
+ - qcom,sc8180x-qmp-usb3-dp-phy
- qcom,sc8280xp-qmp-usb43dp-phy
+ - qcom,sdm845-qmp-usb3-dp-phy
- qcom,sm6350-qmp-usb3-dp-phy
+ - qcom,sm8150-qmp-usb3-dp-phy
+ - qcom,sm8250-qmp-usb3-dp-phy
- qcom,sm8350-qmp-usb3-dp-phy
- qcom,sm8450-qmp-usb3-dp-phy
- qcom,sm8550-qmp-usb3-dp-phy
@@ -26,14 +32,17 @@ properties:
maxItems: 1
clocks:
- maxItems: 4
+ minItems: 4
+ maxItems: 5
clock-names:
+ minItems: 4
items:
- const: aux
- const: ref
- const: com_aux
- const: usb3_pipe
+ - const: cfg_ahb
power-domains:
maxItems: 1
@@ -65,7 +74,6 @@ required:
- reg
- clocks
- clock-names
- - power-domains
- resets
- reset-names
- vdda-phy-supply
@@ -73,6 +81,39 @@ required:
- "#clock-cells"
- "#phy-cells"
+allOf:
+ - if:
+ properties:
+ compatible:
+ enum:
+ - qcom,sc7180-qmp-usb3-dp-phy
+ - qcom,sdm845-qmp-usb3-dp-phy
+ then:
+ properties:
+ clocks:
+ maxItems: 5
+ clock-names:
+ maxItems: 5
+ else:
+ properties:
+ clocks:
+ maxItems: 4
+ clock-names:
+ maxItems: 4
+ - if:
+ properties:
+ compatible:
+ enum:
+ - qcom,sc8280xp-qmp-usb43dp-phy
+ - qcom,sm6350-qmp-usb3-dp-phy
+ - qcom,sm8550-qmp-usb3-dp-phy
+ then:
+ required:
+ - power-domains
+ else:
+ properties:
+ power-domains: false
+
additionalProperties: false
examples:
--
2.30.2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v2 1/9] dt-bindings: phy: migrate combo QMP PHY bindings to qcom,sc8280xp-qmp-usb43dp-phy.yaml
2023-03-26 0:57 ` [PATCH v2 1/9] dt-bindings: phy: migrate combo QMP PHY bindings to qcom,sc8280xp-qmp-usb43dp-phy.yaml Dmitry Baryshkov
@ 2023-03-28 7:02 ` Krzysztof Kozlowski
2023-03-28 10:41 ` Dmitry Baryshkov
2023-03-28 10:45 ` Krzysztof Kozlowski
1 sibling, 1 reply; 21+ messages in thread
From: Krzysztof Kozlowski @ 2023-03-28 7:02 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
On 26/03/2023 01:57, Dmitry Baryshkov wrote:
> Migrate legacy bindings (described in qcom,sc7180-qmp-usb3-dp-phy.yaml)
> to qcom,sc8280xp-qmp-usb43dp-phy.yaml. This removes a need to declare
> the child PHY node or split resource regions.
Thank you for your patch. There is something to discuss/improve.
> - resets:
> - items:
> - - description: reset of phy block.
> - - description: phy common block reset.
> -
> - reset-names:
> - items:
> - - const: phy
> - - const: common
> -
> - vdda-phy-supply:
> - description:
> - Phandle to a regulator supply to PHY core block.
> -
> - vdda-pll-supply:
> - description:
> - Phandle to 1.8V regulator supply to PHY refclk pll block.
> -
> - vddp-ref-clk-supply:
> - description:
> - Phandle to a regulator supply to any specific refclk pll block.
What about this supply. It's missing in the new binding. Don't we need
it? Isn't it a real supply?
Best regards,
Krzysztof
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 1/9] dt-bindings: phy: migrate combo QMP PHY bindings to qcom,sc8280xp-qmp-usb43dp-phy.yaml
2023-03-28 7:02 ` Krzysztof Kozlowski
@ 2023-03-28 10:41 ` Dmitry Baryshkov
0 siblings, 0 replies; 21+ messages in thread
From: Dmitry Baryshkov @ 2023-03-28 10:41 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
linux-arm-msm, linux-phy, Johan Hovold, devicetree
On Tue, 28 Mar 2023 at 10:02, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 26/03/2023 01:57, Dmitry Baryshkov wrote:
> > Migrate legacy bindings (described in qcom,sc7180-qmp-usb3-dp-phy.yaml)
> > to qcom,sc8280xp-qmp-usb43dp-phy.yaml. This removes a need to declare
> > the child PHY node or split resource regions.
>
> Thank you for your patch. There is something to discuss/improve.
>
> > - resets:
> > - items:
> > - - description: reset of phy block.
> > - - description: phy common block reset.
> > -
> > - reset-names:
> > - items:
> > - - const: phy
> > - - const: common
> > -
> > - vdda-phy-supply:
> > - description:
> > - Phandle to a regulator supply to PHY core block.
> > -
> > - vdda-pll-supply:
> > - description:
> > - Phandle to 1.8V regulator supply to PHY refclk pll block.
> > -
> > - vddp-ref-clk-supply:
> > - description:
> > - Phandle to a regulator supply to any specific refclk pll block.
>
> What about this supply. It's missing in the new binding. Don't we need
> it? Isn't it a real supply?
I think it is a leftover from the QMP split. This is a real supply,
but it is used only by UFS PHYs. So, while we are clearing old
bindings, let's drop this unused thing.
--
With best wishes
Dmitry
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 1/9] dt-bindings: phy: migrate combo QMP PHY bindings to qcom,sc8280xp-qmp-usb43dp-phy.yaml
2023-03-26 0:57 ` [PATCH v2 1/9] dt-bindings: phy: migrate combo QMP PHY bindings to qcom,sc8280xp-qmp-usb43dp-phy.yaml Dmitry Baryshkov
2023-03-28 7:02 ` Krzysztof Kozlowski
@ 2023-03-28 10:45 ` Krzysztof Kozlowski
1 sibling, 0 replies; 21+ messages in thread
From: Krzysztof Kozlowski @ 2023-03-28 10:45 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
On 26/03/2023 01:57, Dmitry Baryshkov wrote:
> Migrate legacy bindings (described in qcom,sc7180-qmp-usb3-dp-phy.yaml)
> to qcom,sc8280xp-qmp-usb43dp-phy.yaml. This removes a need to declare
> the child PHY node or split resource regions.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> .../phy/qcom,sc7180-qmp-usb3-dp-phy.yaml | 278 ------------------
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 2/9] phy: qcom-qmp-combo: simplify clock handling
2023-03-26 0:57 [PATCH v2 0/9] phy: qcom-qmp-combo: convert to newer style of bindings Dmitry Baryshkov
2023-03-26 0:57 ` [PATCH v2 1/9] dt-bindings: phy: migrate combo QMP PHY bindings to qcom,sc8280xp-qmp-usb43dp-phy.yaml Dmitry Baryshkov
@ 2023-03-26 0:57 ` Dmitry Baryshkov
2023-03-26 0:57 ` [PATCH v2 3/9] phy: qcom-qmp-combo: populate offsets for all combo PHYs Dmitry Baryshkov
` (6 subsequent siblings)
8 siblings, 0 replies; 21+ messages in thread
From: Dmitry Baryshkov @ 2023-03-26 0:57 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
For new binding we are going to drop ref_clk_src clock and always use
ref clock. Rather than introducing additional code to handle legacy vs
current bindings (and clock names), use devm_clk_bulk_get_optional()
when new bindings are used and devm_clk_bulk_get_all() when legacy
bindings are in place.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 67 ++++++++---------------
1 file changed, 23 insertions(+), 44 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 6850e04c329b..d35d80f2a4f4 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -1263,9 +1263,6 @@ struct qmp_phy_cfg {
int (*calibrate_dp_phy)(struct qmp_combo *qmp);
void (*dp_aux_init)(struct qmp_combo *qmp);
- /* clock ids to be requested */
- const char * const *clk_list;
- int num_clks;
/* resets to be requested */
const char * const *reset_list;
int num_resets;
@@ -1307,6 +1304,7 @@ struct qmp_combo {
struct clk *pipe_clk;
struct clk_bulk_data *clks;
+ int num_clks;
struct reset_control_bulk_data *resets;
struct regulator_bulk_data *vregs;
@@ -1365,19 +1363,10 @@ static inline void qphy_clrbits(void __iomem *base, u32 offset, u32 val)
}
/* list of clocks required by phy */
-static const char * const qmp_v3_phy_clk_l[] = {
+static const char * const qmp_combo_phy_clk_l[] = {
"aux", "cfg_ahb", "ref", "com_aux",
};
-static const char * const qmp_v4_phy_clk_l[] = {
- "aux", "ref", "com_aux",
-};
-
-/* the primary usb3 phy on sm8250 doesn't have a ref clock */
-static const char * const qmp_v4_sm8250_usbphy_clk_l[] = {
- "aux", "ref_clk_src", "com_aux"
-};
-
/* list of resets */
static const char * const msm8996_usb3phy_reset_l[] = {
"phy", "common",
@@ -1451,8 +1440,6 @@ static const struct qmp_phy_cfg sc7180_usb3dpphy_cfg = {
.configure_dp_phy = qmp_v3_configure_dp_phy,
.calibrate_dp_phy = qmp_v3_calibrate_dp_phy,
- .clk_list = qmp_v3_phy_clk_l,
- .num_clks = ARRAY_SIZE(qmp_v3_phy_clk_l),
.reset_list = sc7180_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(sc7180_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1496,8 +1483,6 @@ static const struct qmp_phy_cfg sdm845_usb3dpphy_cfg = {
.configure_dp_phy = qmp_v3_configure_dp_phy,
.calibrate_dp_phy = qmp_v3_calibrate_dp_phy,
- .clk_list = qmp_v3_phy_clk_l,
- .num_clks = ARRAY_SIZE(qmp_v3_phy_clk_l),
.reset_list = msm8996_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1543,8 +1528,6 @@ static const struct qmp_phy_cfg sc8180x_usb3dpphy_cfg = {
.configure_dp_phy = qmp_v4_configure_dp_phy,
.calibrate_dp_phy = qmp_v4_calibrate_dp_phy,
- .clk_list = qmp_v4_phy_clk_l,
- .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l),
.reset_list = msm8996_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1591,8 +1574,6 @@ static const struct qmp_phy_cfg sc8280xp_usb43dpphy_cfg = {
.configure_dp_phy = qmp_v5_configure_dp_phy,
.calibrate_dp_phy = qmp_v4_calibrate_dp_phy,
- .clk_list = qmp_v4_phy_clk_l,
- .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l),
.reset_list = msm8996_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1636,8 +1617,6 @@ static const struct qmp_phy_cfg sm6350_usb3dpphy_cfg = {
.configure_dp_phy = qmp_v3_configure_dp_phy,
.calibrate_dp_phy = qmp_v3_calibrate_dp_phy,
- .clk_list = qmp_v4_phy_clk_l,
- .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l),
.reset_list = msm8996_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1681,8 +1660,6 @@ static const struct qmp_phy_cfg sm8250_usb3dpphy_cfg = {
.configure_dp_phy = qmp_v4_configure_dp_phy,
.calibrate_dp_phy = qmp_v4_calibrate_dp_phy,
- .clk_list = qmp_v4_sm8250_usbphy_clk_l,
- .num_clks = ARRAY_SIZE(qmp_v4_sm8250_usbphy_clk_l),
.reset_list = msm8996_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1731,8 +1708,6 @@ static const struct qmp_phy_cfg sm8350_usb3dpphy_cfg = {
.configure_dp_phy = qmp_v4_configure_dp_phy,
.calibrate_dp_phy = qmp_v4_calibrate_dp_phy,
- .clk_list = qmp_v4_phy_clk_l,
- .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l),
.reset_list = msm8996_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -1781,8 +1756,6 @@ static const struct qmp_phy_cfg sm8550_usb3dpphy_cfg = {
.calibrate_dp_phy = qmp_v4_calibrate_dp_phy,
.regs = qmp_v4_usb3phy_regs_layout,
- .clk_list = qmp_v4_phy_clk_l,
- .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l),
.reset_list = msm8996_usb3phy_reset_l,
.num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
.vreg_list = qmp_phy_vreg_l,
@@ -2487,7 +2460,7 @@ static int qmp_combo_com_init(struct qmp_combo *qmp)
goto err_disable_regulators;
}
- ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks);
+ ret = clk_bulk_prepare_enable(qmp->num_clks, qmp->clks);
if (ret)
goto err_assert_reset;
@@ -2540,7 +2513,7 @@ static int qmp_combo_com_exit(struct qmp_combo *qmp)
reset_control_bulk_assert(cfg->num_resets, qmp->resets);
- clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
+ clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks);
regulator_bulk_disable(cfg->num_vregs, qmp->vregs);
@@ -2785,7 +2758,6 @@ static void qmp_combo_disable_autonomous_mode(struct qmp_combo *qmp)
static int __maybe_unused qmp_combo_runtime_suspend(struct device *dev)
{
struct qmp_combo *qmp = dev_get_drvdata(dev);
- const struct qmp_phy_cfg *cfg = qmp->cfg;
dev_vdbg(dev, "Suspending QMP phy, mode:%d\n", qmp->mode);
@@ -2797,7 +2769,7 @@ static int __maybe_unused qmp_combo_runtime_suspend(struct device *dev)
qmp_combo_enable_autonomous_mode(qmp);
clk_disable_unprepare(qmp->pipe_clk);
- clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
+ clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks);
return 0;
}
@@ -2805,7 +2777,6 @@ static int __maybe_unused qmp_combo_runtime_suspend(struct device *dev)
static int __maybe_unused qmp_combo_runtime_resume(struct device *dev)
{
struct qmp_combo *qmp = dev_get_drvdata(dev);
- const struct qmp_phy_cfg *cfg = qmp->cfg;
int ret = 0;
dev_vdbg(dev, "Resuming QMP phy, mode:%d\n", qmp->mode);
@@ -2815,14 +2786,14 @@ static int __maybe_unused qmp_combo_runtime_resume(struct device *dev)
return 0;
}
- ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks);
+ ret = clk_bulk_prepare_enable(qmp->num_clks, qmp->clks);
if (ret)
return ret;
ret = clk_prepare_enable(qmp->pipe_clk);
if (ret) {
dev_err(dev, "pipe_clk enable failed, err=%d\n", ret);
- clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
+ clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks);
return ret;
}
@@ -2893,9 +2864,8 @@ static int qmp_combo_reset_init(struct qmp_combo *qmp)
static int qmp_combo_clk_init(struct qmp_combo *qmp)
{
- const struct qmp_phy_cfg *cfg = qmp->cfg;
struct device *dev = qmp->dev;
- int num = cfg->num_clks;
+ int num = ARRAY_SIZE(qmp_combo_phy_clk_l);
int i;
qmp->clks = devm_kcalloc(dev, num, sizeof(*qmp->clks), GFP_KERNEL);
@@ -2903,9 +2873,11 @@ static int qmp_combo_clk_init(struct qmp_combo *qmp)
return -ENOMEM;
for (i = 0; i < num; i++)
- qmp->clks[i].id = cfg->clk_list[i];
+ qmp->clks[i].id = qmp_combo_phy_clk_l[i];
- return devm_clk_bulk_get(dev, num, qmp->clks);
+ qmp->num_clks = num;
+
+ return devm_clk_bulk_get_optional(dev, num, qmp->clks);
}
static void phy_clk_release_provider(void *res)
@@ -3273,6 +3245,12 @@ static int qmp_combo_parse_dt_legacy(struct qmp_combo *qmp, struct device_node *
if (ret)
return ret;
+ ret = devm_clk_bulk_get_all(qmp->dev, &qmp->clks);
+ if (ret < 0)
+ return ret;
+
+ qmp->num_clks = ret;
+
return 0;
}
@@ -3283,6 +3261,7 @@ static int qmp_combo_parse_dt(struct qmp_combo *qmp)
const struct qmp_combo_offsets *offs = cfg->offsets;
struct device *dev = qmp->dev;
void __iomem *base;
+ int ret;
if (!offs)
return -EINVAL;
@@ -3312,6 +3291,10 @@ static int qmp_combo_parse_dt(struct qmp_combo *qmp)
}
qmp->dp_dp_phy = base + offs->dp_dp_phy;
+ ret = qmp_combo_clk_init(qmp);
+ if (ret)
+ return ret;
+
qmp->pipe_clk = devm_clk_get(dev, "usb3_pipe");
if (IS_ERR(qmp->pipe_clk)) {
return dev_err_probe(dev, PTR_ERR(qmp->pipe_clk),
@@ -3358,10 +3341,6 @@ static int qmp_combo_probe(struct platform_device *pdev)
mutex_init(&qmp->phy_mutex);
- ret = qmp_combo_clk_init(qmp);
- if (ret)
- return ret;
-
ret = qmp_combo_reset_init(qmp);
if (ret)
return ret;
--
2.30.2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 3/9] phy: qcom-qmp-combo: populate offsets for all combo PHYs
2023-03-26 0:57 [PATCH v2 0/9] phy: qcom-qmp-combo: convert to newer style of bindings Dmitry Baryshkov
2023-03-26 0:57 ` [PATCH v2 1/9] dt-bindings: phy: migrate combo QMP PHY bindings to qcom,sc8280xp-qmp-usb43dp-phy.yaml Dmitry Baryshkov
2023-03-26 0:57 ` [PATCH v2 2/9] phy: qcom-qmp-combo: simplify clock handling Dmitry Baryshkov
@ 2023-03-26 0:57 ` Dmitry Baryshkov
2023-03-27 8:06 ` Neil Armstrong
2023-03-26 0:57 ` [PATCH v2 4/9] phy: qcom-qmp-combo: add qcom,sc7280-qmp-usb3-dp-phy compat entry Dmitry Baryshkov
` (5 subsequent siblings)
8 siblings, 1 reply; 21+ messages in thread
From: Dmitry Baryshkov @ 2023-03-26 0:57 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
In order to support newer style bindings for combo PHYs, populate
offsets for all Combo QMP PHY configurations.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index d35d80f2a4f4..5ce68d211998 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -1407,6 +1407,8 @@ static const struct qmp_combo_offsets qmp_combo_offsets_v5 = {
};
static const struct qmp_phy_cfg sc7180_usb3dpphy_cfg = {
+ .offsets = &qmp_combo_offsets_v3,
+
.serdes_tbl = qmp_v3_usb3_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(qmp_v3_usb3_serdes_tbl),
.tx_tbl = qmp_v3_usb3_tx_tbl,
@@ -1450,6 +1452,8 @@ static const struct qmp_phy_cfg sc7180_usb3dpphy_cfg = {
};
static const struct qmp_phy_cfg sdm845_usb3dpphy_cfg = {
+ .offsets = &qmp_combo_offsets_v3,
+
.serdes_tbl = qmp_v3_usb3_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(qmp_v3_usb3_serdes_tbl),
.tx_tbl = qmp_v3_usb3_tx_tbl,
@@ -1493,6 +1497,8 @@ static const struct qmp_phy_cfg sdm845_usb3dpphy_cfg = {
};
static const struct qmp_phy_cfg sc8180x_usb3dpphy_cfg = {
+ .offsets = &qmp_combo_offsets_v3,
+
.serdes_tbl = sm8150_usb3_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(sm8150_usb3_serdes_tbl),
.tx_tbl = sm8150_usb3_tx_tbl,
@@ -1625,6 +1631,8 @@ static const struct qmp_phy_cfg sm6350_usb3dpphy_cfg = {
};
static const struct qmp_phy_cfg sm8250_usb3dpphy_cfg = {
+ .offsets = &qmp_combo_offsets_v3,
+
.serdes_tbl = sm8150_usb3_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(sm8150_usb3_serdes_tbl),
.tx_tbl = sm8250_usb3_tx_tbl,
--
2.30.2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v2 3/9] phy: qcom-qmp-combo: populate offsets for all combo PHYs
2023-03-26 0:57 ` [PATCH v2 3/9] phy: qcom-qmp-combo: populate offsets for all combo PHYs Dmitry Baryshkov
@ 2023-03-27 8:06 ` Neil Armstrong
0 siblings, 0 replies; 21+ messages in thread
From: Neil Armstrong @ 2023-03-27 8:06 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
On 26/03/2023 01:57, Dmitry Baryshkov wrote:
> In order to support newer style bindings for combo PHYs, populate
> offsets for all Combo QMP PHY configurations.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> index d35d80f2a4f4..5ce68d211998 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> @@ -1407,6 +1407,8 @@ static const struct qmp_combo_offsets qmp_combo_offsets_v5 = {
> };
>
> static const struct qmp_phy_cfg sc7180_usb3dpphy_cfg = {
> + .offsets = &qmp_combo_offsets_v3,
> +
> .serdes_tbl = qmp_v3_usb3_serdes_tbl,
> .serdes_tbl_num = ARRAY_SIZE(qmp_v3_usb3_serdes_tbl),
> .tx_tbl = qmp_v3_usb3_tx_tbl,
> @@ -1450,6 +1452,8 @@ static const struct qmp_phy_cfg sc7180_usb3dpphy_cfg = {
> };
>
> static const struct qmp_phy_cfg sdm845_usb3dpphy_cfg = {
> + .offsets = &qmp_combo_offsets_v3,
> +
> .serdes_tbl = qmp_v3_usb3_serdes_tbl,
> .serdes_tbl_num = ARRAY_SIZE(qmp_v3_usb3_serdes_tbl),
> .tx_tbl = qmp_v3_usb3_tx_tbl,
> @@ -1493,6 +1497,8 @@ static const struct qmp_phy_cfg sdm845_usb3dpphy_cfg = {
> };
>
> static const struct qmp_phy_cfg sc8180x_usb3dpphy_cfg = {
> + .offsets = &qmp_combo_offsets_v3,
> +
> .serdes_tbl = sm8150_usb3_serdes_tbl,
> .serdes_tbl_num = ARRAY_SIZE(sm8150_usb3_serdes_tbl),
> .tx_tbl = sm8150_usb3_tx_tbl,
> @@ -1625,6 +1631,8 @@ static const struct qmp_phy_cfg sm6350_usb3dpphy_cfg = {
> };
>
> static const struct qmp_phy_cfg sm8250_usb3dpphy_cfg = {
> + .offsets = &qmp_combo_offsets_v3,
> +
> .serdes_tbl = sm8150_usb3_serdes_tbl,
> .serdes_tbl_num = ARRAY_SIZE(sm8150_usb3_serdes_tbl),
> .tx_tbl = sm8250_usb3_tx_tbl,
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 4/9] phy: qcom-qmp-combo: add qcom,sc7280-qmp-usb3-dp-phy compat entry
2023-03-26 0:57 [PATCH v2 0/9] phy: qcom-qmp-combo: convert to newer style of bindings Dmitry Baryshkov
` (2 preceding siblings ...)
2023-03-26 0:57 ` [PATCH v2 3/9] phy: qcom-qmp-combo: populate offsets for all combo PHYs Dmitry Baryshkov
@ 2023-03-26 0:57 ` Dmitry Baryshkov
2023-03-27 8:07 ` Neil Armstrong
2023-03-26 0:57 ` [PATCH v2 5/9] arm64: dts: qcom: sc7180: switch USB+DP QMP PHY to new style of bindings Dmitry Baryshkov
` (4 subsequent siblings)
8 siblings, 1 reply; 21+ messages in thread
From: Dmitry Baryshkov @ 2023-03-26 0:57 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
Add separate device entry for Combo USB+DP QMP PHY on sc7280 platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 5ce68d211998..8fadf92095c5 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -3431,6 +3431,10 @@ static const struct of_device_id qmp_combo_of_match_table[] = {
.compatible = "qcom,sc7180-qmp-usb3-dp-phy",
.data = &sc7180_usb3dpphy_cfg,
},
+ {
+ .compatible = "qcom,sc7280-qmp-usb3-dp-phy",
+ .data = &sm8250_usb3dpphy_cfg,
+ },
{
.compatible = "qcom,sc8180x-qmp-usb3-dp-phy",
.data = &sc8180x_usb3dpphy_cfg,
--
2.30.2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v2 4/9] phy: qcom-qmp-combo: add qcom,sc7280-qmp-usb3-dp-phy compat entry
2023-03-26 0:57 ` [PATCH v2 4/9] phy: qcom-qmp-combo: add qcom,sc7280-qmp-usb3-dp-phy compat entry Dmitry Baryshkov
@ 2023-03-27 8:07 ` Neil Armstrong
0 siblings, 0 replies; 21+ messages in thread
From: Neil Armstrong @ 2023-03-27 8:07 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
On 26/03/2023 01:57, Dmitry Baryshkov wrote:
> Add separate device entry for Combo USB+DP QMP PHY on sc7280 platform.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> index 5ce68d211998..8fadf92095c5 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> @@ -3431,6 +3431,10 @@ static const struct of_device_id qmp_combo_of_match_table[] = {
> .compatible = "qcom,sc7180-qmp-usb3-dp-phy",
> .data = &sc7180_usb3dpphy_cfg,
> },
> + {
> + .compatible = "qcom,sc7280-qmp-usb3-dp-phy",
> + .data = &sm8250_usb3dpphy_cfg,
> + },
> {
> .compatible = "qcom,sc8180x-qmp-usb3-dp-phy",
> .data = &sc8180x_usb3dpphy_cfg,
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 5/9] arm64: dts: qcom: sc7180: switch USB+DP QMP PHY to new style of bindings
2023-03-26 0:57 [PATCH v2 0/9] phy: qcom-qmp-combo: convert to newer style of bindings Dmitry Baryshkov
` (3 preceding siblings ...)
2023-03-26 0:57 ` [PATCH v2 4/9] phy: qcom-qmp-combo: add qcom,sc7280-qmp-usb3-dp-phy compat entry Dmitry Baryshkov
@ 2023-03-26 0:57 ` Dmitry Baryshkov
2023-03-27 8:09 ` Neil Armstrong
2023-03-26 0:57 ` [PATCH v2 6/9] arm64: dts: qcom: sc7280: " Dmitry Baryshkov
` (3 subsequent siblings)
8 siblings, 1 reply; 21+ messages in thread
From: Dmitry Baryshkov @ 2023-03-26 0:57 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 57 ++++++++++------------------
1 file changed, 19 insertions(+), 38 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 3c799b564b64..98004b02b762 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -14,6 +14,7 @@
#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/interconnect/qcom,sc7180.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/phy/phy-qcom-qmp.h>
#include <dt-bindings/phy/phy-qcom-qusb2.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/reset/qcom,sdm845-aoss.h>
@@ -2713,49 +2714,28 @@ usb_1_hsphy: phy@88e3000 {
nvmem-cells = <&qusb2p_hstx_trim>;
};
- usb_1_qmpphy: phy-wrapper@88e9000 {
+ usb_1_qmpphy: phy@88e8000 {
compatible = "qcom,sc7180-qmp-usb3-dp-phy";
- reg = <0 0x088e9000 0 0x18c>,
- <0 0x088e8000 0 0x3c>,
- <0 0x088ea000 0 0x18c>;
+ reg = <0 0x088e8000 0 0x3000>;
status = "disabled";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
- <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
<&gcc GCC_USB3_PRIM_CLKREF_CLK>,
- <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
- clock-names = "aux", "cfg_ahb", "ref", "com_aux";
+ <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
+ <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,
+ <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>;
+ clock-names = "aux",
+ "ref",
+ "com_aux",
+ "usb3_pipe",
+ "cfg_ahb";
resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
<&gcc GCC_USB3_DP_PHY_PRIM_BCR>;
reset-names = "phy", "common";
- usb_1_ssphy: usb3-phy@88e9200 {
- reg = <0 0x088e9200 0 0x128>,
- <0 0x088e9400 0 0x200>,
- <0 0x088e9c00 0 0x218>,
- <0 0x088e9600 0 0x128>,
- <0 0x088e9800 0 0x200>,
- <0 0x088e9a00 0 0x18>;
- #clock-cells = <0>;
- #phy-cells = <0>;
- clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3_phy_pipe_clk_src";
- };
-
- dp_phy: dp-phy@88ea200 {
- reg = <0 0x088ea200 0 0x200>,
- <0 0x088ea400 0 0x200>,
- <0 0x088eaa00 0 0x200>,
- <0 0x088ea600 0 0x200>,
- <0 0x088ea800 0 0x200>;
- #clock-cells = <1>;
- #phy-cells = <0>;
- };
+ #clock-cells = <1>;
+ #phy-cells = <1>;
};
dc_noc: interconnect@9160000 {
@@ -2835,7 +2815,7 @@ usb_1_dwc3: usb@a600000 {
iommus = <&apps_smmu 0x540 0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
- phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
+ phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
maximum-speed = "super-speed";
};
@@ -3143,8 +3123,9 @@ mdss_dp: displayport-controller@ae90000 {
"ctrl_link_iface", "stream_pixel";
assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
- assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
- phys = <&dp_phy>;
+ assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
+ phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
phy-names = "dp";
operating-points-v2 = <&dp_opp_table>;
@@ -3201,8 +3182,8 @@ dispcc: clock-controller@af00000 {
<&gcc GCC_DISP_GPLL0_CLK_SRC>,
<&dsi_phy 0>,
<&dsi_phy 1>,
- <&dp_phy 0>,
- <&dp_phy 1>;
+ <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
clock-names = "bi_tcxo",
"gcc_disp_gpll0_clk_src",
"dsi0_phy_pll_out_byteclk",
--
2.30.2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v2 5/9] arm64: dts: qcom: sc7180: switch USB+DP QMP PHY to new style of bindings
2023-03-26 0:57 ` [PATCH v2 5/9] arm64: dts: qcom: sc7180: switch USB+DP QMP PHY to new style of bindings Dmitry Baryshkov
@ 2023-03-27 8:09 ` Neil Armstrong
0 siblings, 0 replies; 21+ messages in thread
From: Neil Armstrong @ 2023-03-27 8:09 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
On 26/03/2023 01:57, Dmitry Baryshkov wrote:
> Change the USB QMP PHY to use newer style of QMP PHY bindings (single
> resource region, no per-PHY subnodes).
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 57 ++++++++++------------------
> 1 file changed, 19 insertions(+), 38 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index 3c799b564b64..98004b02b762 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -14,6 +14,7 @@
> #include <dt-bindings/interconnect/qcom,osm-l3.h>
> #include <dt-bindings/interconnect/qcom,sc7180.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/phy/phy-qcom-qmp.h>
> #include <dt-bindings/phy/phy-qcom-qusb2.h>
> #include <dt-bindings/power/qcom-rpmpd.h>
> #include <dt-bindings/reset/qcom,sdm845-aoss.h>
> @@ -2713,49 +2714,28 @@ usb_1_hsphy: phy@88e3000 {
> nvmem-cells = <&qusb2p_hstx_trim>;
> };
>
> - usb_1_qmpphy: phy-wrapper@88e9000 {
> + usb_1_qmpphy: phy@88e8000 {
> compatible = "qcom,sc7180-qmp-usb3-dp-phy";
> - reg = <0 0x088e9000 0 0x18c>,
> - <0 0x088e8000 0 0x3c>,
> - <0 0x088ea000 0 0x18c>;
> + reg = <0 0x088e8000 0 0x3000>;
> status = "disabled";
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
>
> clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
> - <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
> <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
> - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
> - clock-names = "aux", "cfg_ahb", "ref", "com_aux";
> + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
> + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,
> + <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>;
> + clock-names = "aux",
> + "ref",
> + "com_aux",
> + "usb3_pipe",
> + "cfg_ahb";
>
> resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
> <&gcc GCC_USB3_DP_PHY_PRIM_BCR>;
> reset-names = "phy", "common";
>
> - usb_1_ssphy: usb3-phy@88e9200 {
> - reg = <0 0x088e9200 0 0x128>,
> - <0 0x088e9400 0 0x200>,
> - <0 0x088e9c00 0 0x218>,
> - <0 0x088e9600 0 0x128>,
> - <0 0x088e9800 0 0x200>,
> - <0 0x088e9a00 0 0x18>;
> - #clock-cells = <0>;
> - #phy-cells = <0>;
> - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> - clock-names = "pipe0";
> - clock-output-names = "usb3_phy_pipe_clk_src";
> - };
> -
> - dp_phy: dp-phy@88ea200 {
> - reg = <0 0x088ea200 0 0x200>,
> - <0 0x088ea400 0 0x200>,
> - <0 0x088eaa00 0 0x200>,
> - <0 0x088ea600 0 0x200>,
> - <0 0x088ea800 0 0x200>;
> - #clock-cells = <1>;
> - #phy-cells = <0>;
> - };
> + #clock-cells = <1>;
> + #phy-cells = <1>;
> };
>
> dc_noc: interconnect@9160000 {
> @@ -2835,7 +2815,7 @@ usb_1_dwc3: usb@a600000 {
> iommus = <&apps_smmu 0x540 0>;
> snps,dis_u2_susphy_quirk;
> snps,dis_enblslpm_quirk;
> - phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
> + phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
> phy-names = "usb2-phy", "usb3-phy";
> maximum-speed = "super-speed";
> };
> @@ -3143,8 +3123,9 @@ mdss_dp: displayport-controller@ae90000 {
> "ctrl_link_iface", "stream_pixel";
> assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
> <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
> - assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
> - phys = <&dp_phy>;
> + assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
> + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
> + phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
> phy-names = "dp";
>
> operating-points-v2 = <&dp_opp_table>;
> @@ -3201,8 +3182,8 @@ dispcc: clock-controller@af00000 {
> <&gcc GCC_DISP_GPLL0_CLK_SRC>,
> <&dsi_phy 0>,
> <&dsi_phy 1>,
> - <&dp_phy 0>,
> - <&dp_phy 1>;
> + <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
> + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
> clock-names = "bi_tcxo",
> "gcc_disp_gpll0_clk_src",
> "dsi0_phy_pll_out_byteclk",
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 6/9] arm64: dts: qcom: sc7280: switch USB+DP QMP PHY to new style of bindings
2023-03-26 0:57 [PATCH v2 0/9] phy: qcom-qmp-combo: convert to newer style of bindings Dmitry Baryshkov
` (4 preceding siblings ...)
2023-03-26 0:57 ` [PATCH v2 5/9] arm64: dts: qcom: sc7180: switch USB+DP QMP PHY to new style of bindings Dmitry Baryshkov
@ 2023-03-26 0:57 ` Dmitry Baryshkov
2023-03-27 8:12 ` Neil Armstrong
2023-03-26 0:57 ` [PATCH v2 7/9] arm64: dts: qcom: sdm845: " Dmitry Baryshkov
` (2 subsequent siblings)
8 siblings, 1 reply; 21+ messages in thread
From: Dmitry Baryshkov @ 2023-03-26 0:57 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 57 +++++++++-------------------
1 file changed, 18 insertions(+), 39 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 5e6f9f441f1a..887c490bdd14 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -18,6 +18,7 @@
#include <dt-bindings/interconnect/qcom,sc7280.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/mailbox/qcom-ipcc.h>
+#include <dt-bindings/phy/phy-qcom-qmp.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/reset/qcom,sdm845-aoss.h>
#include <dt-bindings/reset/qcom,sdm845-pdc.h>
@@ -3327,49 +3328,26 @@ usb_2_hsphy: phy@88e4000 {
resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
};
- usb_1_qmpphy: phy-wrapper@88e9000 {
- compatible = "qcom,sc7280-qmp-usb3-dp-phy",
- "qcom,sm8250-qmp-usb3-dp-phy";
- reg = <0 0x088e9000 0 0x200>,
- <0 0x088e8000 0 0x40>,
- <0 0x088ea000 0 0x200>;
+ usb_1_qmpphy: phy@88e8000 {
+ compatible = "qcom,sc7280-qmp-usb3-dp-phy";
+ reg = <0 0x088e8000 0 0x3000>;
status = "disabled";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
<&rpmhcc RPMH_CXO_CLK>,
- <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
- clock-names = "aux", "ref_clk_src", "com_aux";
+ <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
+ <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
+ clock-names = "aux",
+ "ref",
+ "com_aux",
+ "usb3_pipe";
resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
<&gcc GCC_USB3_PHY_PRIM_BCR>;
reset-names = "phy", "common";
- usb_1_ssphy: usb3-phy@88e9200 {
- reg = <0 0x088e9200 0 0x200>,
- <0 0x088e9400 0 0x200>,
- <0 0x088e9c00 0 0x400>,
- <0 0x088e9600 0 0x200>,
- <0 0x088e9800 0 0x200>,
- <0 0x088e9a00 0 0x100>;
- #clock-cells = <0>;
- #phy-cells = <0>;
- clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3_phy_pipe_clk_src";
- };
-
- dp_phy: dp-phy@88ea200 {
- reg = <0 0x088ea200 0 0x200>,
- <0 0x088ea400 0 0x200>,
- <0 0x088eaa00 0 0x200>,
- <0 0x088ea600 0 0x200>,
- <0 0x088ea800 0 0x200>;
- #phy-cells = <0>;
- #clock-cells = <1>;
- };
+ #clock-cells = <1>;
+ #phy-cells = <1>;
};
usb_2: usb@8cf8800 {
@@ -3694,7 +3672,7 @@ usb_1_dwc3: usb@a600000 {
iommus = <&apps_smmu 0xe0 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
- phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
+ phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
maximum-speed = "super-speed";
};
@@ -3799,8 +3777,8 @@ dispcc: clock-controller@af00000 {
<&gcc GCC_DISP_GPLL0_CLK_SRC>,
<&mdss_dsi_phy 0>,
<&mdss_dsi_phy 1>,
- <&dp_phy 0>,
- <&dp_phy 1>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&mdss_edp_phy 0>,
<&mdss_edp_phy 1>;
clock-names = "bi_tcxo",
@@ -4138,8 +4116,9 @@ mdss_dp: displayport-controller@ae90000 {
"stream_pixel";
assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
- assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
- phys = <&dp_phy>;
+ assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
+ phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
phy-names = "dp";
operating-points-v2 = <&dp_opp_table>;
--
2.30.2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v2 6/9] arm64: dts: qcom: sc7280: switch USB+DP QMP PHY to new style of bindings
2023-03-26 0:57 ` [PATCH v2 6/9] arm64: dts: qcom: sc7280: " Dmitry Baryshkov
@ 2023-03-27 8:12 ` Neil Armstrong
2023-03-27 10:19 ` Dmitry Baryshkov
0 siblings, 1 reply; 21+ messages in thread
From: Neil Armstrong @ 2023-03-27 8:12 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
On 26/03/2023 01:57, Dmitry Baryshkov wrote:
> Change the USB QMP PHY to use newer style of QMP PHY bindings (single
> resource region, no per-PHY subnodes).
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 57 +++++++++-------------------
> 1 file changed, 18 insertions(+), 39 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 5e6f9f441f1a..887c490bdd14 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -18,6 +18,7 @@
> #include <dt-bindings/interconnect/qcom,sc7280.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/mailbox/qcom-ipcc.h>
> +#include <dt-bindings/phy/phy-qcom-qmp.h>
> #include <dt-bindings/power/qcom-rpmpd.h>
> #include <dt-bindings/reset/qcom,sdm845-aoss.h>
> #include <dt-bindings/reset/qcom,sdm845-pdc.h>
> @@ -3327,49 +3328,26 @@ usb_2_hsphy: phy@88e4000 {
> resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
> };
>
> - usb_1_qmpphy: phy-wrapper@88e9000 {
> - compatible = "qcom,sc7280-qmp-usb3-dp-phy",
> - "qcom,sm8250-qmp-usb3-dp-phy";
> - reg = <0 0x088e9000 0 0x200>,
> - <0 0x088e8000 0 0x40>,
> - <0 0x088ea000 0 0x200>;
> + usb_1_qmpphy: phy@88e8000 {
> + compatible = "qcom,sc7280-qmp-usb3-dp-phy";
> + reg = <0 0x088e8000 0 0x3000>;
> status = "disabled";
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
>
> clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
> <&rpmhcc RPMH_CXO_CLK>,
> - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
> - clock-names = "aux", "ref_clk_src", "com_aux";
> + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
> + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> + clock-names = "aux",
> + "ref",
> + "com_aux",
> + "usb3_pipe";
>
> resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
> <&gcc GCC_USB3_PHY_PRIM_BCR>;
> reset-names = "phy", "common";
>
> - usb_1_ssphy: usb3-phy@88e9200 {
> - reg = <0 0x088e9200 0 0x200>,
> - <0 0x088e9400 0 0x200>,
> - <0 0x088e9c00 0 0x400>,
> - <0 0x088e9600 0 0x200>,
> - <0 0x088e9800 0 0x200>,
> - <0 0x088e9a00 0 0x100>;
> - #clock-cells = <0>;
> - #phy-cells = <0>;
> - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> - clock-names = "pipe0";
> - clock-output-names = "usb3_phy_pipe_clk_src";
> - };
> -
> - dp_phy: dp-phy@88ea200 {
> - reg = <0 0x088ea200 0 0x200>,
> - <0 0x088ea400 0 0x200>,
> - <0 0x088eaa00 0 0x200>,
> - <0 0x088ea600 0 0x200>,
> - <0 0x088ea800 0 0x200>;
> - #phy-cells = <0>;
> - #clock-cells = <1>;
> - };
> + #clock-cells = <1>;
> + #phy-cells = <1>;
> };
>
> usb_2: usb@8cf8800 {
> @@ -3694,7 +3672,7 @@ usb_1_dwc3: usb@a600000 {
> iommus = <&apps_smmu 0xe0 0x0>;
> snps,dis_u2_susphy_quirk;
> snps,dis_enblslpm_quirk;
> - phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
> + phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
> phy-names = "usb2-phy", "usb3-phy";
> maximum-speed = "super-speed";
> };
> @@ -3799,8 +3777,8 @@ dispcc: clock-controller@af00000 {
> <&gcc GCC_DISP_GPLL0_CLK_SRC>,
> <&mdss_dsi_phy 0>,
> <&mdss_dsi_phy 1>,
> - <&dp_phy 0>,
> - <&dp_phy 1>,
> + <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
> + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
> <&mdss_edp_phy 0>,
> <&mdss_edp_phy 1>;
The gcc usb3_phy_wrapper_gcc_usb30_pipe_clk entry is missing, it was already missing with legacy bindings.
Neil
> clock-names = "bi_tcxo",
> @@ -4138,8 +4116,9 @@ mdss_dp: displayport-controller@ae90000 {
> "stream_pixel";
> assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
> <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
> - assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
> - phys = <&dp_phy>;
> + assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
> + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
> + phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
> phy-names = "dp";
>
> operating-points-v2 = <&dp_opp_table>;
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 6/9] arm64: dts: qcom: sc7280: switch USB+DP QMP PHY to new style of bindings
2023-03-27 8:12 ` Neil Armstrong
@ 2023-03-27 10:19 ` Dmitry Baryshkov
0 siblings, 0 replies; 21+ messages in thread
From: Dmitry Baryshkov @ 2023-03-27 10:19 UTC (permalink / raw)
To: neil.armstrong, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
On 27/03/2023 11:12, Neil Armstrong wrote:
> On 26/03/2023 01:57, Dmitry Baryshkov wrote:
>> Change the USB QMP PHY to use newer style of QMP PHY bindings (single
>> resource region, no per-PHY subnodes).
>>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 57 +++++++++-------------------
>> 1 file changed, 18 insertions(+), 39 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 5e6f9f441f1a..887c490bdd14 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -18,6 +18,7 @@
>> #include <dt-bindings/interconnect/qcom,sc7280.h>
>> #include <dt-bindings/interrupt-controller/arm-gic.h>
>> #include <dt-bindings/mailbox/qcom-ipcc.h>
>> +#include <dt-bindings/phy/phy-qcom-qmp.h>
>> #include <dt-bindings/power/qcom-rpmpd.h>
>> #include <dt-bindings/reset/qcom,sdm845-aoss.h>
>> #include <dt-bindings/reset/qcom,sdm845-pdc.h>
>> @@ -3327,49 +3328,26 @@ usb_2_hsphy: phy@88e4000 {
>> resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
>> };
>> - usb_1_qmpphy: phy-wrapper@88e9000 {
>> - compatible = "qcom,sc7280-qmp-usb3-dp-phy",
>> - "qcom,sm8250-qmp-usb3-dp-phy";
>> - reg = <0 0x088e9000 0 0x200>,
>> - <0 0x088e8000 0 0x40>,
>> - <0 0x088ea000 0 0x200>;
>> + usb_1_qmpphy: phy@88e8000 {
>> + compatible = "qcom,sc7280-qmp-usb3-dp-phy";
>> + reg = <0 0x088e8000 0 0x3000>;
>> status = "disabled";
>> - #address-cells = <2>;
>> - #size-cells = <2>;
>> - ranges;
>> clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
>> <&rpmhcc RPMH_CXO_CLK>,
>> - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
>> - clock-names = "aux", "ref_clk_src", "com_aux";
>> + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
>> + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
>> + clock-names = "aux",
>> + "ref",
>> + "com_aux",
>> + "usb3_pipe";
>> resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
>> <&gcc GCC_USB3_PHY_PRIM_BCR>;
>> reset-names = "phy", "common";
>> - usb_1_ssphy: usb3-phy@88e9200 {
>> - reg = <0 0x088e9200 0 0x200>,
>> - <0 0x088e9400 0 0x200>,
>> - <0 0x088e9c00 0 0x400>,
>> - <0 0x088e9600 0 0x200>,
>> - <0 0x088e9800 0 0x200>,
>> - <0 0x088e9a00 0 0x100>;
>> - #clock-cells = <0>;
>> - #phy-cells = <0>;
>> - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
>> - clock-names = "pipe0";
>> - clock-output-names = "usb3_phy_pipe_clk_src";
>> - };
>> -
>> - dp_phy: dp-phy@88ea200 {
>> - reg = <0 0x088ea200 0 0x200>,
>> - <0 0x088ea400 0 0x200>,
>> - <0 0x088eaa00 0 0x200>,
>> - <0 0x088ea600 0 0x200>,
>> - <0 0x088ea800 0 0x200>;
>> - #phy-cells = <0>;
>> - #clock-cells = <1>;
>> - };
>> + #clock-cells = <1>;
>> + #phy-cells = <1>;
>> };
>> usb_2: usb@8cf8800 {
>> @@ -3694,7 +3672,7 @@ usb_1_dwc3: usb@a600000 {
>> iommus = <&apps_smmu 0xe0 0x0>;
>> snps,dis_u2_susphy_quirk;
>> snps,dis_enblslpm_quirk;
>> - phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
>> + phys = <&usb_1_hsphy>, <&usb_1_qmpphy
>> QMP_USB43DP_USB3_PHY>;
>> phy-names = "usb2-phy", "usb3-phy";
>> maximum-speed = "super-speed";
>> };
>> @@ -3799,8 +3777,8 @@ dispcc: clock-controller@af00000 {
>> <&gcc GCC_DISP_GPLL0_CLK_SRC>,
>> <&mdss_dsi_phy 0>,
>> <&mdss_dsi_phy 1>,
>> - <&dp_phy 0>,
>> - <&dp_phy 1>,
>> + <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
>> + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
>> <&mdss_edp_phy 0>,
>> <&mdss_edp_phy 1>;
>
> The gcc usb3_phy_wrapper_gcc_usb30_pipe_clk entry is missing, it was
> already missing with legacy bindings.
Point noted, it should probably go into a separate change.
>
> Neil
>
>> clock-names = "bi_tcxo",
>> @@ -4138,8 +4116,9 @@ mdss_dp: displayport-controller@ae90000 {
>> "stream_pixel";
>> assigned-clocks = <&dispcc
>> DISP_CC_MDSS_DP_LINK_CLK_SRC>,
>> <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
>> - assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
>> - phys = <&dp_phy>;
>> + assigned-clock-parents = <&usb_1_qmpphy
>> QMP_USB43DP_DP_LINK_CLK>,
>> + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
>> + phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
>> phy-names = "dp";
>> operating-points-v2 = <&dp_opp_table>;
>
--
With best wishes
Dmitry
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 7/9] arm64: dts: qcom: sdm845: switch USB+DP QMP PHY to new style of bindings
2023-03-26 0:57 [PATCH v2 0/9] phy: qcom-qmp-combo: convert to newer style of bindings Dmitry Baryshkov
` (5 preceding siblings ...)
2023-03-26 0:57 ` [PATCH v2 6/9] arm64: dts: qcom: sc7280: " Dmitry Baryshkov
@ 2023-03-26 0:57 ` Dmitry Baryshkov
2023-03-27 8:13 ` Neil Armstrong
2023-03-26 0:57 ` [PATCH v2 8/9] arm64: dts: qcom: sm8150: " Dmitry Baryshkov
2023-03-26 0:57 ` [PATCH v2 9/9] arm64: dts: qcom: sm8250: " Dmitry Baryshkov
8 siblings, 1 reply; 21+ messages in thread
From: Dmitry Baryshkov @ 2023-03-26 0:57 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 57 ++++++++++------------------
1 file changed, 19 insertions(+), 38 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 2f32179c7d1b..aff8b9278914 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -17,6 +17,7 @@
#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/interconnect/qcom,sdm845.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/phy/phy-qcom-qmp.h>
#include <dt-bindings/phy/phy-qcom-qusb2.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/reset/qcom,sdm845-aoss.h>
@@ -3909,49 +3910,28 @@ usb_2_hsphy: phy@88e3000 {
nvmem-cells = <&qusb2s_hstx_trim>;
};
- usb_1_qmpphy: phy@88e9000 {
+ usb_1_qmpphy: phy@88e8000 {
compatible = "qcom,sdm845-qmp-usb3-dp-phy";
- reg = <0 0x088e9000 0 0x18c>,
- <0 0x088e8000 0 0x38>,
- <0 0x088ea000 0 0x40>;
+ reg = <0 0x088e8000 0 0x3000>;
status = "disabled";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
- <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
<&gcc GCC_USB3_PRIM_CLKREF_CLK>,
- <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
- clock-names = "aux", "cfg_ahb", "ref", "com_aux";
+ <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
+ <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,
+ <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>;
+ clock-names = "aux",
+ "ref",
+ "com_aux",
+ "usb3_pipe",
+ "cfg_ahb";
resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
<&gcc GCC_USB3_DP_PHY_PRIM_BCR>;
reset-names = "phy", "common";
- usb_1_ssphy: usb3-phy@88e9200 {
- reg = <0 0x088e9200 0 0x128>,
- <0 0x088e9400 0 0x200>,
- <0 0x088e9c00 0 0x218>,
- <0 0x088e9600 0 0x128>,
- <0 0x088e9800 0 0x200>,
- <0 0x088e9a00 0 0x100>;
- #clock-cells = <0>;
- #phy-cells = <0>;
- clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3_phy_pipe_clk_src";
- };
-
- dp_phy: dp-phy@88ea200 {
- reg = <0 0x088ea200 0 0x200>,
- <0 0x088ea400 0 0x200>,
- <0 0x088eaa00 0 0x200>,
- <0 0x088ea600 0 0x200>,
- <0 0x088ea800 0 0x200>;
- #clock-cells = <1>;
- #phy-cells = <0>;
- };
+ #clock-cells = <1>;
+ #phy-cells = <1>;
};
usb_2_qmpphy: phy@88eb000 {
@@ -4031,7 +4011,7 @@ usb_1_dwc3: usb@a600000 {
iommus = <&apps_smmu 0x740 0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
- phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
+ phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
};
};
@@ -4499,8 +4479,9 @@ mdss_dp: displayport-controller@ae90000 {
"ctrl_link_iface", "stream_pixel";
assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
- assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
- phys = <&dp_phy>;
+ assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
+ phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
phy-names = "dp";
operating-points-v2 = <&dp_opp_table>;
@@ -4838,8 +4819,8 @@ dispcc: clock-controller@af00000 {
<&dsi0_phy 1>,
<&dsi1_phy 0>,
<&dsi1_phy 1>,
- <&dp_phy 0>,
- <&dp_phy 1>;
+ <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
clock-names = "bi_tcxo",
"gcc_disp_gpll0_clk_src",
"gcc_disp_gpll0_div_clk_src",
--
2.30.2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v2 7/9] arm64: dts: qcom: sdm845: switch USB+DP QMP PHY to new style of bindings
2023-03-26 0:57 ` [PATCH v2 7/9] arm64: dts: qcom: sdm845: " Dmitry Baryshkov
@ 2023-03-27 8:13 ` Neil Armstrong
0 siblings, 0 replies; 21+ messages in thread
From: Neil Armstrong @ 2023-03-27 8:13 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
On 26/03/2023 01:57, Dmitry Baryshkov wrote:
> Change the USB QMP PHY to use newer style of QMP PHY bindings (single
> resource region, no per-PHY subnodes).
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 57 ++++++++++------------------
> 1 file changed, 19 insertions(+), 38 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 2f32179c7d1b..aff8b9278914 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -17,6 +17,7 @@
> #include <dt-bindings/interconnect/qcom,osm-l3.h>
> #include <dt-bindings/interconnect/qcom,sdm845.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/phy/phy-qcom-qmp.h>
> #include <dt-bindings/phy/phy-qcom-qusb2.h>
> #include <dt-bindings/power/qcom-rpmpd.h>
> #include <dt-bindings/reset/qcom,sdm845-aoss.h>
> @@ -3909,49 +3910,28 @@ usb_2_hsphy: phy@88e3000 {
> nvmem-cells = <&qusb2s_hstx_trim>;
> };
>
> - usb_1_qmpphy: phy@88e9000 {
> + usb_1_qmpphy: phy@88e8000 {
> compatible = "qcom,sdm845-qmp-usb3-dp-phy";
> - reg = <0 0x088e9000 0 0x18c>,
> - <0 0x088e8000 0 0x38>,
> - <0 0x088ea000 0 0x40>;
> + reg = <0 0x088e8000 0 0x3000>;
> status = "disabled";
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
>
> clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
> - <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
> <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
> - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
> - clock-names = "aux", "cfg_ahb", "ref", "com_aux";
> + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
> + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,
> + <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>;
> + clock-names = "aux",
> + "ref",
> + "com_aux",
> + "usb3_pipe",
> + "cfg_ahb";
>
> resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
> <&gcc GCC_USB3_DP_PHY_PRIM_BCR>;
> reset-names = "phy", "common";
>
> - usb_1_ssphy: usb3-phy@88e9200 {
> - reg = <0 0x088e9200 0 0x128>,
> - <0 0x088e9400 0 0x200>,
> - <0 0x088e9c00 0 0x218>,
> - <0 0x088e9600 0 0x128>,
> - <0 0x088e9800 0 0x200>,
> - <0 0x088e9a00 0 0x100>;
> - #clock-cells = <0>;
> - #phy-cells = <0>;
> - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> - clock-names = "pipe0";
> - clock-output-names = "usb3_phy_pipe_clk_src";
> - };
> -
> - dp_phy: dp-phy@88ea200 {
> - reg = <0 0x088ea200 0 0x200>,
> - <0 0x088ea400 0 0x200>,
> - <0 0x088eaa00 0 0x200>,
> - <0 0x088ea600 0 0x200>,
> - <0 0x088ea800 0 0x200>;
> - #clock-cells = <1>;
> - #phy-cells = <0>;
> - };
> + #clock-cells = <1>;
> + #phy-cells = <1>;
> };
>
> usb_2_qmpphy: phy@88eb000 {
> @@ -4031,7 +4011,7 @@ usb_1_dwc3: usb@a600000 {
> iommus = <&apps_smmu 0x740 0>;
> snps,dis_u2_susphy_quirk;
> snps,dis_enblslpm_quirk;
> - phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
> + phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
> phy-names = "usb2-phy", "usb3-phy";
> };
> };
> @@ -4499,8 +4479,9 @@ mdss_dp: displayport-controller@ae90000 {
> "ctrl_link_iface", "stream_pixel";
> assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
> <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
> - assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
> - phys = <&dp_phy>;
> + assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
> + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
> + phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
> phy-names = "dp";
>
> operating-points-v2 = <&dp_opp_table>;
> @@ -4838,8 +4819,8 @@ dispcc: clock-controller@af00000 {
> <&dsi0_phy 1>,
> <&dsi1_phy 0>,
> <&dsi1_phy 1>,
> - <&dp_phy 0>,
> - <&dp_phy 1>;
> + <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
> + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
> clock-names = "bi_tcxo",
> "gcc_disp_gpll0_clk_src",
> "gcc_disp_gpll0_div_clk_src",
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 8/9] arm64: dts: qcom: sm8150: switch USB+DP QMP PHY to new style of bindings
2023-03-26 0:57 [PATCH v2 0/9] phy: qcom-qmp-combo: convert to newer style of bindings Dmitry Baryshkov
` (6 preceding siblings ...)
2023-03-26 0:57 ` [PATCH v2 7/9] arm64: dts: qcom: sdm845: " Dmitry Baryshkov
@ 2023-03-26 0:57 ` Dmitry Baryshkov
2023-03-27 8:14 ` Neil Armstrong
2023-03-26 0:57 ` [PATCH v2 9/9] arm64: dts: qcom: sm8250: " Dmitry Baryshkov
8 siblings, 1 reply; 21+ messages in thread
From: Dmitry Baryshkov @ 2023-03-26 0:57 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 48 ++++++++--------------------
1 file changed, 14 insertions(+), 34 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index a618218f7b68..4df9fef5c7b0 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -6,6 +6,7 @@
#include <dt-bindings/dma/qcom-gpi.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/phy/phy-qcom-qmp.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/clock/qcom,rpmh.h>
@@ -3391,47 +3392,26 @@ usb_2_hsphy: phy@88e3000 {
resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
};
- usb_1_qmpphy: phy@88e9000 {
+ usb_1_qmpphy: phy@88e8000 {
compatible = "qcom,sm8150-qmp-usb3-dp-phy";
- reg = <0 0x088e9000 0 0x18c>,
- <0 0x088e8000 0 0x38>,
- <0 0x088ea000 0 0x40>;
- status = "disabled";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ reg = <0 0x088e8000 0 0x3000>;
+
clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
- <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_USB3_PRIM_CLKREF_CLK>,
- <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
- clock-names = "aux", "ref_clk_src", "ref", "com_aux";
+ <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
+ <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
+ clock-names = "aux",
+ "ref",
+ "com_aux",
+ "usb3_pipe";
resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
<&gcc GCC_USB3_PHY_PRIM_BCR>;
reset-names = "phy", "common";
- usb_1_ssphy: phy@88e9200 {
- reg = <0 0x088e9200 0 0x200>,
- <0 0x088e9400 0 0x200>,
- <0 0x088e9c00 0 0x218>,
- <0 0x088e9600 0 0x200>,
- <0 0x088e9800 0 0x200>,
- <0 0x088e9a00 0 0x100>;
- #clock-cells = <0>;
- #phy-cells = <0>;
- clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3_phy_pipe_clk_src";
- };
+ #clock-cells = <1>;
+ #phy-cells = <1>;
- usb_1_dpphy: phy@88ea200 {
- reg = <0 0x088ea200 0 0x200>,
- <0 0x088ea400 0 0x200>,
- <0 0x088eaa00 0 0x200>,
- <0 0x088ea600 0 0x200>,
- <0 0x088ea800 0 0x200>;
- #clock-cells = <1>;
- #phy-cells = <0>;
- };
+ status = "disabled";
};
usb_2_qmpphy: phy@88eb000 {
@@ -3568,7 +3548,7 @@ usb_1_dwc3: usb@a600000 {
iommus = <&apps_smmu 0x140 0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
- phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
+ phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
};
};
--
2.30.2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v2 8/9] arm64: dts: qcom: sm8150: switch USB+DP QMP PHY to new style of bindings
2023-03-26 0:57 ` [PATCH v2 8/9] arm64: dts: qcom: sm8150: " Dmitry Baryshkov
@ 2023-03-27 8:14 ` Neil Armstrong
0 siblings, 0 replies; 21+ messages in thread
From: Neil Armstrong @ 2023-03-27 8:14 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
On 26/03/2023 01:57, Dmitry Baryshkov wrote:
> Change the USB QMP PHY to use newer style of QMP PHY bindings (single
> resource region, no per-PHY subnodes).
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 48 ++++++++--------------------
> 1 file changed, 14 insertions(+), 34 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index a618218f7b68..4df9fef5c7b0 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -6,6 +6,7 @@
>
> #include <dt-bindings/dma/qcom-gpi.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/phy/phy-qcom-qmp.h>
> #include <dt-bindings/power/qcom-rpmpd.h>
> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
> #include <dt-bindings/clock/qcom,rpmh.h>
> @@ -3391,47 +3392,26 @@ usb_2_hsphy: phy@88e3000 {
> resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
> };
>
> - usb_1_qmpphy: phy@88e9000 {
> + usb_1_qmpphy: phy@88e8000 {
> compatible = "qcom,sm8150-qmp-usb3-dp-phy";
> - reg = <0 0x088e9000 0 0x18c>,
> - <0 0x088e8000 0 0x38>,
> - <0 0x088ea000 0 0x40>;
> - status = "disabled";
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> + reg = <0 0x088e8000 0 0x3000>;
> +
> clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
> - <&rpmhcc RPMH_CXO_CLK>,
> <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
> - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
> - clock-names = "aux", "ref_clk_src", "ref", "com_aux";
> + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
> + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> + clock-names = "aux",
> + "ref",
> + "com_aux",
> + "usb3_pipe";
> resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
> <&gcc GCC_USB3_PHY_PRIM_BCR>;
> reset-names = "phy", "common";
>
> - usb_1_ssphy: phy@88e9200 {
> - reg = <0 0x088e9200 0 0x200>,
> - <0 0x088e9400 0 0x200>,
> - <0 0x088e9c00 0 0x218>,
> - <0 0x088e9600 0 0x200>,
> - <0 0x088e9800 0 0x200>,
> - <0 0x088e9a00 0 0x100>;
> - #clock-cells = <0>;
> - #phy-cells = <0>;
> - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> - clock-names = "pipe0";
> - clock-output-names = "usb3_phy_pipe_clk_src";
> - };
> + #clock-cells = <1>;
> + #phy-cells = <1>;
>
> - usb_1_dpphy: phy@88ea200 {
> - reg = <0 0x088ea200 0 0x200>,
> - <0 0x088ea400 0 0x200>,
> - <0 0x088eaa00 0 0x200>,
> - <0 0x088ea600 0 0x200>,
> - <0 0x088ea800 0 0x200>;
> - #clock-cells = <1>;
> - #phy-cells = <0>;
> - };
> + status = "disabled";
> };
>
> usb_2_qmpphy: phy@88eb000 {
> @@ -3568,7 +3548,7 @@ usb_1_dwc3: usb@a600000 {
> iommus = <&apps_smmu 0x140 0>;
> snps,dis_u2_susphy_quirk;
> snps,dis_enblslpm_quirk;
> - phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
> + phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
> phy-names = "usb2-phy", "usb3-phy";
> };
> };
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 9/9] arm64: dts: qcom: sm8250: switch USB+DP QMP PHY to new style of bindings
2023-03-26 0:57 [PATCH v2 0/9] phy: qcom-qmp-combo: convert to newer style of bindings Dmitry Baryshkov
` (7 preceding siblings ...)
2023-03-26 0:57 ` [PATCH v2 8/9] arm64: dts: qcom: sm8150: " Dmitry Baryshkov
@ 2023-03-26 0:57 ` Dmitry Baryshkov
2023-03-27 8:14 ` Neil Armstrong
8 siblings, 1 reply; 21+ messages in thread
From: Dmitry Baryshkov @ 2023-03-26 0:57 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 49 ++++++++--------------------
1 file changed, 14 insertions(+), 35 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 7b78761f2041..24b51fb373b4 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -15,6 +15,7 @@
#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/interconnect/qcom,sm8250.h>
#include <dt-bindings/mailbox/qcom-ipcc.h>
+#include <dt-bindings/phy/phy-qcom-qmp.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,apr.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
@@ -3527,48 +3528,26 @@ usb_2_hsphy: phy@88e4000 {
resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
};
- usb_1_qmpphy: phy@88e9000 {
+ usb_1_qmpphy: phy@88e8000 {
compatible = "qcom,sm8250-qmp-usb3-dp-phy";
- reg = <0 0x088e9000 0 0x200>,
- <0 0x088e8000 0 0x40>,
- <0 0x088ea000 0 0x200>;
+ reg = <0 0x088e8000 0 0x3000>;
status = "disabled";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
<&rpmhcc RPMH_CXO_CLK>,
- <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
- clock-names = "aux", "ref_clk_src", "com_aux";
+ <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
+ <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
+ clock-names = "aux",
+ "ref",
+ "com_aux",
+ "usb3_pipe";
resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
<&gcc GCC_USB3_PHY_PRIM_BCR>;
reset-names = "phy", "common";
- usb_1_ssphy: usb3-phy@88e9200 {
- reg = <0 0x088e9200 0 0x200>,
- <0 0x088e9400 0 0x200>,
- <0 0x088e9c00 0 0x400>,
- <0 0x088e9600 0 0x200>,
- <0 0x088e9800 0 0x200>,
- <0 0x088e9a00 0 0x100>;
- #clock-cells = <0>;
- #phy-cells = <0>;
- clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3_phy_pipe_clk_src";
- };
-
- dp_phy: dp-phy@88ea200 {
- reg = <0 0x088ea200 0 0x200>,
- <0 0x088ea400 0 0x200>,
- <0 0x088eaa00 0 0x200>,
- <0 0x088ea600 0 0x200>,
- <0 0x088ea800 0 0x200>;
- #phy-cells = <0>;
- #clock-cells = <1>;
- };
+ #clock-cells = <1>;
+ #phy-cells = <1>;
};
usb_2_qmpphy: phy@88eb000 {
@@ -3713,7 +3692,7 @@ usb_1_dwc3: usb@a600000 {
iommus = <&apps_smmu 0x0 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
- phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
+ phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
};
};
@@ -4403,8 +4382,8 @@ dispcc: clock-controller@af00000 {
<&dsi0_phy 1>,
<&dsi1_phy 0>,
<&dsi1_phy 1>,
- <&dp_phy 0>,
- <&dp_phy 1>;
+ <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
clock-names = "bi_tcxo",
"dsi0_phy_pll_out_byteclk",
"dsi0_phy_pll_out_dsiclk",
--
2.30.2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v2 9/9] arm64: dts: qcom: sm8250: switch USB+DP QMP PHY to new style of bindings
2023-03-26 0:57 ` [PATCH v2 9/9] arm64: dts: qcom: sm8250: " Dmitry Baryshkov
@ 2023-03-27 8:14 ` Neil Armstrong
0 siblings, 0 replies; 21+ messages in thread
From: Neil Armstrong @ 2023-03-27 8:14 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
Krzysztof Kozlowski
Cc: linux-arm-msm, linux-phy, Johan Hovold, devicetree
On 26/03/2023 01:57, Dmitry Baryshkov wrote:
> Change the USB QMP PHY to use newer style of QMP PHY bindings (single
> resource region, no per-PHY subnodes).
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 49 ++++++++--------------------
> 1 file changed, 14 insertions(+), 35 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 7b78761f2041..24b51fb373b4 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -15,6 +15,7 @@
> #include <dt-bindings/interconnect/qcom,osm-l3.h>
> #include <dt-bindings/interconnect/qcom,sm8250.h>
> #include <dt-bindings/mailbox/qcom-ipcc.h>
> +#include <dt-bindings/phy/phy-qcom-qmp.h>
> #include <dt-bindings/power/qcom-rpmpd.h>
> #include <dt-bindings/soc/qcom,apr.h>
> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
> @@ -3527,48 +3528,26 @@ usb_2_hsphy: phy@88e4000 {
> resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
> };
>
> - usb_1_qmpphy: phy@88e9000 {
> + usb_1_qmpphy: phy@88e8000 {
> compatible = "qcom,sm8250-qmp-usb3-dp-phy";
> - reg = <0 0x088e9000 0 0x200>,
> - <0 0x088e8000 0 0x40>,
> - <0 0x088ea000 0 0x200>;
> + reg = <0 0x088e8000 0 0x3000>;
> status = "disabled";
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
>
> clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
> <&rpmhcc RPMH_CXO_CLK>,
> - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
> - clock-names = "aux", "ref_clk_src", "com_aux";
> + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
> + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> + clock-names = "aux",
> + "ref",
> + "com_aux",
> + "usb3_pipe";
>
> resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
> <&gcc GCC_USB3_PHY_PRIM_BCR>;
> reset-names = "phy", "common";
>
> - usb_1_ssphy: usb3-phy@88e9200 {
> - reg = <0 0x088e9200 0 0x200>,
> - <0 0x088e9400 0 0x200>,
> - <0 0x088e9c00 0 0x400>,
> - <0 0x088e9600 0 0x200>,
> - <0 0x088e9800 0 0x200>,
> - <0 0x088e9a00 0 0x100>;
> - #clock-cells = <0>;
> - #phy-cells = <0>;
> - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> - clock-names = "pipe0";
> - clock-output-names = "usb3_phy_pipe_clk_src";
> - };
> -
> - dp_phy: dp-phy@88ea200 {
> - reg = <0 0x088ea200 0 0x200>,
> - <0 0x088ea400 0 0x200>,
> - <0 0x088eaa00 0 0x200>,
> - <0 0x088ea600 0 0x200>,
> - <0 0x088ea800 0 0x200>;
> - #phy-cells = <0>;
> - #clock-cells = <1>;
> - };
> + #clock-cells = <1>;
> + #phy-cells = <1>;
> };
>
> usb_2_qmpphy: phy@88eb000 {
> @@ -3713,7 +3692,7 @@ usb_1_dwc3: usb@a600000 {
> iommus = <&apps_smmu 0x0 0x0>;
> snps,dis_u2_susphy_quirk;
> snps,dis_enblslpm_quirk;
> - phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
> + phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
> phy-names = "usb2-phy", "usb3-phy";
> };
> };
> @@ -4403,8 +4382,8 @@ dispcc: clock-controller@af00000 {
> <&dsi0_phy 1>,
> <&dsi1_phy 0>,
> <&dsi1_phy 1>,
> - <&dp_phy 0>,
> - <&dp_phy 1>;
> + <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
> + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
> clock-names = "bi_tcxo",
> "dsi0_phy_pll_out_byteclk",
> "dsi0_phy_pll_out_dsiclk",
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 21+ messages in thread