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From: Lukasz Luba <l.luba@partner.samsung.com>
To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
	linux-clk@vger.kernel.org
Cc: mturquette@baylibre.com, sboyd@kernel.org,
	b.zolnierkie@samsung.com, krzk@kernel.org, kgene@kernel.org,
	cw00.choi@samsung.com, kyungmin.park@samsung.com,
	m.szyprowski@samsung.com, s.nawrocki@samsung.com,
	myungjoo.ham@samsung.com, keescook@chromium.org,
	tony@atomide.com, jroedel@suse.de, treding@nvidia.com,
	digetx@gmail.com, gregkh@linuxfoundation.org,
	willy.mh.wolff.ml@gmail.com,
	Lukasz Luba <l.luba@partner.samsung.com>
Subject: [PATCH v10 07/13] dt-bindings: memory-controllers: add Exynos5422 DMC device description
Date: Fri, 14 Jun 2019 11:53:03 +0200
Message-ID: <20190614095309.24100-8-l.luba@partner.samsung.com> (raw)
In-Reply-To: <CGME20190614095326eucas1p22e27d86d886d7a33acdd59c7f0f6d7d8@eucas1p2.samsung.com>

The patch adds description for DT binding for a new Exynos5422 Dynamic
Memory Controller device.

Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
---
 .../memory-controllers/exynos5422-dmc.txt     | 75 +++++++++++++++++++
 1 file changed, 75 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt

diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt
new file mode 100644
index 000000000000..3d9bfecf573b
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt
@@ -0,0 +1,75 @@
+* Exynos5422 frequency and voltage scaling for Dynamic Memory Controller device
+
+The Samsung Exynos5422 SoC has DMC (Dynamic Memory Controller) to which the DRAM
+memory chips are connected. The driver is to monitor the controller in runtime
+and switch frequency and voltage. To monitor the usage of the controller in
+runtime, the driver uses the PPMU (Platform Performance Monitoring Unit), which
+is able to measure the current load of the memory.
+When 'userspace' governor is used for the driver, an application is able to
+switch the DMC and memory frequency.
+
+Required properties for DMC device for Exynos5422:
+- compatible: Should be "samsung,exynos5422-dmc".
+- clocks : list of clock specifiers, must contain an entry for each
+  required entry in clock-names for CLK_FOUT_SPLL, CLK_MOUT_SCLK_SPLL,
+  CLK_FF_DOUT_SPLL2, CLK_FOUT_BPLL, CLK_MOUT_BPLL, CLK_SCLK_BPLL,
+  CLK_MOUT_MX_MSPLL_CCORE, CLK_MOUT_MX_MSPLL_CCORE_PHY, CLK_MOUT_MCLK_CDREX,
+- clock-names : should include "fout_spll", "mout_sclk_spll", "ff_dout_spll2",
+  "fout_bpll", "mout_bpll", "sclk_bpll", "mout_mx_mspll_ccore",
+  "mout_mx_mspll_ccore_phy", "mout_mclk_cdrex"  entries
+- devfreq-events : phandles for PPMU devices connected to this DMC.
+- vdd-supply : phandle for voltage regulator which is connected.
+- reg : registers of two CDREX controllers.
+- operating-points-v2 : phandle for OPPs described in v2 definition.
+- device-handle : phandle of the connected DRAM memory device. For more
+	information please refer to documentation file:
+	Documentation/devicetree/bindings/ddr/lpddr3.txt
+- devfreq-events : phandles of the PPMU events used by the controller.
+- samsung,syscon-clk : phandle of the clock register set used by the controller,
+	these registers are used for enabling a 'pause' feature and are not
+	exposed by clock framework but they must be used in a safe way.
+	The register offsets are in the driver code and specyfic for this SoC
+	type.
+
+Example:
+
+	ppmu_dmc0_0: ppmu@10d00000 {
+		compatible = "samsung,exynos-ppmu";
+		reg = <0x10d00000 0x2000>;
+		clocks = <&clock CLK_PCLK_PPMU_DREX0_0>;
+		clock-names = "ppmu";
+		events {
+			ppmu_event_dmc0_0: ppmu-event3-dmc0_0 {
+				event-name = "ppmu-event3-dmc0_0";
+			};
+		};
+	};
+
+	dmc: memory-controller@10c20000 {
+		compatible = "samsung,exynos5422-dmc";
+		reg = <0x10c20000 0x100>, <0x10c30000 0x100>,
+		clocks = <&clock CLK_FOUT_SPLL>,
+			 <&clock CLK_MOUT_SCLK_SPLL>,
+			 <&clock CLK_FF_DOUT_SPLL2>,
+			 <&clock CLK_FOUT_BPLL>,
+			 <&clock CLK_MOUT_BPLL>,
+			 <&clock CLK_SCLK_BPLL>,
+			 <&clock CLK_MOUT_MX_MSPLL_CCORE>,
+			 <&clock CLK_MOUT_MX_MSPLL_CCORE_PHY>,
+			 <&clock CLK_MOUT_MCLK_CDREX>,
+		clock-names = "fout_spll",
+			      "mout_sclk_spll",
+			      "ff_dout_spll2",
+			      "fout_bpll",
+			      "mout_bpll",
+			      "sclk_bpll",
+			      "mout_mx_mspll_ccore",
+			      "mout_mx_mspll_ccore_phy",
+			      "mout_mclk_cdrex",
+		operating-points-v2 = <&dmc_opp_table>;
+		devfreq-events = <&ppmu_event3_dmc0_0>,	<&ppmu_event3_dmc0_1>,
+				<&ppmu_event3_dmc1_0>, <&ppmu_event3_dmc1_1>;
+		device-handle = <&samsung_K3QF2F20DB>;
+		vdd-supply = <&buck1_reg>;
+		samsung,syscon-clk = <&clock>;
+	};
-- 
2.17.1


  parent reply index

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20190614095319eucas1p2d47b6bd9179c7e4190972d6b22092ad7@eucas1p2.samsung.com>
2019-06-14  9:52 ` [PATCH v10 00/13] Exynos5 Dynamic Memory Controller driver Lukasz Luba
     [not found]   ` <CGME20190614095320eucas1p2919a6169c997bb81c80416e8a0ede538@eucas1p2.samsung.com>
2019-06-14  9:52     ` [PATCH v10 01/13] clk: samsung: add needed IDs for DMC clocks in Exynos5420 Lukasz Luba
2019-06-14 12:04       ` Krzysztof Kozlowski
2019-06-14 12:38         ` Sylwester Nawrocki
2019-06-14 12:39           ` Krzysztof Kozlowski
     [not found]   ` <CGME20190614095321eucas1p2af62f3cdf78ba3c5a8013159da4f7502@eucas1p2.samsung.com>
2019-06-14  9:52     ` [PATCH v10 02/13] clk: samsung: add new clocks for DMC for Exynos5422 SoC Lukasz Luba
     [not found]   ` <CGME20190614095323eucas1p1312dd7bcc5a25cbb3af28ed0f52dc7a6@eucas1p1.samsung.com>
2019-06-14  9:52     ` [PATCH v10 03/13] clk: samsung: add BPLL rate table for Exynos 5422 SoC Lukasz Luba
     [not found]   ` <CGME20190614095324eucas1p2eab4def0ed8c912303e4bb3e422bb255@eucas1p2.samsung.com>
2019-06-14  9:53     ` [PATCH v10 04/13] dt-bindings: ddr: rename lpddr2 directory Lukasz Luba
     [not found]   ` <CGME20190614095324eucas1p247ee87a9ca69733e7aebd601f5d96a94@eucas1p2.samsung.com>
2019-06-14  9:53     ` [PATCH v10 05/13] dt-bindings: ddr: add LPDDR3 memories Lukasz Luba
     [not found]   ` <CGME20190614095325eucas1p20083d9290b36eca945ec3f1428bdbd4f@eucas1p2.samsung.com>
2019-06-14  9:53     ` [PATCH v10 06/13] drivers: memory: extend of_memory by LPDDR3 support Lukasz Luba
2019-06-14 12:43       ` Krzysztof Kozlowski
2019-08-22 13:34         ` Lukasz Luba
2019-09-04 11:52           ` Greg KH
     [not found]   ` <CGME20190614095326eucas1p22e27d86d886d7a33acdd59c7f0f6d7d8@eucas1p2.samsung.com>
2019-06-14  9:53     ` Lukasz Luba [this message]
     [not found]   ` <CGME20190614095327eucas1p19b6e522efa15c8fd21c51f3900e376e9@eucas1p1.samsung.com>
2019-06-14  9:53     ` [PATCH v10 08/13] drivers: memory: add DMC driver for Exynos5422 Lukasz Luba
2019-06-14 12:09       ` Krzysztof Kozlowski
2019-06-14 12:58       ` Krzysztof Kozlowski
2019-06-14 13:40         ` Lukasz Luba
2019-06-14 13:46           ` Krzysztof Kozlowski
2019-06-14 13:47       ` Krzysztof Kozlowski
2019-06-25 11:26         ` Lukasz Luba
     [not found]   ` <CGME20190614095328eucas1p24009b3a07322fd12e49eabb7a08baf50@eucas1p2.samsung.com>
2019-06-14  9:53     ` [PATCH v10 09/13] drivers: devfreq: events: add Exynos PPMU new events Lukasz Luba
2019-06-22 13:10       ` Chanwoo Choi
2019-06-25  7:31         ` Lukasz Luba
2019-06-25  7:38           ` Chanwoo Choi
     [not found]   ` <CGME20190614095329eucas1p267244e53d4f5612c46d6cc2c6bc0ed75@eucas1p2.samsung.com>
2019-06-14  9:53     ` [PATCH v10 10/13] ARM: dts: exynos: add chipid label and syscon compatible Lukasz Luba
     [not found]   ` <CGME20190614095330eucas1p1e5a73f31251af7d16caf951054ec9def@eucas1p1.samsung.com>
2019-06-14  9:53     ` [PATCH v10 11/13] ARM: dts: exynos: add syscon to clock compatible Lukasz Luba
     [not found]   ` <CGME20190614095331eucas1p138707301cac47902f0d0d9a41bd4a8a4@eucas1p1.samsung.com>
2019-06-14  9:53     ` [PATCH v10 12/13] ARM: dts: exynos: add DMC device for exynos5422 Lukasz Luba
     [not found]   ` <CGME20190614095332eucas1p10e0a690604c6210d5f61c55175532785@eucas1p1.samsung.com>
2019-06-14  9:53     ` [PATCH v10 13/13] ARM: exynos_defconfig: enable DMC driver Lukasz Luba

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