[PATCH] x86/cpu: Add Elkhart Lake to Intel family

[PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Rajneesh Bhardwaj]

Elkhart Lake is Atom based SoC that uses model number 0x96. CPUID details
will be documented in a future version of Intel Software Development
Manual.

Cc: bp@suse.de
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Cc: Len Brown <lenb@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: x86-ml <x86@kernel.org>
Cc: Linux PM <linux-pm@vger.kernel.org>
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
---
 arch/x86/include/asm/intel-family.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 0278aa66ef62..06e94ae65f28 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -79,6 +79,7 @@
 #define INTEL_FAM6_ATOM_GOLDMONT_PLUS	0x7A /* Gemini Lake */
 
 #define INTEL_FAM6_ATOM_TREMONT_X	0x86 /* Jacobsville */
+#define INTEL_FAM6_ATOM_ELKHART_LAKE	0x96 /*Elkhart Lake */
 
 /* Xeon Phi */
 
-- 
2.17.1

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Peter Zijlstra]

On Thu, Aug 08, 2019 at 03:40:45PM +0530, Rajneesh Bhardwaj wrote:
> Elkhart Lake is Atom based SoC that uses model number 0x96. CPUID details
> will be documented in a future version of Intel Software Development
> Manual.
> 
> Cc: bp@suse.de
> Cc: Borislav Petkov <bp@alien8.de>
> Cc: Dave Hansen <dave.hansen@linux.intel.com>
> Cc: "H. Peter Anvin" <hpa@zytor.com>
> Cc: Kan Liang <kan.liang@linux.intel.com>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
> Cc: Len Brown <lenb@kernel.org>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: x86-ml <x86@kernel.org>
> Cc: Linux PM <linux-pm@vger.kernel.org>
> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
> ---
>  arch/x86/include/asm/intel-family.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
> index 0278aa66ef62..06e94ae65f28 100644
> --- a/arch/x86/include/asm/intel-family.h
> +++ b/arch/x86/include/asm/intel-family.h
> @@ -79,6 +79,7 @@
>  #define INTEL_FAM6_ATOM_GOLDMONT_PLUS	0x7A /* Gemini Lake */
>  
>  #define INTEL_FAM6_ATOM_TREMONT_X	0x86 /* Jacobsville */
> +#define INTEL_FAM6_ATOM_ELKHART_LAKE	0x96 /*Elkhart Lake */

Almost, please try again.

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Bhardwaj, Rajneesh]

Hello Peter,

Thanks for the review.

On 08-Aug-19 4:12 PM, Peter Zijlstra wrote:
> On Thu, Aug 08, 2019 at 03:40:45PM +0530, Rajneesh Bhardwaj wrote:
>> Elkhart Lake is Atom based SoC that uses model number 0x96. CPUID details
>> will be documented in a future version of Intel Software Development
>> Manual.
>>
>> Cc: bp@suse.de
>> Cc: Borislav Petkov <bp@alien8.de>
>> Cc: Dave Hansen <dave.hansen@linux.intel.com>
>> Cc: "H. Peter Anvin" <hpa@zytor.com>
>> Cc: Kan Liang <kan.liang@linux.intel.com>
>> Cc: Peter Zijlstra <peterz@infradead.org>
>> Cc: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
>> Cc: Len Brown <lenb@kernel.org>
>> Cc: Thomas Gleixner <tglx@linutronix.de>
>> Cc: x86-ml <x86@kernel.org>
>> Cc: Linux PM <linux-pm@vger.kernel.org>
>> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
>> ---
>>   arch/x86/include/asm/intel-family.h | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
>> index 0278aa66ef62..06e94ae65f28 100644
>> --- a/arch/x86/include/asm/intel-family.h
>> +++ b/arch/x86/include/asm/intel-family.h
>> @@ -79,6 +79,7 @@
>>   #define INTEL_FAM6_ATOM_GOLDMONT_PLUS	0x7A /* Gemini Lake */
>>   
>>   #define INTEL_FAM6_ATOM_TREMONT_X	0x86 /* Jacobsville */
>> +#define INTEL_FAM6_ATOM_ELKHART_LAKE	0x96 /*Elkhart Lake */
> Almost, please try again.

Did you mean "It should be after Gemini Lake"? And / Or a Space inside 
comment before 'E' ?

I kept it at the current location because of increasing chronological 
order within Atom section but i can move it to another place.

Please let me know if my understanding is correct? I can send a v2 
addressing your suggestion.

Thank you,

Rajneesh

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Peter Zijlstra]

On Thu, Aug 08, 2019 at 05:58:35PM +0530, Bhardwaj, Rajneesh wrote:
> Hello Peter,
> 
> Thanks for the review.
> 
> On 08-Aug-19 4:12 PM, Peter Zijlstra wrote:
> > On Thu, Aug 08, 2019 at 03:40:45PM +0530, Rajneesh Bhardwaj wrote:
> > > Elkhart Lake is Atom based SoC that uses model number 0x96. CPUID details
> > > will be documented in a future version of Intel Software Development
> > > Manual.
> > > 
> > > Cc: bp@suse.de
> > > Cc: Borislav Petkov <bp@alien8.de>
> > > Cc: Dave Hansen <dave.hansen@linux.intel.com>
> > > Cc: "H. Peter Anvin" <hpa@zytor.com>
> > > Cc: Kan Liang <kan.liang@linux.intel.com>
> > > Cc: Peter Zijlstra <peterz@infradead.org>
> > > Cc: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
> > > Cc: Len Brown <lenb@kernel.org>
> > > Cc: Thomas Gleixner <tglx@linutronix.de>
> > > Cc: x86-ml <x86@kernel.org>
> > > Cc: Linux PM <linux-pm@vger.kernel.org>
> > > Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
> > > ---
> > >   arch/x86/include/asm/intel-family.h | 1 +
> > >   1 file changed, 1 insertion(+)
> > > 
> > > diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
> > > index 0278aa66ef62..06e94ae65f28 100644
> > > --- a/arch/x86/include/asm/intel-family.h
> > > +++ b/arch/x86/include/asm/intel-family.h
> > > @@ -79,6 +79,7 @@
> > >   #define INTEL_FAM6_ATOM_GOLDMONT_PLUS	0x7A /* Gemini Lake */
> > >   #define INTEL_FAM6_ATOM_TREMONT_X	0x86 /* Jacobsville */
> > > +#define INTEL_FAM6_ATOM_ELKHART_LAKE	0x96 /*Elkhart Lake */
> > Almost, please try again.
> 
> Did you mean "It should be after Gemini Lake"? And / Or a Space inside
> comment before 'E' ?

The comment :-)

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Liang, Kan]

On 8/8/2019 6:10 AM, Rajneesh Bhardwaj wrote:
> Elkhart Lake is Atom based SoC that uses model number 0x96. CPUID details
> will be documented in a future version of Intel Software Development
> Manual.
> 
> Cc: bp@suse.de
> Cc: Borislav Petkov <bp@alien8.de>
> Cc: Dave Hansen <dave.hansen@linux.intel.com>
> Cc: "H. Peter Anvin" <hpa@zytor.com>
> Cc: Kan Liang <kan.liang@linux.intel.com>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
> Cc: Len Brown <lenb@kernel.org>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: x86-ml <x86@kernel.org>
> Cc: Linux PM <linux-pm@vger.kernel.org>
> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
> ---
>   arch/x86/include/asm/intel-family.h | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
> index 0278aa66ef62..06e94ae65f28 100644
> --- a/arch/x86/include/asm/intel-family.h
> +++ b/arch/x86/include/asm/intel-family.h
> @@ -79,6 +79,7 @@
>   #define INTEL_FAM6_ATOM_GOLDMONT_PLUS	0x7A /* Gemini Lake */
>   
>   #define INTEL_FAM6_ATOM_TREMONT_X	0x86 /* Jacobsville */
> +#define INTEL_FAM6_ATOM_ELKHART_LAKE	0x96 /*Elkhart Lake */

Usually, we should use the code name of microarchitecture for the name 
of CPUID.

Thanks,
Kan

>   
>   /* Xeon Phi */
>   
> 

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Dave Hansen]

> +++ b/arch/x86/include/asm/intel-family.h
> @@ -79,6 +79,7 @@
>   #define INTEL_FAM6_ATOM_GOLDMONT_PLUS    0x7A /* Gemini Lake */
>     #define INTEL_FAM6_ATOM_TREMONT_X    0x86 /* Jacobsville */
> +#define INTEL_FAM6_ATOM_ELKHART_LAKE    0x96 /*Elkhart Lake */

Should we be merging these before we have a user for them?

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Peter Zijlstra]

On Thu, Aug 08, 2019 at 09:19:23AM -0400, Liang, Kan wrote:
> 
> 
> On 8/8/2019 6:10 AM, Rajneesh Bhardwaj wrote:
> > Elkhart Lake is Atom based SoC that uses model number 0x96. CPUID details
> > will be documented in a future version of Intel Software Development
> > Manual.
> > 
> > Cc: bp@suse.de
> > Cc: Borislav Petkov <bp@alien8.de>
> > Cc: Dave Hansen <dave.hansen@linux.intel.com>
> > Cc: "H. Peter Anvin" <hpa@zytor.com>
> > Cc: Kan Liang <kan.liang@linux.intel.com>
> > Cc: Peter Zijlstra <peterz@infradead.org>
> > Cc: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
> > Cc: Len Brown <lenb@kernel.org>
> > Cc: Thomas Gleixner <tglx@linutronix.de>
> > Cc: x86-ml <x86@kernel.org>
> > Cc: Linux PM <linux-pm@vger.kernel.org>
> > Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
> > ---
> >   arch/x86/include/asm/intel-family.h | 1 +
> >   1 file changed, 1 insertion(+)
> > 
> > diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
> > index 0278aa66ef62..06e94ae65f28 100644
> > --- a/arch/x86/include/asm/intel-family.h
> > +++ b/arch/x86/include/asm/intel-family.h
> > @@ -79,6 +79,7 @@
> >   #define INTEL_FAM6_ATOM_GOLDMONT_PLUS	0x7A /* Gemini Lake */
> >   #define INTEL_FAM6_ATOM_TREMONT_X	0x86 /* Jacobsville */
> > +#define INTEL_FAM6_ATOM_ELKHART_LAKE	0x96 /*Elkhart Lake */
> 
> Usually, we should use the code name of microarchitecture for the name of
> CPUID.

Oh yes, very much. A quick google seems to suggest these are in fact
Tremont cores. So then the naming should be:

  INTEL_FAM6_ATOM_TREMONT_xxx

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Bhardwaj, Rajneesh]

On 08-Aug-19 7:44 PM, Peter Zijlstra wrote:
> On Thu, Aug 08, 2019 at 09:19:23AM -0400, Liang, Kan wrote:
>>
>> On 8/8/2019 6:10 AM, Rajneesh Bhardwaj wrote:
>>> Elkhart Lake is Atom based SoC that uses model number 0x96. CPUID details
>>> will be documented in a future version of Intel Software Development
>>> Manual.
>>>
>>> Cc: bp@suse.de
>>> Cc: Borislav Petkov <bp@alien8.de>
>>> Cc: Dave Hansen <dave.hansen@linux.intel.com>
>>> Cc: "H. Peter Anvin" <hpa@zytor.com>
>>> Cc: Kan Liang <kan.liang@linux.intel.com>
>>> Cc: Peter Zijlstra <peterz@infradead.org>
>>> Cc: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
>>> Cc: Len Brown <lenb@kernel.org>
>>> Cc: Thomas Gleixner <tglx@linutronix.de>
>>> Cc: x86-ml <x86@kernel.org>
>>> Cc: Linux PM <linux-pm@vger.kernel.org>
>>> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
>>> ---
>>>    arch/x86/include/asm/intel-family.h | 1 +
>>>    1 file changed, 1 insertion(+)
>>>
>>> diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
>>> index 0278aa66ef62..06e94ae65f28 100644
>>> --- a/arch/x86/include/asm/intel-family.h
>>> +++ b/arch/x86/include/asm/intel-family.h
>>> @@ -79,6 +79,7 @@
>>>    #define INTEL_FAM6_ATOM_GOLDMONT_PLUS	0x7A /* Gemini Lake */
>>>    #define INTEL_FAM6_ATOM_TREMONT_X	0x86 /* Jacobsville */
>>> +#define INTEL_FAM6_ATOM_ELKHART_LAKE	0x96 /*Elkhart Lake */
>> Usually, we should use the code name of microarchitecture for the name of
>> CPUID.
> Oh yes, very much. A quick google seems to suggest these are in fact
> Tremont cores. So then the naming should be:
>
>    INTEL_FAM6_ATOM_TREMONT_xxx

Sure, I feel INTEL_FAM6_ATOM_TREMONT_ELKHART_LAKE may be too long so is 
INTEL_FAM6_ATOM_TREMONT_PLUS a better name?


>
>

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Bhardwaj, Rajneesh]

Hi Dave,

On 08-Aug-19 7:26 PM, Dave Hansen wrote:
>> +++ b/arch/x86/include/asm/intel-family.h
>> @@ -79,6 +79,7 @@
>>    #define INTEL_FAM6_ATOM_GOLDMONT_PLUS    0x7A /* Gemini Lake */
>>      #define INTEL_FAM6_ATOM_TREMONT_X    0x86 /* Jacobsville */
>> +#define INTEL_FAM6_ATOM_ELKHART_LAKE    0x96 /*Elkhart Lake */
> Should we be merging these before we have a user for them?

We have few patches that need this. They will soon follow once this is 
accepted.

Thanks

Rajneesh


>

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Borislav Petkov]

On Thu, Aug 08, 2019 at 08:40:49PM +0530, Bhardwaj, Rajneesh wrote:
> Sure, I feel INTEL_FAM6_ATOM_TREMONT_ELKHART_LAKE may be too long so is
> INTEL_FAM6_ATOM_TREMONT_PLUS a better name?

Is that the name of the microarchitecture? Does it even have a special
name or is some sort of a Tremont core with "things" added?

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Peter Zijlstra]

On Thu, Aug 08, 2019 at 08:40:49PM +0530, Bhardwaj, Rajneesh wrote:
> On 08-Aug-19 7:44 PM, Peter Zijlstra wrote:
> > On Thu, Aug 08, 2019 at 09:19:23AM -0400, Liang, Kan wrote:

> > > Usually, we should use the code name of microarchitecture for the name of
> > > CPUID.

> > Oh yes, very much. A quick google seems to suggest these are in fact
> > Tremont cores. So then the naming should be:
> > 
> >    INTEL_FAM6_ATOM_TREMONT_xxx
> 
> Sure, I feel INTEL_FAM6_ATOM_TREMONT_ELKHART_LAKE may be too long so is
> INTEL_FAM6_ATOM_TREMONT_PLUS a better name?

Neither. WikiChip says it is the successor to Denverton, which is a
server chip. If this is true then:

#define INTEL_FAM6_ATOM_TREMONT_X	0x.. /* Elkhart Lake */

is what it should be.

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Borislav Petkov]

On Thu, Aug 08, 2019 at 08:44:11PM +0530, Bhardwaj, Rajneesh wrote:
> We have few patches that need this. They will soon follow once this is
> accepted.

You can always send it as the first patch together with the first user
patchset.

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Borislav Petkov]

On Thu, Aug 08, 2019 at 05:23:26PM +0200, Peter Zijlstra wrote:
> Neither. WikiChip says it is the successor to Denverton, which is a
> server chip. If this is true then:
> 
> #define INTEL_FAM6_ATOM_TREMONT_X	0x.. /* Elkhart Lake */
> 
> is what it should be.

There is already:

#define INTEL_FAM6_ATOM_TREMONT_X       0x86 /* Jacobsville */

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Peter Zijlstra]

On Thu, Aug 08, 2019 at 05:23:26PM +0200, Peter Zijlstra wrote:
> On Thu, Aug 08, 2019 at 08:40:49PM +0530, Bhardwaj, Rajneesh wrote:
> > On 08-Aug-19 7:44 PM, Peter Zijlstra wrote:
> > > On Thu, Aug 08, 2019 at 09:19:23AM -0400, Liang, Kan wrote:
> 
> > > > Usually, we should use the code name of microarchitecture for the name of
> > > > CPUID.
> 
> > > Oh yes, very much. A quick google seems to suggest these are in fact
> > > Tremont cores. So then the naming should be:
> > > 
> > >    INTEL_FAM6_ATOM_TREMONT_xxx
> > 
> > Sure, I feel INTEL_FAM6_ATOM_TREMONT_ELKHART_LAKE may be too long so is
> > INTEL_FAM6_ATOM_TREMONT_PLUS a better name?
> 
> Neither. WikiChip says it is the successor to Denverton, which is a
> server chip. If this is true then:
> 
> #define INTEL_FAM6_ATOM_TREMONT_X	0x.. /* Elkhart Lake */
> 
> is what it should be.

Of course we already have a TREMONT_X :-/ WikiChip is also confusing me
further by stating that Jacobsville is the platform that carries the
Elkhart Lake core, so they should be the bloody same chip.

But here we are, with two different model numbers.

Can someone please spell out in dummy language wth these chips are?

Are they both server chips?

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Bhardwaj, Rajneesh]

On 08-Aug-19 9:01 PM, Peter Zijlstra wrote:
> On Thu, Aug 08, 2019 at 05:23:26PM +0200, Peter Zijlstra wrote:
>> On Thu, Aug 08, 2019 at 08:40:49PM +0530, Bhardwaj, Rajneesh wrote:
>>> On 08-Aug-19 7:44 PM, Peter Zijlstra wrote:
>>>> On Thu, Aug 08, 2019 at 09:19:23AM -0400, Liang, Kan wrote:
>>>>> Usually, we should use the code name of microarchitecture for the name of
>>>>> CPUID.
>>>> Oh yes, very much. A quick google seems to suggest these are in fact
>>>> Tremont cores. So then the naming should be:
>>>>
>>>>     INTEL_FAM6_ATOM_TREMONT_xxx
>>> Sure, I feel INTEL_FAM6_ATOM_TREMONT_ELKHART_LAKE may be too long so is
>>> INTEL_FAM6_ATOM_TREMONT_PLUS a better name?
>> Neither. WikiChip says it is the successor to Denverton, which is a
>> server chip. If this is true then:
>>
>> #define INTEL_FAM6_ATOM_TREMONT_X	0x.. /* Elkhart Lake */
>>
>> is what it should be.
> Of course we already have a TREMONT_X :-/ WikiChip is also confusing me
> further by stating that Jacobsville is the platform that carries the
> Elkhart Lake core, so they should be the bloody same chip.
>
> But here we are, with two different model numbers.
>
> Can someone please spell out in dummy language wth these chips are?
>
> Are they both server chips?


Elkhart Lake is Intel Atom based CPU product targeting primarily PC 
Client, IOT and industrial segments.  Jacobsville is Atom (Tremont) 
based Microserver.

Internally, preferred acronym for Elkhart Lake is EHL so does 
INTEL_FAM6_ATOM_TREMONT_EHL look ok?

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Liang, Kan]

On 8/8/2019 11:50 AM, Bhardwaj, Rajneesh wrote:
> 
> On 08-Aug-19 9:01 PM, Peter Zijlstra wrote:
>> On Thu, Aug 08, 2019 at 05:23:26PM +0200, Peter Zijlstra wrote:
>>> On Thu, Aug 08, 2019 at 08:40:49PM +0530, Bhardwaj, Rajneesh wrote:
>>>> On 08-Aug-19 7:44 PM, Peter Zijlstra wrote:
>>>>> On Thu, Aug 08, 2019 at 09:19:23AM -0400, Liang, Kan wrote:
>>>>>> Usually, we should use the code name of microarchitecture for the 
>>>>>> name of
>>>>>> CPUID.
>>>>> Oh yes, very much. A quick google seems to suggest these are in fact
>>>>> Tremont cores. So then the naming should be:
>>>>>
>>>>>     INTEL_FAM6_ATOM_TREMONT_xxx
>>>> Sure, I feel INTEL_FAM6_ATOM_TREMONT_ELKHART_LAKE may be too long so is
>>>> INTEL_FAM6_ATOM_TREMONT_PLUS a better name?
>>> Neither. WikiChip says it is the successor to Denverton, which is a
>>> server chip. If this is true then:
>>>
>>> #define INTEL_FAM6_ATOM_TREMONT_X    0x.. /* Elkhart Lake */
>>>
>>> is what it should be.
>> Of course we already have a TREMONT_X :-/ WikiChip is also confusing me
>> further by stating that Jacobsville is the platform that carries the
>> Elkhart Lake core, so they should be the bloody same chip.
>>
>> But here we are, with two different model numbers.
>>
>> Can someone please spell out in dummy language wth these chips are?
>>
>> Are they both server chips?
> 
> 
> Elkhart Lake is Intel Atom based CPU product targeting primarily PC 
> Client, IOT and industrial segments.  Jacobsville is Atom (Tremont) 
> based Microserver.
> 
> Internally, preferred acronym for Elkhart Lake is EHL so does 
> INTEL_FAM6_ATOM_TREMONT_EHL look ok?

I think only the name of microarchitecture should be good enough, 
INTEL_FAM6_ATOM_TREMONT.
We usually don't add the platform's acronym to the name of CPUID.

Thanks,
Kan

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Dave Hansen]

On 8/8/19 9:27 AM, Liang, Kan wrote:
> I think only the name of microarchitecture should be good enough, 
> INTEL_FAM6_ATOM_TREMONT. We usually don't add the platform's acronym
> to the name of CPUID.

Could someone also add some "how to add an entry to this file" in the
top of that file?  We seem to have the same, tortuous conversations
about one-line patches each time.

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Borislav Petkov]

On Thu, Aug 08, 2019 at 09:30:49AM -0700, Dave Hansen wrote:
> Could someone also add some "how to add an entry to this file" in the
> top of that file?  We seem to have the same, tortuous conversations
> about one-line patches each time.

There is some doc at the top:

/*
 * "Big Core" Processors (Branded as Core, Xeon, etc...)
 *
 * The "_X" parts are generally the EP and EX Xeons, or the
 * "Extreme" ones, like Broadwell-E, or Atom microserver.

but that nomenclature doesn't seem to pan out here.

We could call it

	...ATOM_TREMONT_C

or so to mean client, similar to the _X thing.

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Dave Hansen]

On 8/8/19 9:38 AM, Borislav Petkov wrote:
> On Thu, Aug 08, 2019 at 09:30:49AM -0700, Dave Hansen wrote:
>> Could someone also add some "how to add an entry to this file" in the
>> top of that file?  We seem to have the same, tortuous conversations
>> about one-line patches each time.
> There is some doc at the top:

HOWTO Build an INTEL_FAM6_ definition:

1. Start with INTEL_FAM6_
2. If not Core-family, add a note about it, like "ATOM".  There are only
   two options for this (Xeon Phi and Atom).  It is exceedingly unlikely
   that you are adding a cpu which needs a new option here.
3. Add the processor microarchitecture, not the platform name
4. Add a short differentiator if necessary.  Add an _X to differentiate
   Server from Client.
5. Add an optional comment with the platform name(s)

It should end up looking like this:

INTEL_FAM6_<ATOM?>_<MICROARCH>_<SHORT...> /* Platform Name */

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Borislav Petkov]

On Thu, Aug 08, 2019 at 09:54:53AM -0700, Dave Hansen wrote:
> On 8/8/19 9:38 AM, Borislav Petkov wrote:
> > On Thu, Aug 08, 2019 at 09:30:49AM -0700, Dave Hansen wrote:
> >> Could someone also add some "how to add an entry to this file" in the
> >> top of that file?  We seem to have the same, tortuous conversations
> >> about one-line patches each time.
> > There is some doc at the top:
> 
> HOWTO Build an INTEL_FAM6_ definition:
> 
> 1. Start with INTEL_FAM6_
> 2. If not Core-family, add a note about it, like "ATOM".  There are only
>    two options for this (Xeon Phi and Atom).  It is exceedingly unlikely
>    that you are adding a cpu which needs a new option here.
> 3. Add the processor microarchitecture, not the platform name
> 4. Add a short differentiator if necessary.  Add an _X to differentiate
>    Server from Client.
> 5. Add an optional comment with the platform name(s)
> 
> It should end up looking like this:
> 
> INTEL_FAM6_<ATOM?>_<MICROARCH>_<SHORT...> /* Platform Name */

LGTM. I'd take it in a patch form. :)

Btw, according to this scheme, this new model should be

INTEL_FAM6_ATOM_TREMONT

yes?

Even though the model number is higher than the Jacobsville, i.e., the
server one?

Or

INTEL_FAM6_ATOM_TREMONT_EHL

?

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Peter Zijlstra]

On Thu, Aug 08, 2019 at 09:20:03PM +0530, Bhardwaj, Rajneesh wrote:
> 
> On 08-Aug-19 9:01 PM, Peter Zijlstra wrote:
> > On Thu, Aug 08, 2019 at 05:23:26PM +0200, Peter Zijlstra wrote:
> > > On Thu, Aug 08, 2019 at 08:40:49PM +0530, Bhardwaj, Rajneesh wrote:
> > > > On 08-Aug-19 7:44 PM, Peter Zijlstra wrote:
> > > > > On Thu, Aug 08, 2019 at 09:19:23AM -0400, Liang, Kan wrote:
> > > > > > Usually, we should use the code name of microarchitecture for the name of
> > > > > > CPUID.
> > > > > Oh yes, very much. A quick google seems to suggest these are in fact
> > > > > Tremont cores. So then the naming should be:
> > > > > 
> > > > >     INTEL_FAM6_ATOM_TREMONT_xxx
> > > > Sure, I feel INTEL_FAM6_ATOM_TREMONT_ELKHART_LAKE may be too long so is
> > > > INTEL_FAM6_ATOM_TREMONT_PLUS a better name?
> > > Neither. WikiChip says it is the successor to Denverton, which is a
> > > server chip. If this is true then:
> > > 
> > > #define INTEL_FAM6_ATOM_TREMONT_X	0x.. /* Elkhart Lake */
> > > 
> > > is what it should be.
> > Of course we already have a TREMONT_X :-/ WikiChip is also confusing me
> > further by stating that Jacobsville is the platform that carries the
> > Elkhart Lake core, so they should be the bloody same chip.
> > 
> > But here we are, with two different model numbers.
> > 
> > Can someone please spell out in dummy language wth these chips are?
> > 
> > Are they both server chips?
> 
> 
> Elkhart Lake is Intel Atom based CPU product targeting primarily PC Client,
> IOT and industrial segments.  Jacobsville is Atom (Tremont) based
> Microserver.

Can we classify 'PC Client, IoT and Industrial' as MID ? Or rather, can
we say this Elkhart Lake is the successor to Moorefield? If not, what is
it successor to?

> Internally, preferred acronym for Elkhart Lake is EHL so does
> INTEL_FAM6_ATOM_TREMONT_EHL look ok?

No; that would be wildly inconsistent with everything else.

Also, I would suggest correcting wikichip and creating a tremont
(microarchitecture) wikipedia page.  There is a distinct lack of public
information on this.

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Peter Zijlstra]

On Thu, Aug 08, 2019 at 12:27:34PM -0400, Liang, Kan wrote:
> I think only the name of microarchitecture should be good enough,
> INTEL_FAM6_ATOM_TREMONT.
> We usually don't add the platform's acronym to the name of CPUID.

That works.

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Peter Zijlstra]

On Thu, Aug 08, 2019 at 09:54:53AM -0700, Dave Hansen wrote:
> On 8/8/19 9:38 AM, Borislav Petkov wrote:
> > On Thu, Aug 08, 2019 at 09:30:49AM -0700, Dave Hansen wrote:
> >> Could someone also add some "how to add an entry to this file" in the
> >> top of that file?  We seem to have the same, tortuous conversations
> >> about one-line patches each time.
> > There is some doc at the top:
> 
> HOWTO Build an INTEL_FAM6_ definition:
> 
> 1. Start with INTEL_FAM6_
> 2. If not Core-family, add a note about it, like "ATOM".  There are only
>    two options for this (Xeon Phi and Atom).  It is exceedingly unlikely
>    that you are adding a cpu which needs a new option here.
> 3. Add the processor microarchitecture, not the platform name
> 4. Add a short differentiator if necessary.  Add an _X to differentiate
>    Server from Client.
> 5. Add an optional comment with the platform name(s)
> 
> It should end up looking like this:
> 
> INTEL_FAM6_<ATOM?>_<MICROARCH>_<SHORT...> /* Platform Name */

That is obviously evident from actually looking at the file; but clearly
reading skills are in short supply these days.

Also, not just _SHORT, we actually try and minimize the variation there
too.

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Dave Hansen]

On 8/8/19 10:30 AM, Borislav Petkov wrote:
> 4. Add a short differentiator if necessary.  Add an _X to differentiate
>    Server from Client.

We could also add:

"Try to be descriptive especially if the processor has a special role.
Avoid using Intel codenames or codename acronyms, especially platform
codenames and acronyms."

Here's a short decoder for some of the more common differentiators:

	DESKTOP: Clients
	MOBILE : Clients
  	X      : Servers, to differentiate names from Clients
	XEON_D : Microservers, branded as Xeon D
	ULT    : Special low-power client platforms
	MID    : Mobile Internet Device, >=phone, <=tablet

Rajneesh said he's patch'ify my email blabbering.

Re: [PATCH] x86/cpu: Add Elkhart Lake to Intel family

[Borislav Petkov]

On Thu, Aug 08, 2019 at 12:24:52PM -0700, Dave Hansen wrote:
> On 8/8/19 10:30 AM, Borislav Petkov wrote:
> > 4. Add a short differentiator if necessary.  Add an _X to differentiate
> >    Server from Client.
> 
> We could also add:
> 
> "Try to be descriptive especially if the processor has a special role.
> Avoid using Intel codenames or codename acronyms, especially platform
> codenames and acronyms."
> 
> Here's a short decoder for some of the more common differentiators:
> 
> 	DESKTOP: Clients
> 	MOBILE : Clients
>   	X      : Servers, to differentiate names from Clients
> 	XEON_D : Microservers, branded as Xeon D
> 	ULT    : Special low-power client platforms
> 	MID    : Mobile Internet Device, >=phone, <=tablet
> 
> Rajneesh said he's patch'ify my email blabbering.

Sure but make that a separate patch from the ELH model adding.

Thx.

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.