* [PATCH v2 0/4] Rockchip thermal YAML and RK3568 @ 2021-05-06 17:55 Ezequiel Garcia 2021-05-06 17:55 ` [PATCH v2 1/4] ARM: dts: rockchip: Fix thermal sensor cells Ezequiel Garcia ` (4 more replies) 0 siblings, 5 replies; 15+ messages in thread From: Ezequiel Garcia @ 2021-05-06 17:55 UTC (permalink / raw) To: linux-rockchip, devicetree, linux-pm Cc: Heiko Stuebner, Kever Yang, Daniel Lezcano, Rob Herring, Finley Xiao, Zhang Rui, Ezequiel Garcia, kernel v2: * Convert to YAML * Fix rk322x.dtsi * Add comments as suggested by Daniel Ezequiel Garcia (3): ARM: dts: rockchip: Fix thermal sensor cells dt-bindings: thermal: convert rockchip-thermal to json-schema dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible Finley Xiao (1): thermal/rockchip: Support RK3568 SoCs in the thermal driver .../bindings/thermal/rockchip-thermal.txt | 85 ------------ .../bindings/thermal/rockchip-thermal.yaml | 96 ++++++++++++++ arch/arm/boot/dts/rk322x.dtsi | 2 +- drivers/thermal/rockchip_thermal.c | 121 ++++++++++++++++++ 4 files changed, 218 insertions(+), 86 deletions(-) delete mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt create mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml -- 2.30.0 ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 1/4] ARM: dts: rockchip: Fix thermal sensor cells 2021-05-06 17:55 [PATCH v2 0/4] Rockchip thermal YAML and RK3568 Ezequiel Garcia @ 2021-05-06 17:55 ` Ezequiel Garcia 2021-05-06 17:55 ` [PATCH v2 2/4] dt-bindings: thermal: convert rockchip-thermal to json-schema Ezequiel Garcia ` (3 subsequent siblings) 4 siblings, 0 replies; 15+ messages in thread From: Ezequiel Garcia @ 2021-05-06 17:55 UTC (permalink / raw) To: linux-rockchip, devicetree, linux-pm Cc: Heiko Stuebner, Kever Yang, Daniel Lezcano, Rob Herring, Finley Xiao, Zhang Rui, Ezequiel Garcia, kernel The number of cells to be used with a thermal sensor specifier must be "1". Fix this. Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> --- arch/arm/boot/dts/rk322x.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 208f21245095..9f02ba7a0cc2 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -517,7 +517,7 @@ tsadc: tsadc@11150000 { pinctrl-0 = <&otp_pin>; pinctrl-1 = <&otp_out>; pinctrl-2 = <&otp_pin>; - #thermal-sensor-cells = <0>; + #thermal-sensor-cells = <1>; rockchip,hw-tshut-temp = <95000>; status = "disabled"; }; -- 2.30.0 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 2/4] dt-bindings: thermal: convert rockchip-thermal to json-schema 2021-05-06 17:55 [PATCH v2 0/4] Rockchip thermal YAML and RK3568 Ezequiel Garcia 2021-05-06 17:55 ` [PATCH v2 1/4] ARM: dts: rockchip: Fix thermal sensor cells Ezequiel Garcia @ 2021-05-06 17:55 ` Ezequiel Garcia 2021-05-07 21:44 ` Rob Herring ` (2 more replies) 2021-05-06 17:55 ` [PATCH v2 3/4] dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible Ezequiel Garcia ` (2 subsequent siblings) 4 siblings, 3 replies; 15+ messages in thread From: Ezequiel Garcia @ 2021-05-06 17:55 UTC (permalink / raw) To: linux-rockchip, devicetree, linux-pm Cc: Heiko Stuebner, Kever Yang, Daniel Lezcano, Rob Herring, Finley Xiao, Zhang Rui, Ezequiel Garcia, kernel Convert Rockchip Thermal sensor dt-bindings to YAML. Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> --- .../bindings/thermal/rockchip-thermal.txt | 85 ----------------- .../bindings/thermal/rockchip-thermal.yaml | 95 +++++++++++++++++++ 2 files changed, 95 insertions(+), 85 deletions(-) delete mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt create mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt deleted file mode 100644 index 7f94669e9ebe..000000000000 --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt +++ /dev/null @@ -1,85 +0,0 @@ -* Temperature Sensor ADC (TSADC) on rockchip SoCs - -Required properties: -- compatible : should be "rockchip,<name>-tsadc" - "rockchip,px30-tsadc": found on PX30 SoCs - "rockchip,rv1108-tsadc": found on RV1108 SoCs - "rockchip,rk3228-tsadc": found on RK3228 SoCs - "rockchip,rk3288-tsadc": found on RK3288 SoCs - "rockchip,rk3328-tsadc": found on RK3328 SoCs - "rockchip,rk3368-tsadc": found on RK3368 SoCs - "rockchip,rk3399-tsadc": found on RK3399 SoCs -- reg : physical base address of the controller and length of memory mapped - region. -- interrupts : The interrupt number to the cpu. The interrupt specifier format - depends on the interrupt controller. -- clocks : Must contain an entry for each entry in clock-names. -- clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for - the peripheral clock. -- resets : Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names : Must include the name "tsadc-apb". -- pinctrl-names : The pin control state names; -- pinctrl-0 : The "init" pinctrl state, it will be set before device probe. -- pinctrl-1 : The "default" pinctrl state, it will be set after reset the - TSADC controller. -- pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend. -- #thermal-sensor-cells : Should be 1. See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for a description. - -Optional properties: -- rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value. -- rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO. -- rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW - 1:HIGH. -- rockchip,grf : The phandle of the syscon node for the general register file. - -Exiample: -tsadc: tsadc@ff280000 { - compatible = "rockchip,rk3288-tsadc"; - reg = <0xff280000 0x100>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; - clock-names = "tsadc", "apb_pclk"; - resets = <&cru SRST_TSADC>; - reset-names = "tsadc-apb"; - pinctrl-names = "init", "default", "sleep"; - pinctrl-0 = <&otp_gpio>; - pinctrl-1 = <&otp_out>; - pinctrl-2 = <&otp_gpio>; - #thermal-sensor-cells = <1>; - rockchip,hw-tshut-temp = <95000>; - rockchip,hw-tshut-mode = <0>; - rockchip,hw-tshut-polarity = <0>; -}; - -Example: referring to thermal sensors: -thermal-zones { - cpu_thermal: cpu_thermal { - polling-delay-passive = <1000>; /* milliseconds */ - polling-delay = <5000>; /* milliseconds */ - - /* sensor ID */ - thermal-sensors = <&tsadc 1>; - - trips { - cpu_alert0: cpu_alert { - temperature = <70000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - cpu_crit: cpu_crit { - temperature = <90000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu_alert0>; - cooling-device = - <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml new file mode 100644 index 000000000000..8385e8ac03e8 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Temperature Sensor ADC (TSADC) on Rockchip SoCs + +maintainers: + - Heiko Stuebner <heiko@sntech.de> + +properties: + compatible: + enum: + - rockchip,px30-tsadc # PX30 SoCs + - rockchip,rv1108-tsadc # RV1108 SoCs + - rockchip,rk3228-tsadc # RK3228 SoCs + - rockchip,rk3288-tsadc # RK3288 SoCs + - rockchip,rk3328-tsadc # RK3328 SoCs + - rockchip,rk3368-tsadc # RK3368 SoCs + - rockchip,rk3399-tsadc # RK3399 SoCs + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: tsadc + - const: apb_pclk + + resets: + maxItems: 1 + + reset-names: + items: + - const: tsadc-apb + + "#thermal-sensor-cells": + const: 1 + + rockchip,grf: + description: The phandle of the syscon node for the general register file. + $ref: /schemas/types.yaml#/definitions/phandle + + rockchip,hw-tshut-temp: + description: The hardware-controlled shutdown temperature value. + $ref: /schemas/types.yaml#/definitions/uint32 + + rockchip,hw-tshut-mode: + description: The hardware-controlled shutdown mode 0:CRU 1:GPIO. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + + rockchip,hw-tshut-polarity: + description: The hardware-controlled active polarity 0:LOW 1:HIGH. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - reset-names + - "#thermal-sensor-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/rk3288-cru.h> + + tsadc: tsadc@ff280000 { + compatible = "rockchip,rk3288-tsadc"; + reg = <0xff280000 0x100>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + resets = <&cru SRST_TSADC>; + reset-names = "tsadc-apb"; + #thermal-sensor-cells = <1>; + rockchip,hw-tshut-temp = <95000>; + rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-polarity = <0>; + }; -- 2.30.0 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: thermal: convert rockchip-thermal to json-schema 2021-05-06 17:55 ` [PATCH v2 2/4] dt-bindings: thermal: convert rockchip-thermal to json-schema Ezequiel Garcia @ 2021-05-07 21:44 ` Rob Herring 2021-06-21 9:52 ` [thermal: thermal/next] " thermal-bot for Ezequiel Garcia 2021-07-04 18:02 ` thermal-bot for Ezequiel Garcia 2 siblings, 0 replies; 15+ messages in thread From: Rob Herring @ 2021-05-07 21:44 UTC (permalink / raw) To: Ezequiel Garcia Cc: Heiko Stuebner, Kever Yang, Finley Xiao, devicetree, linux-rockchip, linux-pm, Zhang Rui, kernel, Daniel Lezcano, Rob Herring On Thu, 06 May 2021 14:55:12 -0300, Ezequiel Garcia wrote: > Convert Rockchip Thermal sensor dt-bindings to YAML. > > Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> > --- > .../bindings/thermal/rockchip-thermal.txt | 85 ----------------- > .../bindings/thermal/rockchip-thermal.yaml | 95 +++++++++++++++++++ > 2 files changed, 95 insertions(+), 85 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt > create mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml > Reviewed-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 15+ messages in thread
* [thermal: thermal/next] dt-bindings: thermal: convert rockchip-thermal to json-schema 2021-05-06 17:55 ` [PATCH v2 2/4] dt-bindings: thermal: convert rockchip-thermal to json-schema Ezequiel Garcia 2021-05-07 21:44 ` Rob Herring @ 2021-06-21 9:52 ` thermal-bot for Ezequiel Garcia 2021-07-04 18:02 ` thermal-bot for Ezequiel Garcia 2 siblings, 0 replies; 15+ messages in thread From: thermal-bot for Ezequiel Garcia @ 2021-06-21 9:52 UTC (permalink / raw) To: linux-pm; +Cc: Ezequiel Garcia, Rob Herring, Daniel Lezcano, rui.zhang, amitk The following commit has been merged into the thermal/next branch of thermal: Commit-ID: 6b65dc242d00b408ebbf79d0b7a16ed3f25109ec Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git//6b65dc242d00b408ebbf79d0b7a16ed3f25109ec Author: Ezequiel Garcia <ezequiel@collabora.com> AuthorDate: Thu, 06 May 2021 14:55:12 -03:00 Committer: Daniel Lezcano <daniel.lezcano@linaro.org> CommitterDate: Mon, 21 Jun 2021 11:49:43 +02:00 dt-bindings: thermal: convert rockchip-thermal to json-schema Convert Rockchip Thermal sensor dt-bindings to YAML. Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210506175514.168365-3-ezequiel@collabora.com --- Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 85 +--------------------------------------------------------------- Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml | 95 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 95 insertions(+), 85 deletions(-) delete mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt create mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt deleted file mode 100644 index 7f94669..0000000 --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt +++ /dev/null @@ -1,85 +0,0 @@ -* Temperature Sensor ADC (TSADC) on rockchip SoCs - -Required properties: -- compatible : should be "rockchip,<name>-tsadc" - "rockchip,px30-tsadc": found on PX30 SoCs - "rockchip,rv1108-tsadc": found on RV1108 SoCs - "rockchip,rk3228-tsadc": found on RK3228 SoCs - "rockchip,rk3288-tsadc": found on RK3288 SoCs - "rockchip,rk3328-tsadc": found on RK3328 SoCs - "rockchip,rk3368-tsadc": found on RK3368 SoCs - "rockchip,rk3399-tsadc": found on RK3399 SoCs -- reg : physical base address of the controller and length of memory mapped - region. -- interrupts : The interrupt number to the cpu. The interrupt specifier format - depends on the interrupt controller. -- clocks : Must contain an entry for each entry in clock-names. -- clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for - the peripheral clock. -- resets : Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names : Must include the name "tsadc-apb". -- pinctrl-names : The pin control state names; -- pinctrl-0 : The "init" pinctrl state, it will be set before device probe. -- pinctrl-1 : The "default" pinctrl state, it will be set after reset the - TSADC controller. -- pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend. -- #thermal-sensor-cells : Should be 1. See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for a description. - -Optional properties: -- rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value. -- rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO. -- rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW - 1:HIGH. -- rockchip,grf : The phandle of the syscon node for the general register file. - -Exiample: -tsadc: tsadc@ff280000 { - compatible = "rockchip,rk3288-tsadc"; - reg = <0xff280000 0x100>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; - clock-names = "tsadc", "apb_pclk"; - resets = <&cru SRST_TSADC>; - reset-names = "tsadc-apb"; - pinctrl-names = "init", "default", "sleep"; - pinctrl-0 = <&otp_gpio>; - pinctrl-1 = <&otp_out>; - pinctrl-2 = <&otp_gpio>; - #thermal-sensor-cells = <1>; - rockchip,hw-tshut-temp = <95000>; - rockchip,hw-tshut-mode = <0>; - rockchip,hw-tshut-polarity = <0>; -}; - -Example: referring to thermal sensors: -thermal-zones { - cpu_thermal: cpu_thermal { - polling-delay-passive = <1000>; /* milliseconds */ - polling-delay = <5000>; /* milliseconds */ - - /* sensor ID */ - thermal-sensors = <&tsadc 1>; - - trips { - cpu_alert0: cpu_alert { - temperature = <70000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - cpu_crit: cpu_crit { - temperature = <90000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu_alert0>; - cooling-device = - <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml new file mode 100644 index 0000000..8385e8a --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Temperature Sensor ADC (TSADC) on Rockchip SoCs + +maintainers: + - Heiko Stuebner <heiko@sntech.de> + +properties: + compatible: + enum: + - rockchip,px30-tsadc # PX30 SoCs + - rockchip,rv1108-tsadc # RV1108 SoCs + - rockchip,rk3228-tsadc # RK3228 SoCs + - rockchip,rk3288-tsadc # RK3288 SoCs + - rockchip,rk3328-tsadc # RK3328 SoCs + - rockchip,rk3368-tsadc # RK3368 SoCs + - rockchip,rk3399-tsadc # RK3399 SoCs + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: tsadc + - const: apb_pclk + + resets: + maxItems: 1 + + reset-names: + items: + - const: tsadc-apb + + "#thermal-sensor-cells": + const: 1 + + rockchip,grf: + description: The phandle of the syscon node for the general register file. + $ref: /schemas/types.yaml#/definitions/phandle + + rockchip,hw-tshut-temp: + description: The hardware-controlled shutdown temperature value. + $ref: /schemas/types.yaml#/definitions/uint32 + + rockchip,hw-tshut-mode: + description: The hardware-controlled shutdown mode 0:CRU 1:GPIO. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + + rockchip,hw-tshut-polarity: + description: The hardware-controlled active polarity 0:LOW 1:HIGH. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - reset-names + - "#thermal-sensor-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/rk3288-cru.h> + + tsadc: tsadc@ff280000 { + compatible = "rockchip,rk3288-tsadc"; + reg = <0xff280000 0x100>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + resets = <&cru SRST_TSADC>; + reset-names = "tsadc-apb"; + #thermal-sensor-cells = <1>; + rockchip,hw-tshut-temp = <95000>; + rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-polarity = <0>; + }; ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [thermal: thermal/next] dt-bindings: thermal: convert rockchip-thermal to json-schema 2021-05-06 17:55 ` [PATCH v2 2/4] dt-bindings: thermal: convert rockchip-thermal to json-schema Ezequiel Garcia 2021-05-07 21:44 ` Rob Herring 2021-06-21 9:52 ` [thermal: thermal/next] " thermal-bot for Ezequiel Garcia @ 2021-07-04 18:02 ` thermal-bot for Ezequiel Garcia 2 siblings, 0 replies; 15+ messages in thread From: thermal-bot for Ezequiel Garcia @ 2021-07-04 18:02 UTC (permalink / raw) To: linux-pm; +Cc: Ezequiel Garcia, Rob Herring, Daniel Lezcano, rui.zhang, amitk The following commit has been merged into the thermal/next branch of thermal: Commit-ID: 7d70aa141ed2dcd36c93e070ba62d96613ccc06b Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git//7d70aa141ed2dcd36c93e070ba62d96613ccc06b Author: Ezequiel Garcia <ezequiel@collabora.com> AuthorDate: Thu, 06 May 2021 14:55:12 -03:00 Committer: Daniel Lezcano <daniel.lezcano@linaro.org> CommitterDate: Sun, 04 Jul 2021 18:28:04 +02:00 dt-bindings: thermal: convert rockchip-thermal to json-schema Convert Rockchip Thermal sensor dt-bindings to YAML. Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210506175514.168365-3-ezequiel@collabora.com --- Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 85 +--------------------------------------------------------------- Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml | 95 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 95 insertions(+), 85 deletions(-) delete mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt create mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt deleted file mode 100644 index 7f94669..0000000 --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt +++ /dev/null @@ -1,85 +0,0 @@ -* Temperature Sensor ADC (TSADC) on rockchip SoCs - -Required properties: -- compatible : should be "rockchip,<name>-tsadc" - "rockchip,px30-tsadc": found on PX30 SoCs - "rockchip,rv1108-tsadc": found on RV1108 SoCs - "rockchip,rk3228-tsadc": found on RK3228 SoCs - "rockchip,rk3288-tsadc": found on RK3288 SoCs - "rockchip,rk3328-tsadc": found on RK3328 SoCs - "rockchip,rk3368-tsadc": found on RK3368 SoCs - "rockchip,rk3399-tsadc": found on RK3399 SoCs -- reg : physical base address of the controller and length of memory mapped - region. -- interrupts : The interrupt number to the cpu. The interrupt specifier format - depends on the interrupt controller. -- clocks : Must contain an entry for each entry in clock-names. -- clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for - the peripheral clock. -- resets : Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names : Must include the name "tsadc-apb". -- pinctrl-names : The pin control state names; -- pinctrl-0 : The "init" pinctrl state, it will be set before device probe. -- pinctrl-1 : The "default" pinctrl state, it will be set after reset the - TSADC controller. -- pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend. -- #thermal-sensor-cells : Should be 1. See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for a description. - -Optional properties: -- rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value. -- rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO. -- rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW - 1:HIGH. -- rockchip,grf : The phandle of the syscon node for the general register file. - -Exiample: -tsadc: tsadc@ff280000 { - compatible = "rockchip,rk3288-tsadc"; - reg = <0xff280000 0x100>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; - clock-names = "tsadc", "apb_pclk"; - resets = <&cru SRST_TSADC>; - reset-names = "tsadc-apb"; - pinctrl-names = "init", "default", "sleep"; - pinctrl-0 = <&otp_gpio>; - pinctrl-1 = <&otp_out>; - pinctrl-2 = <&otp_gpio>; - #thermal-sensor-cells = <1>; - rockchip,hw-tshut-temp = <95000>; - rockchip,hw-tshut-mode = <0>; - rockchip,hw-tshut-polarity = <0>; -}; - -Example: referring to thermal sensors: -thermal-zones { - cpu_thermal: cpu_thermal { - polling-delay-passive = <1000>; /* milliseconds */ - polling-delay = <5000>; /* milliseconds */ - - /* sensor ID */ - thermal-sensors = <&tsadc 1>; - - trips { - cpu_alert0: cpu_alert { - temperature = <70000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - cpu_crit: cpu_crit { - temperature = <90000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu_alert0>; - cooling-device = - <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml new file mode 100644 index 0000000..8385e8a --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Temperature Sensor ADC (TSADC) on Rockchip SoCs + +maintainers: + - Heiko Stuebner <heiko@sntech.de> + +properties: + compatible: + enum: + - rockchip,px30-tsadc # PX30 SoCs + - rockchip,rv1108-tsadc # RV1108 SoCs + - rockchip,rk3228-tsadc # RK3228 SoCs + - rockchip,rk3288-tsadc # RK3288 SoCs + - rockchip,rk3328-tsadc # RK3328 SoCs + - rockchip,rk3368-tsadc # RK3368 SoCs + - rockchip,rk3399-tsadc # RK3399 SoCs + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: tsadc + - const: apb_pclk + + resets: + maxItems: 1 + + reset-names: + items: + - const: tsadc-apb + + "#thermal-sensor-cells": + const: 1 + + rockchip,grf: + description: The phandle of the syscon node for the general register file. + $ref: /schemas/types.yaml#/definitions/phandle + + rockchip,hw-tshut-temp: + description: The hardware-controlled shutdown temperature value. + $ref: /schemas/types.yaml#/definitions/uint32 + + rockchip,hw-tshut-mode: + description: The hardware-controlled shutdown mode 0:CRU 1:GPIO. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + + rockchip,hw-tshut-polarity: + description: The hardware-controlled active polarity 0:LOW 1:HIGH. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - reset-names + - "#thermal-sensor-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/rk3288-cru.h> + + tsadc: tsadc@ff280000 { + compatible = "rockchip,rk3288-tsadc"; + reg = <0xff280000 0x100>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + resets = <&cru SRST_TSADC>; + reset-names = "tsadc-apb"; + #thermal-sensor-cells = <1>; + rockchip,hw-tshut-temp = <95000>; + rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-polarity = <0>; + }; ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 3/4] dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible 2021-05-06 17:55 [PATCH v2 0/4] Rockchip thermal YAML and RK3568 Ezequiel Garcia 2021-05-06 17:55 ` [PATCH v2 1/4] ARM: dts: rockchip: Fix thermal sensor cells Ezequiel Garcia 2021-05-06 17:55 ` [PATCH v2 2/4] dt-bindings: thermal: convert rockchip-thermal to json-schema Ezequiel Garcia @ 2021-05-06 17:55 ` Ezequiel Garcia 2021-05-06 21:44 ` Rob Herring ` (2 more replies) 2021-05-06 17:55 ` [PATCH v2 4/4] thermal/rockchip: Support RK3568 SoCs in the thermal driver Ezequiel Garcia 2021-05-09 23:55 ` (subset) [PATCH v2 0/4] Rockchip thermal YAML and RK3568 Heiko Stuebner 4 siblings, 3 replies; 15+ messages in thread From: Ezequiel Garcia @ 2021-05-06 17:55 UTC (permalink / raw) To: linux-rockchip, devicetree, linux-pm Cc: Heiko Stuebner, Kever Yang, Daniel Lezcano, Rob Herring, Finley Xiao, Zhang Rui, Ezequiel Garcia, kernel Add a new compatible for the thermal sensor device on RK3568 SoCs. Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> --- Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml index 8385e8ac03e8..b96ea277b558 100644 --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml @@ -19,6 +19,7 @@ properties: - rockchip,rk3328-tsadc # RK3328 SoCs - rockchip,rk3368-tsadc # RK3368 SoCs - rockchip,rk3399-tsadc # RK3399 SoCs + - rockchip,rk3568-tsadc # RK3568 SoCs reg: maxItems: 1 -- 2.30.0 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v2 3/4] dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible 2021-05-06 17:55 ` [PATCH v2 3/4] dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible Ezequiel Garcia @ 2021-05-06 21:44 ` Rob Herring 2021-06-19 14:40 ` Ezequiel Garcia 2021-06-21 9:52 ` [thermal: thermal/next] " thermal-bot for Ezequiel Garcia 2021-07-04 18:02 ` thermal-bot for Ezequiel Garcia 2 siblings, 1 reply; 15+ messages in thread From: Rob Herring @ 2021-05-06 21:44 UTC (permalink / raw) To: Ezequiel Garcia Cc: Rob Herring, devicetree, kernel, linux-pm, Daniel Lezcano, Zhang Rui, Kever Yang, Heiko Stuebner, Finley Xiao, linux-rockchip On Thu, 06 May 2021 14:55:13 -0300, Ezequiel Garcia wrote: > Add a new compatible for the thermal sensor device on RK3568 SoCs. > > Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> > --- > Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 3/4] dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible 2021-05-06 21:44 ` Rob Herring @ 2021-06-19 14:40 ` Ezequiel Garcia 2021-06-19 14:42 ` Ezequiel Garcia 0 siblings, 1 reply; 15+ messages in thread From: Ezequiel Garcia @ 2021-06-19 14:40 UTC (permalink / raw) To: Daniel Lezcano Cc: Rob Herring, devicetree, kernel, linux-pm, Daniel Lezcano, Zhang Rui, Kever Yang, Heiko Stuebner, Finley Xiao, linux-rockchip Hi Daniel, On Thu, 2021-05-06 at 16:44 -0500, Rob Herring wrote: > On Thu, 06 May 2021 14:55:13 -0300, Ezequiel Garcia wrote: > > Add a new compatible for the thermal sensor device on RK3568 SoCs. > > > > Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> > > --- > > Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml | 1 + > > 1 file changed, 1 insertion(+) > > > > Acked-by: Rob Herring <robh@kernel.org> Gentle ping for 3/4 and 4/4 in this series. Thanks, Ezequiel ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 3/4] dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible 2021-06-19 14:40 ` Ezequiel Garcia @ 2021-06-19 14:42 ` Ezequiel Garcia 0 siblings, 0 replies; 15+ messages in thread From: Ezequiel Garcia @ 2021-06-19 14:42 UTC (permalink / raw) To: Daniel Lezcano Cc: Rob Herring, devicetree, kernel, linux-pm, Zhang Rui, Kever Yang, Heiko Stuebner, Finley Xiao, linux-rockchip On Sat, 2021-06-19 at 11:40 -0300, Ezequiel Garcia wrote: > Hi Daniel, > > On Thu, 2021-05-06 at 16:44 -0500, Rob Herring wrote: > > On Thu, 06 May 2021 14:55:13 -0300, Ezequiel Garcia wrote: > > > Add a new compatible for the thermal sensor device on RK3568 SoCs. > > > > > > Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> > > > --- > > > Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml | 1 + > > > 1 file changed, 1 insertion(+) > > > > > > > Acked-by: Rob Herring <robh@kernel.org> > > Gentle ping for 3/4 and 4/4 in this series. > Actually, it's patches 2/4, 3/4 and 4/4. Thanks! Ezequiel ^ permalink raw reply [flat|nested] 15+ messages in thread
* [thermal: thermal/next] dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible 2021-05-06 17:55 ` [PATCH v2 3/4] dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible Ezequiel Garcia 2021-05-06 21:44 ` Rob Herring @ 2021-06-21 9:52 ` thermal-bot for Ezequiel Garcia 2021-07-04 18:02 ` thermal-bot for Ezequiel Garcia 2 siblings, 0 replies; 15+ messages in thread From: thermal-bot for Ezequiel Garcia @ 2021-06-21 9:52 UTC (permalink / raw) To: linux-pm; +Cc: Ezequiel Garcia, Rob Herring, Daniel Lezcano, rui.zhang, amitk The following commit has been merged into the thermal/next branch of thermal: Commit-ID: c5c9dfdcaea216bc1bd21402081540a8f9940e1a Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git//c5c9dfdcaea216bc1bd21402081540a8f9940e1a Author: Ezequiel Garcia <ezequiel@collabora.com> AuthorDate: Thu, 06 May 2021 14:55:13 -03:00 Committer: Daniel Lezcano <daniel.lezcano@linaro.org> CommitterDate: Mon, 21 Jun 2021 11:50:36 +02:00 dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible Add a new compatible for the thermal sensor device on RK3568 SoCs. Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210506175514.168365-4-ezequiel@collabora.com --- Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml index 8385e8a..b96ea27 100644 --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml @@ -19,6 +19,7 @@ properties: - rockchip,rk3328-tsadc # RK3328 SoCs - rockchip,rk3368-tsadc # RK3368 SoCs - rockchip,rk3399-tsadc # RK3399 SoCs + - rockchip,rk3568-tsadc # RK3568 SoCs reg: maxItems: 1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [thermal: thermal/next] dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible 2021-05-06 17:55 ` [PATCH v2 3/4] dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible Ezequiel Garcia 2021-05-06 21:44 ` Rob Herring 2021-06-21 9:52 ` [thermal: thermal/next] " thermal-bot for Ezequiel Garcia @ 2021-07-04 18:02 ` thermal-bot for Ezequiel Garcia 2 siblings, 0 replies; 15+ messages in thread From: thermal-bot for Ezequiel Garcia @ 2021-07-04 18:02 UTC (permalink / raw) To: linux-pm; +Cc: Ezequiel Garcia, Rob Herring, Daniel Lezcano, rui.zhang, amitk The following commit has been merged into the thermal/next branch of thermal: Commit-ID: 4b14c055a6f644cbeb1156ba24647e92fe51ec69 Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git//4b14c055a6f644cbeb1156ba24647e92fe51ec69 Author: Ezequiel Garcia <ezequiel@collabora.com> AuthorDate: Thu, 06 May 2021 14:55:13 -03:00 Committer: Daniel Lezcano <daniel.lezcano@linaro.org> CommitterDate: Sun, 04 Jul 2021 18:28:04 +02:00 dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible Add a new compatible for the thermal sensor device on RK3568 SoCs. Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210506175514.168365-4-ezequiel@collabora.com --- Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml index 8385e8a..b96ea27 100644 --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml @@ -19,6 +19,7 @@ properties: - rockchip,rk3328-tsadc # RK3328 SoCs - rockchip,rk3368-tsadc # RK3368 SoCs - rockchip,rk3399-tsadc # RK3399 SoCs + - rockchip,rk3568-tsadc # RK3568 SoCs reg: maxItems: 1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 4/4] thermal/rockchip: Support RK3568 SoCs in the thermal driver 2021-05-06 17:55 [PATCH v2 0/4] Rockchip thermal YAML and RK3568 Ezequiel Garcia ` (2 preceding siblings ...) 2021-05-06 17:55 ` [PATCH v2 3/4] dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible Ezequiel Garcia @ 2021-05-06 17:55 ` Ezequiel Garcia 2021-06-21 9:46 ` [thermal: thermal/next] thermal/drivers/rockchip: " thermal-bot for Finley Xiao 2021-05-09 23:55 ` (subset) [PATCH v2 0/4] Rockchip thermal YAML and RK3568 Heiko Stuebner 4 siblings, 1 reply; 15+ messages in thread From: Ezequiel Garcia @ 2021-05-06 17:55 UTC (permalink / raw) To: linux-rockchip, devicetree, linux-pm Cc: Heiko Stuebner, Kever Yang, Daniel Lezcano, Rob Herring, Finley Xiao, Zhang Rui, kernel, Ezequiel Garcia From: Finley Xiao <finley.xiao@rock-chips.com> The RK3568 SoCs have two Temperature Sensors, channel 0 is for CPU, channel 1 is for GPU. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> --- drivers/thermal/rockchip_thermal.c | 121 +++++++++++++++++++++++++++++ 1 file changed, 121 insertions(+) diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c index aa9e0e31ef98..657d84b9963e 100644 --- a/drivers/thermal/rockchip_thermal.c +++ b/drivers/thermal/rockchip_thermal.c @@ -211,7 +211,11 @@ struct rockchip_thermal_data { #define TSADCV3_AUTO_PERIOD_TIME 1875 /* 2.5ms */ #define TSADCV3_AUTO_PERIOD_HT_TIME 1875 /* 2.5ms */ +#define TSADCV5_AUTO_PERIOD_TIME 1622 /* 2.5ms */ +#define TSADCV5_AUTO_PERIOD_HT_TIME 1622 /* 2.5ms */ + #define TSADCV2_USER_INTER_PD_SOC 0x340 /* 13 clocks */ +#define TSADCV5_USER_INTER_PD_SOC 0xfc0 /* 97us, at least 90us */ #define GRF_SARADC_TESTBIT 0x0e644 #define GRF_TSADC_TESTBIT_L 0x0e648 @@ -219,6 +223,12 @@ struct rockchip_thermal_data { #define PX30_GRF_SOC_CON2 0x0408 +#define RK3568_GRF_TSADC_CON 0x0600 +#define RK3568_GRF_TSADC_ANA_REG0 (0x10001 << 0) +#define RK3568_GRF_TSADC_ANA_REG1 (0x10001 << 1) +#define RK3568_GRF_TSADC_ANA_REG2 (0x10001 << 2) +#define RK3568_GRF_TSADC_TSEN (0x10001 << 8) + #define GRF_SARADC_TESTBIT_ON (0x10001 << 2) #define GRF_TSADC_TESTBIT_H_ON (0x10001 << 2) #define GRF_TSADC_VCM_EN_L (0x10001 << 7) @@ -474,6 +484,45 @@ static const struct tsadc_table rk3399_code_table[] = { {TSADCV3_DATA_MASK, 125000}, }; +static const struct tsadc_table rk3568_code_table[] = { + {0, -40000}, + {1584, -40000}, + {1620, -35000}, + {1652, -30000}, + {1688, -25000}, + {1720, -20000}, + {1756, -15000}, + {1788, -10000}, + {1824, -5000}, + {1856, 0}, + {1892, 5000}, + {1924, 10000}, + {1956, 15000}, + {1992, 20000}, + {2024, 25000}, + {2060, 30000}, + {2092, 35000}, + {2128, 40000}, + {2160, 45000}, + {2196, 50000}, + {2228, 55000}, + {2264, 60000}, + {2300, 65000}, + {2332, 70000}, + {2368, 75000}, + {2400, 80000}, + {2436, 85000}, + {2468, 90000}, + {2500, 95000}, + {2536, 100000}, + {2572, 105000}, + {2604, 110000}, + {2636, 115000}, + {2672, 120000}, + {2704, 125000}, + {TSADCV2_DATA_MASK, 125000}, +}; + static u32 rk_tsadcv2_temp_to_code(const struct chip_tsadc_table *table, int temp) { @@ -701,6 +750,49 @@ static void rk_tsadcv4_initialize(struct regmap *grf, void __iomem *regs, regmap_write(grf, PX30_GRF_SOC_CON2, GRF_CON_TSADC_CH_INV); } +static void rk_tsadcv7_initialize(struct regmap *grf, void __iomem *regs, + enum tshut_polarity tshut_polarity) +{ + writel_relaxed(TSADCV5_USER_INTER_PD_SOC, regs + TSADCV2_USER_CON); + writel_relaxed(TSADCV5_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD); + writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT, + regs + TSADCV2_HIGHT_INT_DEBOUNCE); + writel_relaxed(TSADCV5_AUTO_PERIOD_HT_TIME, + regs + TSADCV2_AUTO_PERIOD_HT); + writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT, + regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE); + + if (tshut_polarity == TSHUT_HIGH_ACTIVE) + writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH, + regs + TSADCV2_AUTO_CON); + else + writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH, + regs + TSADCV2_AUTO_CON); + + /* + * The general register file will is optional + * and might not be available. + */ + if (!IS_ERR(grf)) { + regmap_write(grf, RK3568_GRF_TSADC_CON, RK3568_GRF_TSADC_TSEN); + /* + * RK3568 TRM, section 18.5. requires a delay no less + * than 10us between the rising edge of tsadc_tsen_en + * and the rising edge of tsadc_ana_reg_0/1/2. + */ + udelay(15); + regmap_write(grf, RK3568_GRF_TSADC_CON, RK3568_GRF_TSADC_ANA_REG0); + regmap_write(grf, RK3568_GRF_TSADC_CON, RK3568_GRF_TSADC_ANA_REG1); + regmap_write(grf, RK3568_GRF_TSADC_CON, RK3568_GRF_TSADC_ANA_REG2); + + /* + * RK3568 TRM, section 18.5. requires a delay no less + * than 90us after the rising edge of tsadc_ana_reg_0/1/2. + */ + usleep_range(100, 200); + } +} + static void rk_tsadcv2_irq_ack(void __iomem *regs) { u32 val; @@ -1027,6 +1119,31 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = { }, }; +static const struct rockchip_tsadc_chip rk3568_tsadc_data = { + .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */ + .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */ + .chn_num = 2, /* two channels for tsadc */ + + .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ + .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ + .tshut_temp = 95000, + + .initialize = rk_tsadcv7_initialize, + .irq_ack = rk_tsadcv3_irq_ack, + .control = rk_tsadcv3_control, + .get_temp = rk_tsadcv2_get_temp, + .set_alarm_temp = rk_tsadcv2_alarm_temp, + .set_tshut_temp = rk_tsadcv2_tshut_temp, + .set_tshut_mode = rk_tsadcv2_tshut_mode, + + .table = { + .id = rk3568_code_table, + .length = ARRAY_SIZE(rk3568_code_table), + .data_mask = TSADCV2_DATA_MASK, + .mode = ADC_INCREMENT, + }, +}; + static const struct of_device_id of_rockchip_thermal_match[] = { { .compatible = "rockchip,px30-tsadc", .data = (void *)&px30_tsadc_data, @@ -1059,6 +1176,10 @@ static const struct of_device_id of_rockchip_thermal_match[] = { .compatible = "rockchip,rk3399-tsadc", .data = (void *)&rk3399_tsadc_data, }, + { + .compatible = "rockchip,rk3568-tsadc", + .data = (void *)&rk3568_tsadc_data, + }, { /* end */ }, }; MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match); -- 2.30.0 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [thermal: thermal/next] thermal/drivers/rockchip: Support RK3568 SoCs in the thermal driver 2021-05-06 17:55 ` [PATCH v2 4/4] thermal/rockchip: Support RK3568 SoCs in the thermal driver Ezequiel Garcia @ 2021-06-21 9:46 ` thermal-bot for Finley Xiao 0 siblings, 0 replies; 15+ messages in thread From: thermal-bot for Finley Xiao @ 2021-06-21 9:46 UTC (permalink / raw) To: linux-pm; +Cc: Finley Xiao, Ezequiel Garcia, Daniel Lezcano, rui.zhang, amitk The following commit has been merged into the thermal/next branch of thermal: Commit-ID: 16bee043fc0a6eb6e9d5306f8e9366a3dcee1fea Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git//16bee043fc0a6eb6e9d5306f8e9366a3dcee1fea Author: Finley Xiao <finley.xiao@rock-chips.com> AuthorDate: Thu, 06 May 2021 14:55:14 -03:00 Committer: Daniel Lezcano <daniel.lezcano@linaro.org> CommitterDate: Fri, 11 Jun 2021 11:30:30 +02:00 thermal/drivers/rockchip: Support RK3568 SoCs in the thermal driver The RK3568 SoCs have two Temperature Sensors, channel 0 is for CPU, channel 1 is for GPU. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210506175514.168365-5-ezequiel@collabora.com --- drivers/thermal/rockchip_thermal.c | 121 ++++++++++++++++++++++++++++- 1 file changed, 121 insertions(+) diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c index aa9e0e3..657d84b 100644 --- a/drivers/thermal/rockchip_thermal.c +++ b/drivers/thermal/rockchip_thermal.c @@ -211,7 +211,11 @@ struct rockchip_thermal_data { #define TSADCV3_AUTO_PERIOD_TIME 1875 /* 2.5ms */ #define TSADCV3_AUTO_PERIOD_HT_TIME 1875 /* 2.5ms */ +#define TSADCV5_AUTO_PERIOD_TIME 1622 /* 2.5ms */ +#define TSADCV5_AUTO_PERIOD_HT_TIME 1622 /* 2.5ms */ + #define TSADCV2_USER_INTER_PD_SOC 0x340 /* 13 clocks */ +#define TSADCV5_USER_INTER_PD_SOC 0xfc0 /* 97us, at least 90us */ #define GRF_SARADC_TESTBIT 0x0e644 #define GRF_TSADC_TESTBIT_L 0x0e648 @@ -219,6 +223,12 @@ struct rockchip_thermal_data { #define PX30_GRF_SOC_CON2 0x0408 +#define RK3568_GRF_TSADC_CON 0x0600 +#define RK3568_GRF_TSADC_ANA_REG0 (0x10001 << 0) +#define RK3568_GRF_TSADC_ANA_REG1 (0x10001 << 1) +#define RK3568_GRF_TSADC_ANA_REG2 (0x10001 << 2) +#define RK3568_GRF_TSADC_TSEN (0x10001 << 8) + #define GRF_SARADC_TESTBIT_ON (0x10001 << 2) #define GRF_TSADC_TESTBIT_H_ON (0x10001 << 2) #define GRF_TSADC_VCM_EN_L (0x10001 << 7) @@ -474,6 +484,45 @@ static const struct tsadc_table rk3399_code_table[] = { {TSADCV3_DATA_MASK, 125000}, }; +static const struct tsadc_table rk3568_code_table[] = { + {0, -40000}, + {1584, -40000}, + {1620, -35000}, + {1652, -30000}, + {1688, -25000}, + {1720, -20000}, + {1756, -15000}, + {1788, -10000}, + {1824, -5000}, + {1856, 0}, + {1892, 5000}, + {1924, 10000}, + {1956, 15000}, + {1992, 20000}, + {2024, 25000}, + {2060, 30000}, + {2092, 35000}, + {2128, 40000}, + {2160, 45000}, + {2196, 50000}, + {2228, 55000}, + {2264, 60000}, + {2300, 65000}, + {2332, 70000}, + {2368, 75000}, + {2400, 80000}, + {2436, 85000}, + {2468, 90000}, + {2500, 95000}, + {2536, 100000}, + {2572, 105000}, + {2604, 110000}, + {2636, 115000}, + {2672, 120000}, + {2704, 125000}, + {TSADCV2_DATA_MASK, 125000}, +}; + static u32 rk_tsadcv2_temp_to_code(const struct chip_tsadc_table *table, int temp) { @@ -701,6 +750,49 @@ static void rk_tsadcv4_initialize(struct regmap *grf, void __iomem *regs, regmap_write(grf, PX30_GRF_SOC_CON2, GRF_CON_TSADC_CH_INV); } +static void rk_tsadcv7_initialize(struct regmap *grf, void __iomem *regs, + enum tshut_polarity tshut_polarity) +{ + writel_relaxed(TSADCV5_USER_INTER_PD_SOC, regs + TSADCV2_USER_CON); + writel_relaxed(TSADCV5_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD); + writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT, + regs + TSADCV2_HIGHT_INT_DEBOUNCE); + writel_relaxed(TSADCV5_AUTO_PERIOD_HT_TIME, + regs + TSADCV2_AUTO_PERIOD_HT); + writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT, + regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE); + + if (tshut_polarity == TSHUT_HIGH_ACTIVE) + writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH, + regs + TSADCV2_AUTO_CON); + else + writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH, + regs + TSADCV2_AUTO_CON); + + /* + * The general register file will is optional + * and might not be available. + */ + if (!IS_ERR(grf)) { + regmap_write(grf, RK3568_GRF_TSADC_CON, RK3568_GRF_TSADC_TSEN); + /* + * RK3568 TRM, section 18.5. requires a delay no less + * than 10us between the rising edge of tsadc_tsen_en + * and the rising edge of tsadc_ana_reg_0/1/2. + */ + udelay(15); + regmap_write(grf, RK3568_GRF_TSADC_CON, RK3568_GRF_TSADC_ANA_REG0); + regmap_write(grf, RK3568_GRF_TSADC_CON, RK3568_GRF_TSADC_ANA_REG1); + regmap_write(grf, RK3568_GRF_TSADC_CON, RK3568_GRF_TSADC_ANA_REG2); + + /* + * RK3568 TRM, section 18.5. requires a delay no less + * than 90us after the rising edge of tsadc_ana_reg_0/1/2. + */ + usleep_range(100, 200); + } +} + static void rk_tsadcv2_irq_ack(void __iomem *regs) { u32 val; @@ -1027,6 +1119,31 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = { }, }; +static const struct rockchip_tsadc_chip rk3568_tsadc_data = { + .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */ + .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */ + .chn_num = 2, /* two channels for tsadc */ + + .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ + .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ + .tshut_temp = 95000, + + .initialize = rk_tsadcv7_initialize, + .irq_ack = rk_tsadcv3_irq_ack, + .control = rk_tsadcv3_control, + .get_temp = rk_tsadcv2_get_temp, + .set_alarm_temp = rk_tsadcv2_alarm_temp, + .set_tshut_temp = rk_tsadcv2_tshut_temp, + .set_tshut_mode = rk_tsadcv2_tshut_mode, + + .table = { + .id = rk3568_code_table, + .length = ARRAY_SIZE(rk3568_code_table), + .data_mask = TSADCV2_DATA_MASK, + .mode = ADC_INCREMENT, + }, +}; + static const struct of_device_id of_rockchip_thermal_match[] = { { .compatible = "rockchip,px30-tsadc", .data = (void *)&px30_tsadc_data, @@ -1059,6 +1176,10 @@ static const struct of_device_id of_rockchip_thermal_match[] = { .compatible = "rockchip,rk3399-tsadc", .data = (void *)&rk3399_tsadc_data, }, + { + .compatible = "rockchip,rk3568-tsadc", + .data = (void *)&rk3568_tsadc_data, + }, { /* end */ }, }; MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match); ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: (subset) [PATCH v2 0/4] Rockchip thermal YAML and RK3568 2021-05-06 17:55 [PATCH v2 0/4] Rockchip thermal YAML and RK3568 Ezequiel Garcia ` (3 preceding siblings ...) 2021-05-06 17:55 ` [PATCH v2 4/4] thermal/rockchip: Support RK3568 SoCs in the thermal driver Ezequiel Garcia @ 2021-05-09 23:55 ` Heiko Stuebner 4 siblings, 0 replies; 15+ messages in thread From: Heiko Stuebner @ 2021-05-09 23:55 UTC (permalink / raw) To: devicetree, linux-pm, linux-rockchip, Ezequiel Garcia Cc: Heiko Stuebner, kernel, Rob Herring, Kever Yang, Finley Xiao, Daniel Lezcano, Zhang Rui On Thu, 6 May 2021 14:55:10 -0300, Ezequiel Garcia wrote: > v2: > * Convert to YAML > * Fix rk322x.dtsi > * Add comments as suggested by Daniel > > Ezequiel Garcia (3): > ARM: dts: rockchip: Fix thermal sensor cells > dt-bindings: thermal: convert rockchip-thermal to json-schema > dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible > > [...] Applied, thanks! [1/4] ARM: dts: rockchip: Fix thermal sensor cells commit: d5c24e20daf09587cbc221d40be1ba92673e8d94 Best regards, -- Heiko Stuebner <heiko@sntech.de> ^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2021-07-04 18:02 UTC | newest] Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-05-06 17:55 [PATCH v2 0/4] Rockchip thermal YAML and RK3568 Ezequiel Garcia 2021-05-06 17:55 ` [PATCH v2 1/4] ARM: dts: rockchip: Fix thermal sensor cells Ezequiel Garcia 2021-05-06 17:55 ` [PATCH v2 2/4] dt-bindings: thermal: convert rockchip-thermal to json-schema Ezequiel Garcia 2021-05-07 21:44 ` Rob Herring 2021-06-21 9:52 ` [thermal: thermal/next] " thermal-bot for Ezequiel Garcia 2021-07-04 18:02 ` thermal-bot for Ezequiel Garcia 2021-05-06 17:55 ` [PATCH v2 3/4] dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible Ezequiel Garcia 2021-05-06 21:44 ` Rob Herring 2021-06-19 14:40 ` Ezequiel Garcia 2021-06-19 14:42 ` Ezequiel Garcia 2021-06-21 9:52 ` [thermal: thermal/next] " thermal-bot for Ezequiel Garcia 2021-07-04 18:02 ` thermal-bot for Ezequiel Garcia 2021-05-06 17:55 ` [PATCH v2 4/4] thermal/rockchip: Support RK3568 SoCs in the thermal driver Ezequiel Garcia 2021-06-21 9:46 ` [thermal: thermal/next] thermal/drivers/rockchip: " thermal-bot for Finley Xiao 2021-05-09 23:55 ` (subset) [PATCH v2 0/4] Rockchip thermal YAML and RK3568 Heiko Stuebner
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