* [PATCH 1/4] dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers for mt8195
2023-03-07 15:45 [PATCH 0/4] Add LVTS's AP thermal domain support for mt8195 bchihi
@ 2023-03-07 15:45 ` bchihi
2023-03-08 9:14 ` AngeloGioacchino Del Regno
` (3 more replies)
2023-03-07 15:45 ` [PATCH 2/4] thermal/drivers/mediatek/lvts_thermal: Add AP domain " bchihi
` (4 subsequent siblings)
5 siblings, 4 replies; 22+ messages in thread
From: bchihi @ 2023-03-07 15:45 UTC (permalink / raw)
To: daniel.lezcano, angelogioacchino.delregno, rafael, amitk,
rui.zhang, matthias.bgg, robh+dt, krzysztof.kozlowski+dt,
rdunlap, ye.xingchen, p.zabel
Cc: linux-pm, linux-kernel, linux-arm-kernel, linux-mediatek,
devicetree, khilman, james.lo, rex-bc.chen
From: Balsam CHIHI <bchihi@baylibre.com>
Add AP Domain to LVTS thermal controllers dt-binding definition for mt8195.
Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
---
include/dt-bindings/thermal/mediatek,lvts-thermal.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/include/dt-bindings/thermal/mediatek,lvts-thermal.h b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
index c09398920468..8fa5a46675c4 100644
--- a/include/dt-bindings/thermal/mediatek,lvts-thermal.h
+++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
@@ -16,4 +16,14 @@
#define MT8195_MCU_LITTLE_CPU2 6
#define MT8195_MCU_LITTLE_CPU3 7
+#define MT8195_AP_VPU0 8
+#define MT8195_AP_VPU1 9
+#define MT8195_AP_GPU0 10
+#define MT8195_AP_GPU1 11
+#define MT8195_AP_VDEC 12
+#define MT8195_AP_IMG 13
+#define MT8195_AP_INFRA 14
+#define MT8195_AP_CAM0 15
+#define MT8195_AP_CAM1 16
+
#endif /* __MEDIATEK_LVTS_DT_H */
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH 1/4] dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers for mt8195
2023-03-07 15:45 ` [PATCH 1/4] dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers " bchihi
@ 2023-03-08 9:14 ` AngeloGioacchino Del Regno
2023-03-09 4:40 ` Chen-Yu Tsai
` (2 subsequent siblings)
3 siblings, 0 replies; 22+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-03-08 9:14 UTC (permalink / raw)
To: bchihi, daniel.lezcano, rafael, amitk, rui.zhang, matthias.bgg,
robh+dt, krzysztof.kozlowski+dt, rdunlap, ye.xingchen, p.zabel
Cc: linux-pm, linux-kernel, linux-arm-kernel, linux-mediatek,
devicetree, khilman, james.lo, rex-bc.chen
Il 07/03/23 16:45, bchihi@baylibre.com ha scritto:
> From: Balsam CHIHI <bchihi@baylibre.com>
>
> Add AP Domain to LVTS thermal controllers dt-binding definition for mt8195.
>
> Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 1/4] dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers for mt8195
2023-03-07 15:45 ` [PATCH 1/4] dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers " bchihi
2023-03-08 9:14 ` AngeloGioacchino Del Regno
@ 2023-03-09 4:40 ` Chen-Yu Tsai
2023-03-09 10:39 ` Daniel Lezcano
2023-03-16 22:36 ` Rob Herring
2023-04-01 20:51 ` Daniel Lezcano
3 siblings, 1 reply; 22+ messages in thread
From: Chen-Yu Tsai @ 2023-03-09 4:40 UTC (permalink / raw)
To: bchihi
Cc: daniel.lezcano, angelogioacchino.delregno, rafael, amitk,
rui.zhang, matthias.bgg, robh+dt, krzysztof.kozlowski+dt,
rdunlap, ye.xingchen, p.zabel, linux-pm, linux-kernel,
linux-arm-kernel, linux-mediatek, devicetree, khilman, james.lo,
rex-bc.chen
On Wed, Mar 8, 2023 at 12:46 AM <bchihi@baylibre.com> wrote:
>
> From: Balsam CHIHI <bchihi@baylibre.com>
>
> Add AP Domain to LVTS thermal controllers dt-binding definition for mt8195.
>
> Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
> ---
> include/dt-bindings/thermal/mediatek,lvts-thermal.h | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/include/dt-bindings/thermal/mediatek,lvts-thermal.h b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
> index c09398920468..8fa5a46675c4 100644
> --- a/include/dt-bindings/thermal/mediatek,lvts-thermal.h
> +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
> @@ -16,4 +16,14 @@
> #define MT8195_MCU_LITTLE_CPU2 6
> #define MT8195_MCU_LITTLE_CPU3 7
>
> +#define MT8195_AP_VPU0 8
Can't this start from 0? This is a different hardware block. The index
namespace is separate. Same question for MT8192.
ChenYu
> +#define MT8195_AP_VPU1 9
> +#define MT8195_AP_GPU0 10
> +#define MT8195_AP_GPU1 11
> +#define MT8195_AP_VDEC 12
> +#define MT8195_AP_IMG 13
> +#define MT8195_AP_INFRA 14
> +#define MT8195_AP_CAM0 15
> +#define MT8195_AP_CAM1 16
> +
> #endif /* __MEDIATEK_LVTS_DT_H */
> --
> 2.34.1
>
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/4] dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers for mt8195
2023-03-09 4:40 ` Chen-Yu Tsai
@ 2023-03-09 10:39 ` Daniel Lezcano
2023-03-10 3:20 ` Chen-Yu Tsai
2023-03-16 22:35 ` Rob Herring
0 siblings, 2 replies; 22+ messages in thread
From: Daniel Lezcano @ 2023-03-09 10:39 UTC (permalink / raw)
To: Chen-Yu Tsai, bchihi
Cc: angelogioacchino.delregno, rafael, amitk, rui.zhang,
matthias.bgg, robh+dt, krzysztof.kozlowski+dt, rdunlap,
ye.xingchen, p.zabel, linux-pm, linux-kernel, linux-arm-kernel,
linux-mediatek, devicetree, khilman, james.lo, rex-bc.chen
On 09/03/2023 05:40, Chen-Yu Tsai wrote:
> On Wed, Mar 8, 2023 at 12:46 AM <bchihi@baylibre.com> wrote:
>>
>> From: Balsam CHIHI <bchihi@baylibre.com>
>>
>> Add AP Domain to LVTS thermal controllers dt-binding definition for mt8195.
>>
>> Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
>> ---
>> include/dt-bindings/thermal/mediatek,lvts-thermal.h | 10 ++++++++++
>> 1 file changed, 10 insertions(+)
>>
>> diff --git a/include/dt-bindings/thermal/mediatek,lvts-thermal.h b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
>> index c09398920468..8fa5a46675c4 100644
>> --- a/include/dt-bindings/thermal/mediatek,lvts-thermal.h
>> +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
>> @@ -16,4 +16,14 @@
>> #define MT8195_MCU_LITTLE_CPU2 6
>> #define MT8195_MCU_LITTLE_CPU3 7
>>
>> +#define MT8195_AP_VPU0 8
>
> Can't this start from 0? This is a different hardware block. The index
> namespace is separate. Same question for MT8192.
The ID is used to differentiate the thermal zone identifier in the
device tree from the driver.
+ vpu0-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_ap MT8195_AP_VPU0>;
+
+ trips {
+ vpu0_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
If MT8195_AP_VPU0 is 0, then the code won't be able to differentiate
MT8195_AP_VPU0 and MT8195_MCU_BIG_CPU0
The LVTS driver will call devm_thermal_of_zone_register() with the
sensor id. If MT8195_MCU_BIG_CPU0 and MT8195_AP_VPU0 have the same id,
then at the moment of registering the MT8195_AP_VPU0, the underlying OF
thermal framework code will use MT8195_MCU_BIG_CPU0 description instead
because it will be the first to be find in the DT.
If MT8195_AP_VPU0 is described in DT before, then the same will happen
when registering MT8195_MCU_BIG_CPU0, MT8195_AP_VPU0 will be registered
instead.
IOW all ids must be different.
The namespace is already described by the macro name AFAICS, so whatever
the values, we see only the macro names and those IDs are private the
kernel implementation.
If the numbering is really important, may be something like:
#define MT8195_MCU_BIG_CPU0 00
#define MT8195_MCU_BIG_CPU1 01
#define MT8195_MCU_BIG_CPU2 02
#define MT8195_MCU_BIG_CPU3 03
#define MT8195_MCU_LITTLE_CPU0 04
#define MT8195_MCU_LITTLE_CPU1 05
#define MT8195_MCU_LITTLE_CPU2 06
#define MT8195_MCU_LITTLE_CPU3 07
#define MT8195_AP_VPU1 10
#define MT8195_AP_GPU0 11
#define MT8195_AP_GPU1 12
#define MT8195_AP_VDEC 13
#define MT8195_AP_IMG 14
#define MT8195_AP_INFRA 15
#define MT8195_AP_CAM0 16
#define MT8195_AP_CAM1 17
But I would suggest considering this change as a separate patch after
the AP domain is added.
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 1/4] dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers for mt8195
2023-03-09 10:39 ` Daniel Lezcano
@ 2023-03-10 3:20 ` Chen-Yu Tsai
2023-03-16 22:35 ` Rob Herring
1 sibling, 0 replies; 22+ messages in thread
From: Chen-Yu Tsai @ 2023-03-10 3:20 UTC (permalink / raw)
To: Daniel Lezcano
Cc: bchihi, angelogioacchino.delregno, rafael, amitk, rui.zhang,
matthias.bgg, robh+dt, krzysztof.kozlowski+dt, rdunlap,
ye.xingchen, p.zabel, linux-pm, linux-kernel, linux-arm-kernel,
linux-mediatek, devicetree, khilman, james.lo, rex-bc.chen
On Thu, Mar 9, 2023 at 6:39 PM Daniel Lezcano <daniel.lezcano@linaro.org> wrote:
>
> On 09/03/2023 05:40, Chen-Yu Tsai wrote:
> > On Wed, Mar 8, 2023 at 12:46 AM <bchihi@baylibre.com> wrote:
> >>
> >> From: Balsam CHIHI <bchihi@baylibre.com>
> >>
> >> Add AP Domain to LVTS thermal controllers dt-binding definition for mt8195.
> >>
> >> Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
> >> ---
> >> include/dt-bindings/thermal/mediatek,lvts-thermal.h | 10 ++++++++++
> >> 1 file changed, 10 insertions(+)
> >>
> >> diff --git a/include/dt-bindings/thermal/mediatek,lvts-thermal.h b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
> >> index c09398920468..8fa5a46675c4 100644
> >> --- a/include/dt-bindings/thermal/mediatek,lvts-thermal.h
> >> +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
> >> @@ -16,4 +16,14 @@
> >> #define MT8195_MCU_LITTLE_CPU2 6
> >> #define MT8195_MCU_LITTLE_CPU3 7
> >>
> >> +#define MT8195_AP_VPU0 8
> >
> > Can't this start from 0? This is a different hardware block. The index
> > namespace is separate. Same question for MT8192.
>
> The ID is used to differentiate the thermal zone identifier in the
> device tree from the driver.
>
> + vpu0-thermal {
> + polling-delay = <0>;
> + polling-delay-passive = <0>;
> + thermal-sensors = <&lvts_ap MT8195_AP_VPU0>;
> +
> + trips {
> + vpu0_crit: trip-crit {
> + temperature = <100000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + };
>
> If MT8195_AP_VPU0 is 0, then the code won't be able to differentiate
> MT8195_AP_VPU0 and MT8195_MCU_BIG_CPU0
>
> The LVTS driver will call devm_thermal_of_zone_register() with the
> sensor id. If MT8195_MCU_BIG_CPU0 and MT8195_AP_VPU0 have the same id,
> then at the moment of registering the MT8195_AP_VPU0, the underlying OF
> thermal framework code will use MT8195_MCU_BIG_CPU0 description instead
> because it will be the first to be find in the DT.
>
> If MT8195_AP_VPU0 is described in DT before, then the same will happen
> when registering MT8195_MCU_BIG_CPU0, MT8195_AP_VPU0 will be registered
> instead.
>
> IOW all ids must be different.
I see. I didn't realize the lookup namespace covered the whole platform.
In that case, please ignore my request.
ChenYu
> The namespace is already described by the macro name AFAICS, so whatever
> the values, we see only the macro names and those IDs are private the
> kernel implementation.
>
> If the numbering is really important, may be something like:
>
> #define MT8195_MCU_BIG_CPU0 00
> #define MT8195_MCU_BIG_CPU1 01
> #define MT8195_MCU_BIG_CPU2 02
> #define MT8195_MCU_BIG_CPU3 03
> #define MT8195_MCU_LITTLE_CPU0 04
> #define MT8195_MCU_LITTLE_CPU1 05
> #define MT8195_MCU_LITTLE_CPU2 06
> #define MT8195_MCU_LITTLE_CPU3 07
>
> #define MT8195_AP_VPU1 10
> #define MT8195_AP_GPU0 11
> #define MT8195_AP_GPU1 12
> #define MT8195_AP_VDEC 13
> #define MT8195_AP_IMG 14
> #define MT8195_AP_INFRA 15
> #define MT8195_AP_CAM0 16
> #define MT8195_AP_CAM1 17
>
> But I would suggest considering this change as a separate patch after
> the AP domain is added.
>
>
> --
> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
>
> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
> <http://twitter.com/#!/linaroorg> Twitter |
> <http://www.linaro.org/linaro-blog/> Blog
>
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 1/4] dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers for mt8195
2023-03-09 10:39 ` Daniel Lezcano
2023-03-10 3:20 ` Chen-Yu Tsai
@ 2023-03-16 22:35 ` Rob Herring
2023-03-17 11:57 ` Daniel Lezcano
1 sibling, 1 reply; 22+ messages in thread
From: Rob Herring @ 2023-03-16 22:35 UTC (permalink / raw)
To: Daniel Lezcano
Cc: Chen-Yu Tsai, bchihi, angelogioacchino.delregno, rafael, amitk,
rui.zhang, matthias.bgg, krzysztof.kozlowski+dt, rdunlap,
ye.xingchen, p.zabel, linux-pm, linux-kernel, linux-arm-kernel,
linux-mediatek, devicetree, khilman, james.lo, rex-bc.chen
On Thu, Mar 09, 2023 at 11:39:13AM +0100, Daniel Lezcano wrote:
> On 09/03/2023 05:40, Chen-Yu Tsai wrote:
> > On Wed, Mar 8, 2023 at 12:46 AM <bchihi@baylibre.com> wrote:
> > >
> > > From: Balsam CHIHI <bchihi@baylibre.com>
> > >
> > > Add AP Domain to LVTS thermal controllers dt-binding definition for mt8195.
> > >
> > > Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
> > > ---
> > > include/dt-bindings/thermal/mediatek,lvts-thermal.h | 10 ++++++++++
> > > 1 file changed, 10 insertions(+)
> > >
> > > diff --git a/include/dt-bindings/thermal/mediatek,lvts-thermal.h b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
> > > index c09398920468..8fa5a46675c4 100644
> > > --- a/include/dt-bindings/thermal/mediatek,lvts-thermal.h
> > > +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
> > > @@ -16,4 +16,14 @@
> > > #define MT8195_MCU_LITTLE_CPU2 6
> > > #define MT8195_MCU_LITTLE_CPU3 7
> > >
> > > +#define MT8195_AP_VPU0 8
> >
> > Can't this start from 0? This is a different hardware block. The index
> > namespace is separate. Same question for MT8192.
>
> The ID is used to differentiate the thermal zone identifier in the device
> tree from the driver.
>
> + vpu0-thermal {
> + polling-delay = <0>;
> + polling-delay-passive = <0>;
> + thermal-sensors = <&lvts_ap MT8195_AP_VPU0>;
> +
> + trips {
> + vpu0_crit: trip-crit {
> + temperature = <100000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + };
>
> If MT8195_AP_VPU0 is 0, then the code won't be able to differentiate
> MT8195_AP_VPU0 and MT8195_MCU_BIG_CPU0
>
> The LVTS driver will call devm_thermal_of_zone_register() with the sensor
> id. If MT8195_MCU_BIG_CPU0 and MT8195_AP_VPU0 have the same id, then at the
> moment of registering the MT8195_AP_VPU0, the underlying OF thermal
> framework code will use MT8195_MCU_BIG_CPU0 description instead because it
> will be the first to be find in the DT.
>
> If MT8195_AP_VPU0 is described in DT before, then the same will happen when
> registering MT8195_MCU_BIG_CPU0, MT8195_AP_VPU0 will be registered instead.
>
> IOW all ids must be different.
That's broken for how producer/consumer phandle+args bindings work.
Rob
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 1/4] dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers for mt8195
2023-03-16 22:35 ` Rob Herring
@ 2023-03-17 11:57 ` Daniel Lezcano
0 siblings, 0 replies; 22+ messages in thread
From: Daniel Lezcano @ 2023-03-17 11:57 UTC (permalink / raw)
To: Rob Herring
Cc: Chen-Yu Tsai, bchihi, angelogioacchino.delregno, rafael, amitk,
rui.zhang, matthias.bgg, krzysztof.kozlowski+dt, rdunlap,
ye.xingchen, p.zabel, linux-pm, linux-kernel, linux-arm-kernel,
linux-mediatek, devicetree, khilman, james.lo, rex-bc.chen
Hi Rob,
On 16/03/2023 23:35, Rob Herring wrote:
> On Thu, Mar 09, 2023 at 11:39:13AM +0100, Daniel Lezcano wrote:
>> On 09/03/2023 05:40, Chen-Yu Tsai wrote:
>>> On Wed, Mar 8, 2023 at 12:46 AM <bchihi@baylibre.com> wrote:
>>>>
>>>> From: Balsam CHIHI <bchihi@baylibre.com>
>>>>
>>>> Add AP Domain to LVTS thermal controllers dt-binding definition for mt8195.
>>>>
>>>> Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
>>>> ---
>>>> include/dt-bindings/thermal/mediatek,lvts-thermal.h | 10 ++++++++++
>>>> 1 file changed, 10 insertions(+)
>>>>
>>>> diff --git a/include/dt-bindings/thermal/mediatek,lvts-thermal.h b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
>>>> index c09398920468..8fa5a46675c4 100644
>>>> --- a/include/dt-bindings/thermal/mediatek,lvts-thermal.h
>>>> +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
>>>> @@ -16,4 +16,14 @@
>>>> #define MT8195_MCU_LITTLE_CPU2 6
>>>> #define MT8195_MCU_LITTLE_CPU3 7
>>>>
>>>> +#define MT8195_AP_VPU0 8
>>>
>>> Can't this start from 0? This is a different hardware block. The index
>>> namespace is separate. Same question for MT8192.
>>
>> The ID is used to differentiate the thermal zone identifier in the device
>> tree from the driver.
>>
>> + vpu0-thermal {
>> + polling-delay = <0>;
>> + polling-delay-passive = <0>;
>> + thermal-sensors = <&lvts_ap MT8195_AP_VPU0>;
>> +
>> + trips {
>> + vpu0_crit: trip-crit {
>> + temperature = <100000>;
>> + hysteresis = <2000>;
>> + type = "critical";
>> + };
>> + };
>> + };
>>
>> If MT8195_AP_VPU0 is 0, then the code won't be able to differentiate
>> MT8195_AP_VPU0 and MT8195_MCU_BIG_CPU0
>>
>> The LVTS driver will call devm_thermal_of_zone_register() with the sensor
>> id. If MT8195_MCU_BIG_CPU0 and MT8195_AP_VPU0 have the same id, then at the
>> moment of registering the MT8195_AP_VPU0, the underlying OF thermal
>> framework code will use MT8195_MCU_BIG_CPU0 description instead because it
>> will be the first to be find in the DT.
>>
>> If MT8195_AP_VPU0 is described in DT before, then the same will happen when
>> registering MT8195_MCU_BIG_CPU0, MT8195_AP_VPU0 will be registered instead.
>>
>> IOW all ids must be different.
>
> That's broken for how producer/consumer phandle+args bindings work.
Do you mean this is broken for thermal zone description in the DT in
general ?
What would be the correct approach ?
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/4] dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers for mt8195
2023-03-07 15:45 ` [PATCH 1/4] dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers " bchihi
2023-03-08 9:14 ` AngeloGioacchino Del Regno
2023-03-09 4:40 ` Chen-Yu Tsai
@ 2023-03-16 22:36 ` Rob Herring
2023-04-01 20:51 ` Daniel Lezcano
3 siblings, 0 replies; 22+ messages in thread
From: Rob Herring @ 2023-03-16 22:36 UTC (permalink / raw)
To: bchihi
Cc: ye.xingchen, rdunlap, linux-kernel, rafael, matthias.bgg,
rui.zhang, daniel.lezcano, devicetree, amitk, james.lo,
rex-bc.chen, linux-arm-kernel, robh+dt, linux-mediatek,
angelogioacchino.delregno, khilman, p.zabel, linux-pm,
krzysztof.kozlowski+dt
On Tue, 07 Mar 2023 16:45:21 +0100, bchihi@baylibre.com wrote:
> From: Balsam CHIHI <bchihi@baylibre.com>
>
> Add AP Domain to LVTS thermal controllers dt-binding definition for mt8195.
>
> Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
> ---
> include/dt-bindings/thermal/mediatek,lvts-thermal.h | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/4] dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers for mt8195
2023-03-07 15:45 ` [PATCH 1/4] dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers " bchihi
` (2 preceding siblings ...)
2023-03-16 22:36 ` Rob Herring
@ 2023-04-01 20:51 ` Daniel Lezcano
3 siblings, 0 replies; 22+ messages in thread
From: Daniel Lezcano @ 2023-04-01 20:51 UTC (permalink / raw)
To: bchihi, angelogioacchino.delregno, rafael, amitk, rui.zhang,
matthias.bgg, robh+dt, krzysztof.kozlowski+dt, rdunlap,
ye.xingchen, p.zabel
Cc: linux-pm, linux-kernel, linux-arm-kernel, linux-mediatek,
devicetree, khilman, james.lo, rex-bc.chen
On 07/03/2023 16:45, bchihi@baylibre.com wrote:
> From: Balsam CHIHI <bchihi@baylibre.com>
>
> Add AP Domain to LVTS thermal controllers dt-binding definition for mt8195.
>
> Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
> ---
Applied, thanks
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 2/4] thermal/drivers/mediatek/lvts_thermal: Add AP domain for mt8195
2023-03-07 15:45 [PATCH 0/4] Add LVTS's AP thermal domain support for mt8195 bchihi
2023-03-07 15:45 ` [PATCH 1/4] dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers " bchihi
@ 2023-03-07 15:45 ` bchihi
2023-03-08 9:15 ` AngeloGioacchino Del Regno
2023-04-01 20:51 ` Daniel Lezcano
2023-03-07 15:45 ` [PATCH 3/4] arm64: dts: mediatek: mt8195: Add AP domain thermal zones bchihi
` (3 subsequent siblings)
5 siblings, 2 replies; 22+ messages in thread
From: bchihi @ 2023-03-07 15:45 UTC (permalink / raw)
To: daniel.lezcano, angelogioacchino.delregno, rafael, amitk,
rui.zhang, matthias.bgg, robh+dt, krzysztof.kozlowski+dt,
rdunlap, ye.xingchen, p.zabel
Cc: linux-pm, linux-kernel, linux-arm-kernel, linux-mediatek,
devicetree, khilman, james.lo, rex-bc.chen
From: Balsam CHIHI <bchihi@baylibre.com>
Add MT8195 AP Domain support to LVTS Driver.
Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
---
drivers/thermal/mediatek/lvts_thermal.c | 94 +++++++++++++++++++------
1 file changed, 74 insertions(+), 20 deletions(-)
diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c
index 5dbc80ba961b..7565def6b27c 100644
--- a/drivers/thermal/mediatek/lvts_thermal.c
+++ b/drivers/thermal/mediatek/lvts_thermal.c
@@ -528,29 +528,33 @@ static int lvts_sensor_init(struct device *dev, struct lvts_ctrl *lvts_ctrl,
* The efuse blob values follows the sensor enumeration per thermal
* controller. The decoding of the stream is as follow:
*
- * <--?-> <----big0 ???---> <-sensor0-> <-0->
- * ------------------------------------------
- * index in the stream: : | 0x0 | 0x1 | 0x2 | 0x3 | 0x4 | 0x5 | 0x6 |
- * ------------------------------------------
+ * stream index map for MCU Domain :
*
- * <--sensor1--><-0-> <----big1 ???---> <-sen
- * ------------------------------------------
- * | 0x7 | 0x8 | 0x9 | 0xA | 0xB | OxC | OxD |
- * ------------------------------------------
+ * <-----mcu-tc#0-----> <-----sensor#0-----> <-----sensor#1----->
+ * 0x01 | 0x02 | 0x03 | 0x04 | 0x05 | 0x06 | 0x07 | 0x08 | 0x09
*
- * sor0-> <-0-> <-sensor1-> <-0-> ..........
- * ------------------------------------------
- * | 0x7 | 0x8 | 0x9 | 0xA | 0xB | OxC | OxD |
- * ------------------------------------------
+ * <-----mcu-tc#1-----> <-----sensor#2-----> <-----sensor#3----->
+ * 0x0A | 0x0B | 0x0C | 0x0D | 0x0E | 0x0F | 0x10 | 0x11 | 0x12
*
- * And so on ...
+ * <-----mcu-tc#2-----> <-----sensor#4-----> <-----sensor#5-----> <-----sensor#6-----> <-----sensor#7----->
+ * 0x13 | 0x14 | 0x15 | 0x16 | 0x17 | 0x18 | 0x19 | 0x1A | 0x1B | 0x1C | 0x1D | 0x1E | 0x1F | 0x20 | 0x21
+ *
+ * stream index map for AP Domain :
+ *
+ * <-----ap--tc#0-----> <-----sensor#0-----> <-----sensor#1----->
+ * 0x22 | 0x23 | 0x24 | 0x25 | 0x26 | 0x27 | 0x28 | 0x29 | 0x2A
+ *
+ * <-----ap--tc#1-----> <-----sensor#2-----> <-----sensor#3----->
+ * 0x2B | 0x2C | 0x2D | 0x2E | 0x2F | 0x30 | 0x31 | 0x32 | 0x33
+ *
+ * <-----ap--tc#2-----> <-----sensor#4-----> <-----sensor#5-----> <-----sensor#6----->
+ * 0x34 | 0x35 | 0x36 | 0x37 | 0x38 | 0x39 | 0x3A | 0x3B | 0x3C | 0x3D | 0x3E | 0x3F
+ *
+ * <-----ap--tc#3-----> <-----sensor#7-----> <-----sensor#8----->
+ * 0x40 | 0x41 | 0x42 | 0x43 | 0x44 | 0x45 | 0x46 | 0x47 | 0x48
*
* The data description gives the offset of the calibration data in
* this bytes stream for each sensor.
- *
- * Each thermal controller can handle up to 4 sensors max, we don't
- * care if there are less as the array of calibration is sized to 4
- * anyway. The unused sensor slot will be zeroed.
*/
static int lvts_calibration_init(struct device *dev, struct lvts_ctrl *lvts_ctrl,
const struct lvts_ctrl_data *lvts_ctrl_data,
@@ -1163,7 +1167,7 @@ static int lvts_remove(struct platform_device *pdev)
return 0;
}
-static const struct lvts_ctrl_data mt8195_lvts_data_ctrl[] = {
+static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = {
{
.cal_offset = { 0x04, 0x07 },
.lvts_sensor = {
@@ -1198,13 +1202,63 @@ static const struct lvts_ctrl_data mt8195_lvts_data_ctrl[] = {
}
};
+static const struct lvts_ctrl_data mt8195_lvts_ap_data_ctrl[] = {
+ {
+ .cal_offset = { 0x25, 0x28 },
+ .lvts_sensor = {
+ { .dt_id = MT8195_AP_VPU0 },
+ { .dt_id = MT8195_AP_VPU1 }
+ },
+ .num_lvts_sensor = 2,
+ .offset = 0x0,
+ .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8195,
+ },
+ {
+ .cal_offset = { 0x2e, 0x31 },
+ .lvts_sensor = {
+ { .dt_id = MT8195_AP_GPU0 },
+ { .dt_id = MT8195_AP_GPU1 }
+ },
+ .num_lvts_sensor = 2,
+ .offset = 0x100,
+ .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8195,
+ },
+ {
+ .cal_offset = { 0x37, 0x3a, 0x3d },
+ .lvts_sensor = {
+ { .dt_id = MT8195_AP_VDEC },
+ { .dt_id = MT8195_AP_IMG },
+ { .dt_id = MT8195_AP_INFRA },
+ },
+ .num_lvts_sensor = 3,
+ .offset = 0x200,
+ .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8195,
+ },
+ {
+ .cal_offset = { 0x43, 0x46 },
+ .lvts_sensor = {
+ { .dt_id = MT8195_AP_CAM0 },
+ { .dt_id = MT8195_AP_CAM1 }
+ },
+ .num_lvts_sensor = 2,
+ .offset = 0x300,
+ .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8195,
+ }
+};
+
static const struct lvts_data mt8195_lvts_mcu_data = {
- .lvts_ctrl = mt8195_lvts_data_ctrl,
- .num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_data_ctrl),
+ .lvts_ctrl = mt8195_lvts_mcu_data_ctrl,
+ .num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl),
+};
+
+static const struct lvts_data mt8195_lvts_ap_data = {
+ .lvts_ctrl = mt8195_lvts_ap_data_ctrl,
+ .num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_ap_data_ctrl),
};
static const struct of_device_id lvts_of_match[] = {
{ .compatible = "mediatek,mt8195-lvts-mcu", .data = &mt8195_lvts_mcu_data },
+ { .compatible = "mediatek,mt8195-lvts-ap", .data = &mt8195_lvts_ap_data },
{},
};
MODULE_DEVICE_TABLE(of, lvts_of_match);
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH 2/4] thermal/drivers/mediatek/lvts_thermal: Add AP domain for mt8195
2023-03-07 15:45 ` [PATCH 2/4] thermal/drivers/mediatek/lvts_thermal: Add AP domain " bchihi
@ 2023-03-08 9:15 ` AngeloGioacchino Del Regno
2023-03-08 16:05 ` Balsam CHIHI
2023-04-01 20:51 ` Daniel Lezcano
1 sibling, 1 reply; 22+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-03-08 9:15 UTC (permalink / raw)
To: bchihi, daniel.lezcano, rafael, amitk, rui.zhang, matthias.bgg,
robh+dt, krzysztof.kozlowski+dt, rdunlap, ye.xingchen, p.zabel
Cc: linux-pm, linux-kernel, linux-arm-kernel, linux-mediatek,
devicetree, khilman, james.lo, rex-bc.chen
Il 07/03/23 16:45, bchihi@baylibre.com ha scritto:
> From: Balsam CHIHI <bchihi@baylibre.com>
>
> Add MT8195 AP Domain support to LVTS Driver.
Please mention the documentation changes in the commit description.
Regards,
Angelo
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 2/4] thermal/drivers/mediatek/lvts_thermal: Add AP domain for mt8195
2023-03-08 9:15 ` AngeloGioacchino Del Regno
@ 2023-03-08 16:05 ` Balsam CHIHI
0 siblings, 0 replies; 22+ messages in thread
From: Balsam CHIHI @ 2023-03-08 16:05 UTC (permalink / raw)
To: AngeloGioacchino Del Regno
Cc: daniel.lezcano, rafael, amitk, rui.zhang, matthias.bgg, robh+dt,
krzysztof.kozlowski+dt, rdunlap, ye.xingchen, p.zabel, linux-pm,
linux-kernel, linux-arm-kernel, linux-mediatek, devicetree,
khilman, james.lo, rex-bc.chen
On Wed, Mar 8, 2023 at 10:15 AM AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com> wrote:
>
> Il 07/03/23 16:45, bchihi@baylibre.com ha scritto:
> > From: Balsam CHIHI <bchihi@baylibre.com>
> >
> > Add MT8195 AP Domain support to LVTS Driver.
>
> Please mention the documentation changes in the commit description.
>
Hi Angelo,
A new commit will be created for the documentation in the new upcoming
series for both SoCs,
as you asked.
Best regards,
Balsam
> Regards,
> Angelo
>
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 2/4] thermal/drivers/mediatek/lvts_thermal: Add AP domain for mt8195
2023-03-07 15:45 ` [PATCH 2/4] thermal/drivers/mediatek/lvts_thermal: Add AP domain " bchihi
2023-03-08 9:15 ` AngeloGioacchino Del Regno
@ 2023-04-01 20:51 ` Daniel Lezcano
2023-04-04 15:12 ` Balsam CHIHI
1 sibling, 1 reply; 22+ messages in thread
From: Daniel Lezcano @ 2023-04-01 20:51 UTC (permalink / raw)
To: bchihi, angelogioacchino.delregno, rafael, amitk, rui.zhang,
matthias.bgg, robh+dt, krzysztof.kozlowski+dt, rdunlap,
ye.xingchen, p.zabel
Cc: linux-pm, linux-kernel, linux-arm-kernel, linux-mediatek,
devicetree, khilman, james.lo, rex-bc.chen
On 07/03/2023 16:45, bchihi@baylibre.com wrote:
> From: Balsam CHIHI <bchihi@baylibre.com>
>
> Add MT8195 AP Domain support to LVTS Driver.
>
> Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
> ---
Applied, thanks
Changed the commit log to reflect the comments change
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 2/4] thermal/drivers/mediatek/lvts_thermal: Add AP domain for mt8195
2023-04-01 20:51 ` Daniel Lezcano
@ 2023-04-04 15:12 ` Balsam CHIHI
0 siblings, 0 replies; 22+ messages in thread
From: Balsam CHIHI @ 2023-04-04 15:12 UTC (permalink / raw)
To: Daniel Lezcano
Cc: angelogioacchino.delregno, rafael, amitk, rui.zhang,
matthias.bgg, robh+dt, krzysztof.kozlowski+dt, rdunlap,
ye.xingchen, p.zabel, linux-pm, linux-kernel, linux-arm-kernel,
linux-mediatek, devicetree, khilman, james.lo, rex-bc.chen
On Sat, Apr 1, 2023 at 10:51 PM Daniel Lezcano
<daniel.lezcano@linaro.org> wrote:
>
> On 07/03/2023 16:45, bchihi@baylibre.com wrote:
> > From: Balsam CHIHI <bchihi@baylibre.com>
> >
> > Add MT8195 AP Domain support to LVTS Driver.
> >
> > Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
> > ---
>
> Applied, thanks
>
> Changed the commit log to reflect the comments change
Thank you Daniel!
>
> --
> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
>
> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
> <http://twitter.com/#!/linaroorg> Twitter |
> <http://www.linaro.org/linaro-blog/> Blog
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 3/4] arm64: dts: mediatek: mt8195: Add AP domain thermal zones
2023-03-07 15:45 [PATCH 0/4] Add LVTS's AP thermal domain support for mt8195 bchihi
2023-03-07 15:45 ` [PATCH 1/4] dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers " bchihi
2023-03-07 15:45 ` [PATCH 2/4] thermal/drivers/mediatek/lvts_thermal: Add AP domain " bchihi
@ 2023-03-07 15:45 ` bchihi
2023-03-07 15:45 ` [PATCH 4/4] arm64: dts: mediatek: mt8195: Add AP domain temperature thresholds bchihi
` (2 subsequent siblings)
5 siblings, 0 replies; 22+ messages in thread
From: bchihi @ 2023-03-07 15:45 UTC (permalink / raw)
To: daniel.lezcano, angelogioacchino.delregno, rafael, amitk,
rui.zhang, matthias.bgg, robh+dt, krzysztof.kozlowski+dt,
rdunlap, ye.xingchen, p.zabel
Cc: linux-pm, linux-kernel, linux-arm-kernel, linux-mediatek,
devicetree, khilman, james.lo, rex-bc.chen
From: Balsam CHIHI <bchihi@baylibre.com>
Add AP Domain thermal zones for the mt8195.
Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 126 +++++++++++++++++++++++
1 file changed, 126 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 10c8fb0856bc..b066d1eab1dc 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -2652,5 +2652,131 @@ map0 {
};
};
};
+
+ vpu0-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_ap MT8195_AP_VPU0>;
+
+ trips {
+ vpu0_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ vpu1-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_ap MT8195_AP_VPU1>;
+
+ trips {
+ vpu1_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpu0-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_ap MT8195_AP_GPU0>;
+
+ trips {
+ gpu0_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpu1-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_ap MT8195_AP_GPU1>;
+
+ trips {
+ gpu1_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ vdec-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_ap MT8195_AP_VDEC>;
+
+ trips {
+ vdec_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ img-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_ap MT8195_AP_IMG>;
+
+ trips {
+ img_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ infra-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_ap MT8195_AP_INFRA>;
+
+ trips {
+ infra_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cam0-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_ap MT8195_AP_CAM0>;
+
+ trips {
+ cam0_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cam1-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_ap MT8195_AP_CAM1>;
+
+ trips {
+ cam1_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
};
};
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH 4/4] arm64: dts: mediatek: mt8195: Add AP domain temperature thresholds
2023-03-07 15:45 [PATCH 0/4] Add LVTS's AP thermal domain support for mt8195 bchihi
` (2 preceding siblings ...)
2023-03-07 15:45 ` [PATCH 3/4] arm64: dts: mediatek: mt8195: Add AP domain thermal zones bchihi
@ 2023-03-07 15:45 ` bchihi
2023-03-08 9:17 ` AngeloGioacchino Del Regno
2023-03-10 3:22 ` [PATCH 0/4] Add LVTS's AP thermal domain support for mt8195 Chen-Yu Tsai
2023-04-01 20:52 ` Daniel Lezcano
5 siblings, 1 reply; 22+ messages in thread
From: bchihi @ 2023-03-07 15:45 UTC (permalink / raw)
To: daniel.lezcano, angelogioacchino.delregno, rafael, amitk,
rui.zhang, matthias.bgg, robh+dt, krzysztof.kozlowski+dt,
rdunlap, ye.xingchen, p.zabel
Cc: linux-pm, linux-kernel, linux-arm-kernel, linux-mediatek,
devicetree, khilman, james.lo, rex-bc.chen
From: Balsam CHIHI <bchihi@baylibre.com>
Specify the targeted temperature thresholds.
Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 90 +++++++++++++++++++-----
1 file changed, 72 insertions(+), 18 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index b066d1eab1dc..0dab67d283a6 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -2654,11 +2654,17 @@ map0 {
};
vpu0-thermal {
- polling-delay = <0>;
- polling-delay-passive = <0>;
+ polling-delay = <1000>;
+ polling-delay-passive = <250>;
thermal-sensors = <&lvts_ap MT8195_AP_VPU0>;
trips {
+ vpu0_alert: trip-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
vpu0_crit: trip-crit {
temperature = <100000>;
hysteresis = <2000>;
@@ -2668,11 +2674,17 @@ vpu0_crit: trip-crit {
};
vpu1-thermal {
- polling-delay = <0>;
- polling-delay-passive = <0>;
+ polling-delay = <1000>;
+ polling-delay-passive = <250>;
thermal-sensors = <&lvts_ap MT8195_AP_VPU1>;
trips {
+ vpu1_alert: trip-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
vpu1_crit: trip-crit {
temperature = <100000>;
hysteresis = <2000>;
@@ -2682,11 +2694,17 @@ vpu1_crit: trip-crit {
};
gpu0-thermal {
- polling-delay = <0>;
- polling-delay-passive = <0>;
+ polling-delay = <1000>;
+ polling-delay-passive = <250>;
thermal-sensors = <&lvts_ap MT8195_AP_GPU0>;
trips {
+ gpu0_alert: trip-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
gpu0_crit: trip-crit {
temperature = <100000>;
hysteresis = <2000>;
@@ -2696,11 +2714,17 @@ gpu0_crit: trip-crit {
};
gpu1-thermal {
- polling-delay = <0>;
- polling-delay-passive = <0>;
+ polling-delay = <1000>;
+ polling-delay-passive = <250>;
thermal-sensors = <&lvts_ap MT8195_AP_GPU1>;
trips {
+ gpu1_alert: trip-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
gpu1_crit: trip-crit {
temperature = <100000>;
hysteresis = <2000>;
@@ -2710,11 +2734,17 @@ gpu1_crit: trip-crit {
};
vdec-thermal {
- polling-delay = <0>;
- polling-delay-passive = <0>;
+ polling-delay = <1000>;
+ polling-delay-passive = <250>;
thermal-sensors = <&lvts_ap MT8195_AP_VDEC>;
trips {
+ vdec_alert: trip-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
vdec_crit: trip-crit {
temperature = <100000>;
hysteresis = <2000>;
@@ -2724,11 +2754,17 @@ vdec_crit: trip-crit {
};
img-thermal {
- polling-delay = <0>;
- polling-delay-passive = <0>;
+ polling-delay = <1000>;
+ polling-delay-passive = <250>;
thermal-sensors = <&lvts_ap MT8195_AP_IMG>;
trips {
+ img_alert: trip-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
img_crit: trip-crit {
temperature = <100000>;
hysteresis = <2000>;
@@ -2738,11 +2774,17 @@ img_crit: trip-crit {
};
infra-thermal {
- polling-delay = <0>;
- polling-delay-passive = <0>;
+ polling-delay = <1000>;
+ polling-delay-passive = <250>;
thermal-sensors = <&lvts_ap MT8195_AP_INFRA>;
trips {
+ infra_alert: trip-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
infra_crit: trip-crit {
temperature = <100000>;
hysteresis = <2000>;
@@ -2752,11 +2794,17 @@ infra_crit: trip-crit {
};
cam0-thermal {
- polling-delay = <0>;
- polling-delay-passive = <0>;
+ polling-delay = <1000>;
+ polling-delay-passive = <250>;
thermal-sensors = <&lvts_ap MT8195_AP_CAM0>;
trips {
+ cam0_alert: trip-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
cam0_crit: trip-crit {
temperature = <100000>;
hysteresis = <2000>;
@@ -2766,11 +2814,17 @@ cam0_crit: trip-crit {
};
cam1-thermal {
- polling-delay = <0>;
- polling-delay-passive = <0>;
+ polling-delay = <1000>;
+ polling-delay-passive = <250>;
thermal-sensors = <&lvts_ap MT8195_AP_CAM1>;
trips {
+ cam1_alert: trip-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
cam1_crit: trip-crit {
temperature = <100000>;
hysteresis = <2000>;
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH 4/4] arm64: dts: mediatek: mt8195: Add AP domain temperature thresholds
2023-03-07 15:45 ` [PATCH 4/4] arm64: dts: mediatek: mt8195: Add AP domain temperature thresholds bchihi
@ 2023-03-08 9:17 ` AngeloGioacchino Del Regno
2023-03-08 16:01 ` Balsam CHIHI
0 siblings, 1 reply; 22+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-03-08 9:17 UTC (permalink / raw)
To: bchihi, daniel.lezcano, rafael, amitk, rui.zhang, matthias.bgg,
robh+dt, krzysztof.kozlowski+dt, rdunlap, ye.xingchen, p.zabel
Cc: linux-pm, linux-kernel, linux-arm-kernel, linux-mediatek,
devicetree, khilman, james.lo, rex-bc.chen
Il 07/03/23 16:45, bchihi@baylibre.com ha scritto:
> From: Balsam CHIHI <bchihi@baylibre.com>
>
> Specify the targeted temperature thresholds.
You're introducing the thermal zones and *then* fixing them in this commit.
To be honest, this doesn't make a lot of sense...
Please squash this commit with
arm64: dts: mediatek: mt8195: Add AP domain thermal zones
P.S.: After squashing.. looks good.
Thanks,
Angelo
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 4/4] arm64: dts: mediatek: mt8195: Add AP domain temperature thresholds
2023-03-08 9:17 ` AngeloGioacchino Del Regno
@ 2023-03-08 16:01 ` Balsam CHIHI
0 siblings, 0 replies; 22+ messages in thread
From: Balsam CHIHI @ 2023-03-08 16:01 UTC (permalink / raw)
To: AngeloGioacchino Del Regno
Cc: daniel.lezcano, rafael, amitk, rui.zhang, matthias.bgg, robh+dt,
krzysztof.kozlowski+dt, rdunlap, ye.xingchen, p.zabel, linux-pm,
linux-kernel, linux-arm-kernel, linux-mediatek, devicetree,
khilman, james.lo, rex-bc.chen
On Wed, Mar 8, 2023 at 10:17 AM AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com> wrote:
>
> Il 07/03/23 16:45, bchihi@baylibre.com ha scritto:
> > From: Balsam CHIHI <bchihi@baylibre.com>
> >
> > Specify the targeted temperature thresholds.
>
> You're introducing the thermal zones and *then* fixing them in this commit.
> To be honest, this doesn't make a lot of sense...
>
> Please squash this commit with
> arm64: dts: mediatek: mt8195: Add AP domain thermal zones
>
> P.S.: After squashing.. looks good.
Hi Angelo,
Thanks again for the review.
OK, I will squash them in the new series.
Best regards,
Balsam
>
> Thanks,
> Angelo
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 0/4] Add LVTS's AP thermal domain support for mt8195
2023-03-07 15:45 [PATCH 0/4] Add LVTS's AP thermal domain support for mt8195 bchihi
` (3 preceding siblings ...)
2023-03-07 15:45 ` [PATCH 4/4] arm64: dts: mediatek: mt8195: Add AP domain temperature thresholds bchihi
@ 2023-03-10 3:22 ` Chen-Yu Tsai
2023-03-22 12:50 ` Balsam CHIHI
2023-04-01 20:52 ` Daniel Lezcano
5 siblings, 1 reply; 22+ messages in thread
From: Chen-Yu Tsai @ 2023-03-10 3:22 UTC (permalink / raw)
To: bchihi
Cc: daniel.lezcano, angelogioacchino.delregno, rafael, amitk,
rui.zhang, matthias.bgg, robh+dt, krzysztof.kozlowski+dt,
rdunlap, ye.xingchen, p.zabel, linux-pm, linux-kernel,
linux-arm-kernel, linux-mediatek, devicetree, khilman, james.lo,
rex-bc.chen
On Tue, Mar 7, 2023 at 11:45 PM <bchihi@baylibre.com> wrote:
>
> From: Balsam CHIHI <bchihi@baylibre.com>
>
> Add AP thermal domain support to LVTS Driver for MediaTek MT8195 SoC.
>
> This series is a continuation of the original series "Add LVTS Thermal Architecture" v14 :
> https://patchwork.kernel.org/project/linux-pm/cover/20230209105628.50294-1-bchihi@baylibre.com/
>
> Based on top of thermal/linux-next :
> base-commit: 6828e402d06f7c574430b61c05db784cd847b19f
>
> Depends on these patches as they are not yet applyied to thermal/linux-next branch :
> [v14,3/6] arm64: dts: mt8195: Add efuse node to mt8195 (already included in linux master branch)
> https://patchwork.kernel.org/project/linux-pm/patch/20230209105628.50294-4-bchihi@baylibre.com/
> [v14,5/6] arm64: dts: mediatek: mt8195: Add thermal zones and thermal nodes
> https://patchwork.kernel.org/project/linux-pm/patch/20230209105628.50294-6-bchihi@baylibre.com/
> [v14,6/6] arm64: dts: mediatek: mt8195: Add temperature mitigation threshold
> https://patchwork.kernel.org/project/linux-pm/patch/20230209105628.50294-7-bchihi@baylibre.com/
>
> Balsam CHIHI (4):
> dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal
> controllers for mt8195
> thermal/drivers/mediatek/lvts_thermal: Add AP domain for mt8195
> arm64: dts: mediatek: mt8195: Add AP domain thermal zones
> arm64: dts: mediatek: mt8195: Add AP domain temperature thresholds
Whole series is
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
on MT8195 Tomato Chromebook.
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 0/4] Add LVTS's AP thermal domain support for mt8195
2023-03-10 3:22 ` [PATCH 0/4] Add LVTS's AP thermal domain support for mt8195 Chen-Yu Tsai
@ 2023-03-22 12:50 ` Balsam CHIHI
0 siblings, 0 replies; 22+ messages in thread
From: Balsam CHIHI @ 2023-03-22 12:50 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: daniel.lezcano, angelogioacchino.delregno, rafael, amitk,
rui.zhang, matthias.bgg, robh+dt, krzysztof.kozlowski+dt,
rdunlap, ye.xingchen, p.zabel, linux-pm, linux-kernel,
linux-arm-kernel, linux-mediatek, devicetree, khilman, james.lo,
rex-bc.chen
On Fri, Mar 10, 2023 at 4:22 AM Chen-Yu Tsai <wenst@chromium.org> wrote:
>
> On Tue, Mar 7, 2023 at 11:45 PM <bchihi@baylibre.com> wrote:
> >
> > From: Balsam CHIHI <bchihi@baylibre.com>
> >
> > Add AP thermal domain support to LVTS Driver for MediaTek MT8195 SoC.
> >
> > This series is a continuation of the original series "Add LVTS Thermal Architecture" v14 :
> > https://patchwork.kernel.org/project/linux-pm/cover/20230209105628.50294-1-bchihi@baylibre.com/
> >
> > Based on top of thermal/linux-next :
> > base-commit: 6828e402d06f7c574430b61c05db784cd847b19f
> >
> > Depends on these patches as they are not yet applyied to thermal/linux-next branch :
> > [v14,3/6] arm64: dts: mt8195: Add efuse node to mt8195 (already included in linux master branch)
> > https://patchwork.kernel.org/project/linux-pm/patch/20230209105628.50294-4-bchihi@baylibre.com/
> > [v14,5/6] arm64: dts: mediatek: mt8195: Add thermal zones and thermal nodes
> > https://patchwork.kernel.org/project/linux-pm/patch/20230209105628.50294-6-bchihi@baylibre.com/
> > [v14,6/6] arm64: dts: mediatek: mt8195: Add temperature mitigation threshold
> > https://patchwork.kernel.org/project/linux-pm/patch/20230209105628.50294-7-bchihi@baylibre.com/
> >
> > Balsam CHIHI (4):
> > dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal
> > controllers for mt8195
> > thermal/drivers/mediatek/lvts_thermal: Add AP domain for mt8195
> > arm64: dts: mediatek: mt8195: Add AP domain thermal zones
> > arm64: dts: mediatek: mt8195: Add AP domain temperature thresholds
>
> Whole series is
>
> Tested-by: Chen-Yu Tsai <wenst@chromium.org>
>
> on MT8195 Tomato Chromebook.
Hi Chen-Yu Tsai,
Thank you very much for testing it!
Best regards,
Balsam
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 0/4] Add LVTS's AP thermal domain support for mt8195
2023-03-07 15:45 [PATCH 0/4] Add LVTS's AP thermal domain support for mt8195 bchihi
` (4 preceding siblings ...)
2023-03-10 3:22 ` [PATCH 0/4] Add LVTS's AP thermal domain support for mt8195 Chen-Yu Tsai
@ 2023-04-01 20:52 ` Daniel Lezcano
5 siblings, 0 replies; 22+ messages in thread
From: Daniel Lezcano @ 2023-04-01 20:52 UTC (permalink / raw)
To: bchihi, angelogioacchino.delregno, rafael, amitk, rui.zhang,
matthias.bgg, robh+dt, krzysztof.kozlowski+dt, rdunlap,
ye.xingchen, p.zabel
Cc: linux-pm, linux-kernel, linux-arm-kernel, linux-mediatek,
devicetree, khilman, james.lo, rex-bc.chen
On 07/03/2023 16:45, bchihi@baylibre.com wrote:
> From: Balsam CHIHI <bchihi@baylibre.com>
>
> Add AP thermal domain support to LVTS Driver for MediaTek MT8195 SoC.
>
> This series is a continuation of the original series "Add LVTS Thermal Architecture" v14 :
> https://patchwork.kernel.org/project/linux-pm/cover/20230209105628.50294-1-bchihi@baylibre.com/
>
> Based on top of thermal/linux-next :
> base-commit: 6828e402d06f7c574430b61c05db784cd847b19f
>
> Depends on these patches as they are not yet applyied to thermal/linux-next branch :
> [v14,3/6] arm64: dts: mt8195: Add efuse node to mt8195 (already included in linux master branch)
> https://patchwork.kernel.org/project/linux-pm/patch/20230209105628.50294-4-bchihi@baylibre.com/
> [v14,5/6] arm64: dts: mediatek: mt8195: Add thermal zones and thermal nodes
> https://patchwork.kernel.org/project/linux-pm/patch/20230209105628.50294-6-bchihi@baylibre.com/
> [v14,6/6] arm64: dts: mediatek: mt8195: Add temperature mitigation threshold
> https://patchwork.kernel.org/project/linux-pm/patch/20230209105628.50294-7-bchihi@baylibre.com/
>
> Balsam CHIHI (4):
> dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal
> controllers for mt8195
> thermal/drivers/mediatek/lvts_thermal: Add AP domain for mt8195
> arm64: dts: mediatek: mt8195: Add AP domain thermal zones
> arm64: dts: mediatek: mt8195: Add AP domain temperature thresholds
>
> arch/arm64/boot/dts/mediatek/mt8195.dtsi | 180 ++++++++++++++++++
> drivers/thermal/mediatek/lvts_thermal.c | 94 +++++++--
> .../thermal/mediatek,lvts-thermal.h | 10 +
> 3 files changed, 264 insertions(+), 20 deletions(-)
>
Applied, patch 1 & 2
--
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^ permalink raw reply [flat|nested] 22+ messages in thread