From: Balsam CHIHI <bchihi@baylibre.com>
To: Chen-Yu Tsai <wenst@chromium.org>
Cc: daniel.lezcano@linaro.org,
angelogioacchino.delregno@collabora.com, rafael@kernel.org,
amitk@kernel.org, rui.zhang@intel.com, matthias.bgg@gmail.com,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
rdunlap@infradead.org, ye.xingchen@zte.com.cn,
p.zabel@pengutronix.de, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org,
khilman@baylibre.com, james.lo@mediatek.com,
rex-bc.chen@mediatek.com
Subject: Re: [PATCH 0/4] Add LVTS support for mt8192
Date: Wed, 22 Mar 2023 13:48:15 +0100 [thread overview]
Message-ID: <CAGuA+oqDPPYFJef_8=YrOpHQNVJ3xgm_zXS6fq_HG2Jy_6t-Zg@mail.gmail.com> (raw)
In-Reply-To: <CAGuA+ooi7Kx05gagLzXAN3upDiSqDUNOM_djYdGftw6ogVx5gw@mail.gmail.com>
Hi Chen-Yu,
I suspect the bug comes from incorrect calibration data offsets for AP
Domain because you confirm that MCU Domain probe runs without issues.
Is it possible to test something for us to confirm this theory (i
don't have an mt8192 board on hand now), when you have the time of
course?
We would like to test AP Domain's calibration data offsets with a
working one, for example :
static const struct lvts_ctrl_data mt8192_lvts_ap_data_ctrl[] = {
{
- .cal_offset = { 0x25, 0x28 },
+ .cal_offset = { 0x04, 0x04 },
.lvts_sensor = {
{ .dt_id = MT8192_AP_VPU0 },
{ .dt_id = MT8192_AP_VPU1 }
@@ -1336,7 +1336,7 @@ static const struct lvts_ctrl_data
mt8192_lvts_ap_data_ctrl[] = {
.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192,
},
{
- .cal_offset = { 0x2e, 0x31 },
+ .cal_offset = { 0x04, 0x04 },
.lvts_sensor = {
{ .dt_id = MT8192_AP_GPU0 },
{ .dt_id = MT8192_AP_GPU1 }
@@ -1346,7 +1346,7 @@ static const struct lvts_ctrl_data
mt8192_lvts_ap_data_ctrl[] = {
.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192,
},
{
- .cal_offset = { 0x37, 0x3a },
+ .cal_offset = { 0x04, 0x04 },
.lvts_sensor = {
{ .dt_id = MT8192_AP_INFRA },
{ .dt_id = MT8192_AP_CAM },
@@ -1356,7 +1356,7 @@ static const struct lvts_ctrl_data
mt8192_lvts_ap_data_ctrl[] = {
.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192,
},
{
- .cal_offset = { 0x40, 0x43, 0x46 },
+ .cal_offset = { 0x04, 0x04, 0x04 },
.lvts_sensor = {
{ .dt_id = MT8192_AP_MD0 },
{ .dt_id = MT8192_AP_MD1 },
This example is tested and works for mt8195,
(all sensors use the same calibration data offset for testing purposes).
Thank you in advance for your help.
Best regards,
Balsam
next prev parent reply other threads:[~2023-03-22 12:49 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-07 16:34 [PATCH 0/4] Add LVTS support for mt8192 bchihi
2023-03-07 16:34 ` [PATCH 1/4] dt-bindings: thermal: mediatek: Add LVTS thermal controller definition " bchihi
2023-03-08 9:20 ` AngeloGioacchino Del Regno
2023-03-09 16:17 ` Krzysztof Kozlowski
2023-03-07 16:34 ` [PATCH 2/4] thermal/drivers/mediatek/lvts_thermal: Add mt8192 support bchihi
2023-03-08 9:23 ` AngeloGioacchino Del Regno
2023-03-08 15:59 ` Balsam CHIHI
2023-03-07 16:34 ` [PATCH 3/4] arm64: dts: mediatek: mt8192: Add thermal zones and thermal nodes bchihi
2023-03-07 16:34 ` [PATCH 4/4] arm64: dts: mediatek: mt8192: Add temperature mitigation threshold bchihi
2023-03-09 5:04 ` [PATCH 0/4] Add LVTS support for mt8192 Chen-Yu Tsai
2023-03-09 10:47 ` Balsam CHIHI
2023-03-22 12:48 ` Balsam CHIHI [this message]
2023-03-25 4:33 ` Chen-Yu Tsai
2023-03-28 0:20 ` Balsam CHIHI
2023-03-28 3:12 ` Chen-Yu Tsai
2023-03-29 8:05 ` Balsam CHIHI
2023-04-24 22:21 ` Nícolas F. R. A. Prado
2023-04-25 8:36 ` Balsam CHIHI
2023-04-25 9:59 ` Chen-Yu Tsai
2023-04-25 11:28 ` Balsam CHIHI
2023-04-26 23:20 ` Nícolas F. R. A. Prado
2023-04-27 14:08 ` Balsam CHIHI
2023-04-28 20:00 ` Nícolas F. R. A. Prado
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