RE: [PATCH V15 RESEND 5/5] arm64: dts: imx: add i.MX8QXP thermal support

[Anson Huang <anson.huang@nxp.com>]

Hi, Daniel

> Subject: Re: [PATCH V15 RESEND 5/5] arm64: dts: imx: add i.MX8QXP thermal
> support
> 
> On Thu, Feb 20, 2020 at 09:10:28AM +0800, Anson Huang wrote:
> > Add i.MX8QXP CPU thermal zone support.
> >
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > ---
> > No change.
> > ---
> >  arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 36
> > ++++++++++++++++++++++++++++++
> >  1 file changed, 36 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > index fb5f752..0a14fe4 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > @@ -11,6 +11,7 @@
> >  #include <dt-bindings/input/input.h>
> >  #include <dt-bindings/interrupt-controller/arm-gic.h>
> >  #include <dt-bindings/pinctrl/pads-imx8qxp.h>
> > +#include <dt-bindings/thermal/thermal.h>
> >
> >  / {
> >  	interrupt-parent = <&gic>;
> > @@ -189,6 +190,11 @@
> >  			compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt";
> >  			timeout-sec = <60>;
> >  		};
> > +
> > +		tsens: thermal-sensor {
> > +			compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-
> thermal";
> > +			#thermal-sensor-cells = <1>;
> > +		};
> >  	};
> >
> >  	timer {
> > @@ -586,4 +592,34 @@
> >  			#clock-cells = <1>;
> >  		};
> >  	};
> > +
> > +	thermal_zones: thermal-zones {
> > +		cpu-thermal0 {
> > +			polling-delay-passive = <250>;
> > +			polling-delay = <2000>;
> > +			thermal-sensors = <&tsens IMX_SC_R_SYSTEM>;
> > +			trips {
> > +				cpu_alert0: trip0 {
> > +					temperature = <107000>;
> > +					hysteresis = <2000>;
> > +					type = "passive";
> > +				};
> 
> May be you can add a 'hot' trip point before 'critical' for future use before
> reaching the emergency shutdown.

The 'passive' trip is actually the 'hot' trip point you mentioned, and I have combined it to
below cooling map which will throttle cpu-freq when passive (hot) point is reached.
We all use 'passive' as 'hot' alarm and trigger cpu-freq throttle on i.MX platforms. 

Thanks,
Anson

> 
> > +				cpu_crit0: trip1 {
> > +					temperature = <127000>;
> > +					hysteresis = <2000>;
> > +					type = "critical";
> > +				};
> > +			};
> > +			cooling-maps {
> > +				map0 {
> > +					trip = <&cpu_alert0>;
> > +					cooling-device =
> > +						<&A35_0
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > +						<&A35_1
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > +						<&A35_2
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > +						<&A35_3
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> > +				};
> > +			};
> > +		};
> > +	};
> >  };
> > --
> > 2.7.4
> >
> 
> --
> 
> 
> <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.
> linaro.org%2F&amp;data=02%7C01%7CAnson.Huang%40nxp.com%7Cd6c0d
> 0ce57a14985a39008d7b6cea4ff%7C686ea1d3bc2b4c6fa92cd99c5c301635%7
> C0%7C0%7C637178870951977751&amp;sdata=a7BXeoGKPsYlXmy0sCmA6IM
> SbexdiXwZEXAe8o%2BI3j0%3D&amp;reserved=0> Linaro.org │ Open source
> software for ARM SoCs
> 
> Follow Linaro:
> <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.
> facebook.com%2Fpages%2FLinaro&amp;data=02%7C01%7CAnson.Huang%4
> 0nxp.com%7Cd6c0d0ce57a14985a39008d7b6cea4ff%7C686ea1d3bc2b4c6fa9
> 2cd99c5c301635%7C0%7C0%7C637178870951977751&amp;sdata=MVpiED%
> 2Blp4h%2FV4EQsMS%2FWT4QvLJYjOZ%2FIpugeO401Vc%3D&amp;reserved=
> 0> Facebook |
> <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Ftwitte
> r.com%2F%23!%2Flinaroorg&amp;data=02%7C01%7CAnson.Huang%40nxp.c
> om%7Cd6c0d0ce57a14985a39008d7b6cea4ff%7C686ea1d3bc2b4c6fa92cd99
> c5c301635%7C0%7C0%7C637178870951977751&amp;sdata=8sLeSLpoO9TtIsf
> jG8hco5a%2FJv5h%2BbDjM4YB43uy%2FF0%3D&amp;reserved=0> Twitter |
> <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.
> linaro.org%2Flinaro-
> blog%2F&amp;data=02%7C01%7CAnson.Huang%40nxp.com%7Cd6c0d0ce57
> a14985a39008d7b6cea4ff%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C
> 0%7C637178870951977751&amp;sdata=XL58fpKLCFqOlQWpi7midoItJJsBamij
> XFyA2qT%2BwjM%3D&amp;reserved=0> Blog