[PATCH v2 0/8] arm: Base support for Renesas RZN1D-DB Board

[PATCH v2 0/8] arm: Base support for Renesas RZN1D-DB Board

[Michel Pollet]

This series adds the plain basic support for booting a bare
kernel on the RZ/N1D-DB Board. It's been trimmed to the strict
minimum as a 'base', further patches that will add the
rest of the support, pinctrl, clock architecture and quite
a few others.

Thanks for the comments on the previous version!

v2: 
 + Fixes for suggestions by Simon Horman
 + Fixes for suggestions by Rob Herring
 + Fixes for suggestions by Geert Uytterhoeven
 + Removed the mach file
 + Added a MFD base for the sysctrl block
 + Added a regmap based sub driver for the reboot handler
 + Renamed the files to match shmobile conventions
 + Adapted the compatible= strings to reflect 'family' vs 'part'
   distinction.
 + Removed the sysctrl.h file entirelly. 
 + Fixed every warnings from the DTC compiler on W=12 mode.
 + Split the device-tree patches from the code.
 
Michel Pollet (8):
  DT: mfd: renesas,rzn1-sysctrl: document RZ/N1 sysctrl node
  DT: reset: renesas,rzn1-reboot: document RZ/N1 reboot driver
  DT: arm: renesas,r9a06g032: add the RZ/N1 bindings
  reset: Renesas RZ/N1 reboot driver
  arm: rzn1: Add the RZ/N1 arch to the shmobile Kconfig
  DT: arm: Add Renesas RZ/N1 SoC base device tree file
  DT: arm: Add Renesas RZN1D-DB Board base file
  DT: arm: Add the RZN1D-DB Board to Renesas Makefile target

 Documentation/devicetree/bindings/arm/shmobile.txt |   5 +-
 .../bindings/mfd/renesas,rzn1-sysctrl.txt          |  22 +++++
 .../bindings/power/renesas,rzn1-reboot.txt         |  22 +++++
 arch/arm/boot/dts/Makefile                         |   1 +
 arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts        |  26 +++++
 arch/arm/boot/dts/r9a06g0xx.dtsi                   |  96 ++++++++++++++++++
 arch/arm/mach-shmobile/Kconfig                     |   5 +
 drivers/power/reset/Kconfig                        |   7 ++
 drivers/power/reset/Makefile                       |   1 +
 drivers/power/reset/rzn1-reboot.c                  | 109 +++++++++++++++++++++
 10 files changed, 293 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/mfd/renesas,rzn1-sysctrl.txt
 create mode 100644 Documentation/devicetree/bindings/power/renesas,rzn1-reboot.txt
 create mode 100644 arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts
 create mode 100644 arch/arm/boot/dts/r9a06g0xx.dtsi
 create mode 100644 drivers/power/reset/rzn1-reboot.c

-- 
2.7.4

[PATCH v2 1/8] DT: mfd: renesas,rzn1-sysctrl: document RZ/N1 sysctrl node

[Michel Pollet]

The Renesas RZ/N1 Family (Part #R9A06G0xx) has a multi-function
system controller. This documents the node used to encapsulate
it's sub drivers.

Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
---
 .../bindings/mfd/renesas,rzn1-sysctrl.txt          | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/renesas,rzn1-sysctrl.txt

diff --git a/Documentation/devicetree/bindings/mfd/renesas,rzn1-sysctrl.txt b/Documentation/devicetree/bindings/mfd/renesas,rzn1-sysctrl.txt
new file mode 100644
index 0000000..5aaef43
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/renesas,rzn1-sysctrl.txt
@@ -0,0 +1,22 @@
+DT bindings for the Renesas RZ-N1 System Controller
+
+== System Controller Node ==
+
+The system controller node currently only hosts a single sub-driver to handle
+the rebooting of the CPU. Eventually it will host the clock driver, SMP
+start handler, watchdog etc.
+
+See renesas,rzn1-reboot.txt for further details.
+
+Bindings:
++ Optional:
+	compatible = "renesas,r9a06g032-sysctrl";
++ Required:
+	compatible = "renesas,rzn1-sysctrl";
+
+Example:
+	sysctrl: sysctrl@4000c000 {
+		compatible = "renesas,r9a06g032-sysctrl",
+			"renesas,rzn1-sysctrl", "syscon", "simple-mfd";
+		reg = <0x4000c000 0x1000>;
+	};
-- 
2.7.4

[PATCH v2 2/8] DT: reset: renesas,rzn1-reboot: document RZ/N1 reboot driver

[Michel Pollet]

The Renesas RZ/N1 Family (Part #R9A06G0xx) requires a driver
as part of the sysctrl MFD to handle rebooting the CA7 cores.
This documents the driver bindings.

Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
---
 .../bindings/power/renesas,rzn1-reboot.txt         | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/power/renesas,rzn1-reboot.txt

diff --git a/Documentation/devicetree/bindings/power/renesas,rzn1-reboot.txt b/Documentation/devicetree/bindings/power/renesas,rzn1-reboot.txt
new file mode 100644
index 0000000..bea46e1
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/renesas,rzn1-reboot.txt
@@ -0,0 +1,22 @@
+DT bindings for the Renesas RZ-N1 Reboot Driver
+
+== Reboot Driver Node ==
+
+The reboot driver is always a subnode of the system controller node, see
+renesas,rzn1-sysctrl.txt for details.
+
+Bindings:
++ Optional:
+	compatible = "renesas,r9a06g032-reboot";
++ Required:
+	compatible = "renesas,rzn1-reboot";
+
+Example:
+	sysctrl: sysctrl@4000c000 {
+		compatible = "renesas,r9a06g032-sysctrl", "syscon", "simple-mfd";
+		reg = <0x4000c000 0x1000>;
+
+		reboot {
+			compatible = "renesas,r9a06g032-reboot";
+		};
+	};
-- 
2.7.4

[PATCH v2 3/8] DT: arm: renesas,r9a06g032: add the RZ/N1 bindings

[Michel Pollet]

This documents the RZ/N1 bindings for both the RZ/N1 and the RZN1D400-DB
board.

Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
---
 Documentation/devicetree/bindings/arm/shmobile.txt | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
index d3d1df9..09bdee3 100644
--- a/Documentation/devicetree/bindings/arm/shmobile.txt
+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -47,7 +47,8 @@ SoCs:
     compatible = "renesas,r8a77980"
   - R-Car D3 (R8A77995)
     compatible = "renesas,r8a77995"
-
+  - RZ/N1D (R9A06G032)
+    compatible = "renesas,r9a06g032"
 
 Boards:
 
@@ -104,6 +105,8 @@ Boards:
     compatible = "renesas,porter", "renesas,r8a7791"
   - RSKRZA1 (YR0K77210C000BE)
     compatible = "renesas,rskrza1", "renesas,r7s72100"
+  - RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package)
+    compatible = "renesas,rzn1d400-db", "renesas,r9a06g032"
   - Salvator-X (RTP0RC7795SIPB0010S)
     compatible = "renesas,salvator-x", "renesas,r8a7795"
   - Salvator-X (RTP0RC7796SIPB0011S)
-- 
2.7.4

[PATCH v2 4/8] reset: Renesas RZ/N1 reboot driver

[Michel Pollet]

The Renesas RZ/N1 Family (Part #R9A06G0xx) needs a small driver
to reboot the Cortex-A7 cores. This driver is a sub driver of
the sysctrl MFD.

Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
---
 drivers/power/reset/Kconfig       |   7 +++
 drivers/power/reset/Makefile      |   1 +
 drivers/power/reset/rzn1-reboot.c | 109 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 117 insertions(+)
 create mode 100644 drivers/power/reset/rzn1-reboot.c

diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index df58fc8..1416d88 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -144,6 +144,13 @@ config POWER_RESET_RESTART
 	  Instead they restart, and u-boot holds the SoC until the
 	  user presses a key. u-boot then boots into Linux.
 
+config POWER_RESET_RZN1
+	bool "Renesas RZ/N1 reboot driver"
+	depends on ARCH_RZN1
+	help
+	  This driver allows rebooting the CA7 cores of the
+	  Renesas RZ/N1 Family of SoC (Part # R9A06G0xx).
+
 config POWER_RESET_ST
 	bool "ST restart driver"
 	depends on ARCH_STI
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index 7778c74..bad9702 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_POWER_RESET_PIIX4_POWEROFF) += piix4-poweroff.o
 obj-$(CONFIG_POWER_RESET_LTC2952) += ltc2952-poweroff.o
 obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o
 obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o
+obj-$(CONFIG_POWER_RESET_RZN1) += rzn1-reboot.o
 obj-$(CONFIG_POWER_RESET_ST) += st-poweroff.o
 obj-$(CONFIG_POWER_RESET_VERSATILE) += arm-versatile-reboot.o
 obj-$(CONFIG_POWER_RESET_VEXPRESS) += vexpress-poweroff.o
diff --git a/drivers/power/reset/rzn1-reboot.c b/drivers/power/reset/rzn1-reboot.c
new file mode 100644
index 0000000..958bb65
--- /dev/null
+++ b/drivers/power/reset/rzn1-reboot.c
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * RZ/N1 reboot driver
+ *
+ * Copyright (C) 2018 Renesas Electronics Europe Limited
+ *
+ * Michel Pollet <michel.pollet@bp.renesas.com>, <buserror@gmail.com>
+ * Derived from zx-reboot.c
+ */
+
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/mfd/syscon.h>
+#include <linux/module.h>
+#include <linux/notifier.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/reboot.h>
+#include <linux/regmap.h>
+
+/* Definitions from the SDK rzn1-sysctrl.h autogenerated file */
+#define RZN1_SYSCTRL_REG_RSTEN			0x120
+#define RZN1_SYSCTRL_REG_RSTEN_MRESET_EN		0
+#define RZN1_SYSCTRL_REG_RSTEN_WDA7RST_EN		1
+#define RZN1_SYSCTRL_REG_RSTEN_WDA7RST_EN_MASK		0x6
+#define RZN1_SYSCTRL_REG_RSTEN_WDM3RST_EN		3
+#define RZN1_SYSCTRL_REG_RSTEN_CM3LOCKUPRST_EN		4
+#define RZN1_SYSCTRL_REG_RSTEN_CM3SYSRESET_EN		5
+#define RZN1_SYSCTRL_REG_RSTEN_SWRST_EN			6
+#define RZN1_SYSCTRL_REG_RSTCTRL		0x198
+#define RZN1_SYSCTRL_REG_RSTCTRL_WDA7RST_REQ		1
+#define RZN1_SYSCTRL_REG_RSTCTRL_WDA7RST_REQ_MASK	0x6
+#define RZN1_SYSCTRL_REG_RSTCTRL_WDM3RST_REQ		3
+#define RZN1_SYSCTRL_REG_RSTCTRL_CM3LOCKUPRST_REQ	4
+#define RZN1_SYSCTRL_REG_RSTCTRL_CM3SYSRESET_REQ	5
+#define RZN1_SYSCTRL_REG_RSTCTRL_SWRST_REQ		6
+
+
+static struct regmap *_sysctrl;
+
+static int rzn1_reboot_handler(struct notifier_block *this,
+			      unsigned long mode, void *cmd)
+{
+	regmap_write_bits(_sysctrl,
+			RZN1_SYSCTRL_REG_RSTEN,
+			BIT(RZN1_SYSCTRL_REG_RSTEN_SWRST_EN) |
+				BIT(RZN1_SYSCTRL_REG_RSTEN_MRESET_EN),
+			BIT(RZN1_SYSCTRL_REG_RSTEN_SWRST_EN) |
+				BIT(RZN1_SYSCTRL_REG_RSTEN_MRESET_EN));
+	regmap_write_bits(_sysctrl,
+			RZN1_SYSCTRL_REG_RSTCTRL,
+			BIT(RZN1_SYSCTRL_REG_RSTCTRL_SWRST_REQ),
+			BIT(RZN1_SYSCTRL_REG_RSTCTRL_SWRST_REQ));
+
+	mdelay(50);
+	pr_emerg("Unable to restart system\n");
+
+	return NOTIFY_DONE;
+}
+
+static struct notifier_block rzn1_reboot_nb = {
+	.notifier_call = rzn1_reboot_handler,
+	.priority = 128,
+};
+
+static int rzn1_reboot_probe(struct platform_device *pdev)
+{
+	int err;
+	struct device *parent;
+
+	parent = pdev->dev.parent;
+	if (parent && parent->of_node) {
+		_sysctrl = syscon_node_to_regmap(parent->of_node);
+	} else {
+		dev_err(&pdev->dev, "couldn't find sysctrl node\n");
+		return -ENODEV;
+	}
+	if (IS_ERR(_sysctrl)) {
+		dev_err(&pdev->dev, "couldn't find find regmap\n");
+		return PTR_ERR(_sysctrl);
+	}
+	err = register_restart_handler(&rzn1_reboot_nb);
+	if (err) {
+		dev_err(&pdev->dev, "register restart handler failed(err=%d)\n",
+			err);
+	}
+
+	return err;
+}
+
+static const struct of_device_id rzn1_reboot_of_match[] = {
+	{ .compatible = "renesas,r9a06g032-reboot" },
+	{ .compatible = "renesas,rzn1-reboot" },
+	{}
+};
+MODULE_DEVICE_TABLE(of, rzn1_reboot_of_match);
+
+static struct platform_driver rzn1_reboot_driver = {
+	.probe = rzn1_reboot_probe,
+	.driver = {
+		.name = "rzn1-reboot",
+		.of_match_table = rzn1_reboot_of_match,
+	},
+};
+module_platform_driver(rzn1_reboot_driver);
+
+MODULE_DESCRIPTION("RZ/N1 reboot driver");
+MODULE_AUTHOR("Michel Pollet <michel.pollet@bp.renesas.com>, <buserror@gmail.com>");
+MODULE_LICENSE("GPL v2");
-- 
2.7.4

[PATCH v2 5/8] arm: rzn1: Add the RZ/N1 arch to the shmobile Kconfig

[Michel Pollet]

Add the RZ/N1 Family (Part #R9A06G0xx) ARCH config to the rest of
the Renesas SoC collection.

Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
---
 arch/arm/mach-shmobile/Kconfig | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 280e731..221fbcb 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -110,6 +110,11 @@ config ARCH_R8A7794
 	bool "R-Car E2 (R8A77940)"
 	select ARCH_RCAR_GEN2
 
+config ARCH_RZN1
+	bool "RZ/N1 (R9A06G0xx) Family"
+	select ARM_AMBA
+	select CPU_V7
+
 config ARCH_SH73A0
 	bool "SH-Mobile AG5 (R8A73A00)"
 	select ARCH_RMOBILE
-- 
2.7.4

[PATCH v2 6/8] DT: arm: Add Renesas RZ/N1 SoC base device tree file

[Michel Pollet]

This adds the Renesas RZ/N1 Family (Part #R9A06G0xx) SoC
bare bone support.

This currently only handles generic parts (gic, architected timer)
and a UART.
For simplicity sake, this also relies on the bootloader to set the
pinctrl and clocks.

Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
---
 arch/arm/boot/dts/r9a06g0xx.dtsi | 96 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 96 insertions(+)
 create mode 100644 arch/arm/boot/dts/r9a06g0xx.dtsi

diff --git a/arch/arm/boot/dts/r9a06g0xx.dtsi b/arch/arm/boot/dts/r9a06g0xx.dtsi
new file mode 100644
index 0000000..c6eeee3
--- /dev/null
+++ b/arch/arm/boot/dts/r9a06g0xx.dtsi
@@ -0,0 +1,96 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Base Device Tree Source for the Renesas RZ/N1 SoC Family of devices
+ *
+ * Copyright (C) 2018 Renesas Electronics Europe Limited
+ *
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	compatible = "renesas,rzn1";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0>;
+		};
+		cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <1>;
+		};
+	};
+	clocks {
+		/*
+		 * this is fixed clock for now,
+		 * until the clock driver is merged
+		 */
+		clkuarts: clkuarts {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <47619047>;
+		};
+	};
+	arch-timer {
+		compatible = "arm,cortex-a7-timer",
+			     "arm,armv7-timer";
+		interrupt-parent = <&gic>;
+		arm,cpu-registers-not-fw-configured;
+		interrupts =
+			<GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
+				IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
+				IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
+				IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
+				IRQ_TYPE_LEVEL_LOW)>;
+	};
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		interrupt-parent = <&gic>;
+		ranges;
+
+		gic: gic@44101000 {
+			compatible = "arm,cortex-a7-gic", "arm,gic-400";
+			interrupt-controller;
+			#interrupt-cells = <3>;
+			reg = <0x44101000 0x1000>, /* Distributer */
+			      <0x44102000 0x2000>, /* CPU interface */
+			      <0x44104000 0x2000>, /* Virt interface control */
+			      <0x44106000 0x2000>; /* Virt CPU interface */
+			interrupts =
+				<GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
+					IRQ_TYPE_LEVEL_HIGH)>;
+		};
+		sysctrl: sysctrl@4000c000 {
+			compatible = "renesas,rzn1-sysctrl", "syscon",
+					"simple-mfd";
+			reg = <0x4000c000 0x1000>;
+
+			reboot {
+				compatible = "renesas,rzn1-reboot";
+			};
+		};
+		uart0: serial@40060000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x40060000 0x400>;
+			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&clkuarts>;
+			clock-names = "baudclk";
+			status = "disabled";
+		};
+	};
+};
-- 
2.7.4

[PATCH v2 7/8] DT: arm: Add Renesas RZN1D-DB Board base file

[Michel Pollet]

This adds a base device tree file for the RZN1-DB board, with only the
basic support allowing the system to boot to a prompt. Only one UART is
used, with only a single CPU running.

Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
---
 arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts

diff --git a/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts
new file mode 100644
index 0000000..a462b1a
--- /dev/null
+++ b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the RZN1D-DB Board
+ *
+ * Copyright (C) 2018 Renesas Electronics Europe Limited
+ *
+ */
+
+/dts-v1/;
+
+#include "r9a06g0xx.dtsi"
+
+/ {
+	model = "RZN1D-DB Board";
+	compatible = "renesas,rzn1d400-db", "renesas,r9a06g032", "renesas,rzn1";
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+	aliases {
+		serial0 = &uart0;
+	};
+};
+&uart0 {
+	status = "okay";
+};
-- 
2.7.4

[PATCH v2 8/8] DT: arm: Add the RZN1D-DB Board to Renesas Makefile target

[Michel Pollet]

This adds the newly added board to the Renesas built target

Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
---
 arch/arm/boot/dts/Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 3b4cc1b..0f01ada 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -806,6 +806,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
 	r8a7793-gose.dtb \
 	r8a7794-alt.dtb \
 	r8a7794-silk.dtb \
+	r9a06g032-rzn1d400-db.dtb \
 	sh73a0-kzm9g.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rv1108-evb.dtb \
-- 
2.7.4

Re: [PATCH v2 1/8] DT: mfd: renesas,rzn1-sysctrl: document RZ/N1 sysctrl node

[Geert Uytterhoeven]

Hi Michel,

Thanks for your patch!

On Thu, Mar 22, 2018 at 12:44 PM, Michel Pollet
<michel.pollet@bp.renesas.com> wrote:
> The Renesas RZ/N1 Family (Part #R9A06G0xx) has a multi-function
> system controller. This documents the node used to encapsulate
> it's sub drivers.

its

>
> Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>

> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/renesas,rzn1-sysctrl.txt
> @@ -0,0 +1,22 @@
> +DT bindings for the Renesas RZ-N1 System Controller

RZ/N1

> +
> +== System Controller Node ==
> +
> +The system controller node currently only hosts a single sub-driver to handle

s/sub-driver/sub-node/

> +the rebooting of the CPU. Eventually it will host the clock driver, SMP
> +start handler, watchdog etc.
> +
> +See renesas,rzn1-reboot.txt for further details.
> +
> +Bindings:
> ++ Optional:
> +       compatible = "renesas,r9a06g032-sysctrl";
> ++ Required:
> +       compatible = "renesas,rzn1-sysctrl";

Please mark both the SoC-specific and the family-specific values required.
Missing "syscon", "simple-mfd".

> +
> +Example:
> +       sysctrl: sysctrl@4000c000 {
> +               compatible = "renesas,r9a06g032-sysctrl",
> +                       "renesas,rzn1-sysctrl", "syscon", "simple-mfd";
> +               reg = <0x4000c000 0x1000>;
> +       };

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 2/8] DT: reset: renesas,rzn1-reboot: document RZ/N1 reboot driver

[Geert Uytterhoeven]

Hi Michel,

On Thu, Mar 22, 2018 at 12:44 PM, Michel Pollet
<michel.pollet@bp.renesas.com> wrote:
> The Renesas RZ/N1 Family (Part #R9A06G0xx) requires a driver
> as part of the sysctrl MFD to handle rebooting the CA7 cores.
> This documents the driver bindings.
>
> Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>

Thanks for your patch!

> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/renesas,rzn1-reboot.txt
> @@ -0,0 +1,22 @@
> +DT bindings for the Renesas RZ-N1 Reboot Driver
> +
> +== Reboot Driver Node ==
> +
> +The reboot driver is always a subnode of the system controller node, see
> +renesas,rzn1-sysctrl.txt for details.
> +
> +Bindings:
> ++ Optional:
> +       compatible = "renesas,r9a06g032-reboot";
> ++ Required:
> +       compatible = "renesas,rzn1-reboot";

Please mark both the SoC-specific and the family-specific values required.

> +
> +Example:
> +       sysctrl: sysctrl@4000c000 {
> +               compatible = "renesas,r9a06g032-sysctrl", "syscon", "simple-mfd";
> +               reg = <0x4000c000 0x1000>;
> +
> +               reboot {
> +                       compatible = "renesas,r9a06g032-reboot";

"renesas,r9a06g032-reboot", "renesas,rzn1-reboot".

> +               };
> +       };

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 3/8] DT: arm: renesas,r9a06g032: add the RZ/N1 bindings

[Geert Uytterhoeven]

Hi Michel,

On Thu, Mar 22, 2018 at 12:44 PM, Michel Pollet
<michel.pollet@bp.renesas.com> wrote:
> This documents the RZ/N1 bindings for both the RZ/N1 and the RZN1D400-DB
> board.
>
> Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>

Thanks for your patch!

> --- a/Documentation/devicetree/bindings/arm/shmobile.txt
> +++ b/Documentation/devicetree/bindings/arm/shmobile.txt
> @@ -47,7 +47,8 @@ SoCs:
>      compatible = "renesas,r8a77980"
>    - R-Car D3 (R8A77995)
>      compatible = "renesas,r8a77995"
> -
> +  - RZ/N1D (R9A06G032)
> +    compatible = "renesas,r9a06g032"
>
>  Boards:
>
> @@ -104,6 +105,8 @@ Boards:
>      compatible = "renesas,porter", "renesas,r8a7791"
>    - RSKRZA1 (YR0K77210C000BE)
>      compatible = "renesas,rskrza1", "renesas,r7s72100"
> +  - RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package)

The official board part number (between parentheses) should be
YCONNECT-IT-RZN1D?

> +    compatible = "renesas,rzn1d400-db", "renesas,r9a06g032"
>    - Salvator-X (RTP0RC7795SIPB0010S)
>      compatible = "renesas,salvator-x", "renesas,r8a7795"
>    - Salvator-X (RTP0RC7796SIPB0011S)

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 4/8] reset: Renesas RZ/N1 reboot driver

[Geert Uytterhoeven]

Hi Michel,

On Thu, Mar 22, 2018 at 12:44 PM, Michel Pollet
<michel.pollet@bp.renesas.com> wrote:
> The Renesas RZ/N1 Family (Part #R9A06G0xx) needs a small driver
> to reboot the Cortex-A7 cores. This driver is a sub driver of
> the sysctrl MFD.
>
> Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>

Thanks for your patch!

> --- /dev/null
> +++ b/drivers/power/reset/rzn1-reboot.c
> @@ -0,0 +1,109 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * RZ/N1 reboot driver
> + *
> + * Copyright (C) 2018 Renesas Electronics Europe Limited
> + *
> + * Michel Pollet <michel.pollet@bp.renesas.com>, <buserror@gmail.com>
> + * Derived from zx-reboot.c
> + */
> +
> +#include <linux/delay.h>
> +#include <linux/io.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/module.h>
> +#include <linux/notifier.h>
> +#include <linux/of_address.h>

I don't think you need <linux/of_address.h>.

> +#include <linux/platform_device.h>
> +#include <linux/reboot.h>
> +#include <linux/regmap.h>
> +
> +/* Definitions from the SDK rzn1-sysctrl.h autogenerated file */
> +#define RZN1_SYSCTRL_REG_RSTEN                 0x120
> +#define RZN1_SYSCTRL_REG_RSTEN_MRESET_EN               0
> +#define RZN1_SYSCTRL_REG_RSTEN_WDA7RST_EN              1
> +#define RZN1_SYSCTRL_REG_RSTEN_WDA7RST_EN_MASK         0x6
> +#define RZN1_SYSCTRL_REG_RSTEN_WDM3RST_EN              3
> +#define RZN1_SYSCTRL_REG_RSTEN_CM3LOCKUPRST_EN         4
> +#define RZN1_SYSCTRL_REG_RSTEN_CM3SYSRESET_EN          5
> +#define RZN1_SYSCTRL_REG_RSTEN_SWRST_EN                        6
> +#define RZN1_SYSCTRL_REG_RSTCTRL               0x198
> +#define RZN1_SYSCTRL_REG_RSTCTRL_WDA7RST_REQ           1
> +#define RZN1_SYSCTRL_REG_RSTCTRL_WDA7RST_REQ_MASK      0x6
> +#define RZN1_SYSCTRL_REG_RSTCTRL_WDM3RST_REQ           3
> +#define RZN1_SYSCTRL_REG_RSTCTRL_CM3LOCKUPRST_REQ      4
> +#define RZN1_SYSCTRL_REG_RSTCTRL_CM3SYSRESET_REQ       5
> +#define RZN1_SYSCTRL_REG_RSTCTRL_SWRST_REQ             6
> +
> +
> +static struct regmap *_sysctrl;

Variable names starting with an underscore are frowned upon.

> +static int rzn1_reboot_probe(struct platform_device *pdev)
> +{
> +       int err;
> +       struct device *parent;
> +
> +       parent = pdev->dev.parent;
> +       if (parent && parent->of_node) {
> +               _sysctrl = syscon_node_to_regmap(parent->of_node);
> +       } else {
> +               dev_err(&pdev->dev, "couldn't find sysctrl node\n");
> +               return -ENODEV;
> +       }

if (!parent || !parent->of_node) {
        dev_err(&pdev->dev, "couldn't find sysctrl node\n");
        return -ENODEV;
}
_sysctrl = syscon_node_to_regmap(parent->of_node);

> +       if (IS_ERR(_sysctrl)) {
> +               dev_err(&pdev->dev, "couldn't find find regmap\n");
> +               return PTR_ERR(_sysctrl);
> +       }
> +       err = register_restart_handler(&rzn1_reboot_nb);
> +       if (err) {
> +               dev_err(&pdev->dev, "register restart handler failed(err=%d)\n",
> +                       err);
> +       }
> +
> +       return err;
> +}
> +
> +static const struct of_device_id rzn1_reboot_of_match[] = {
> +       { .compatible = "renesas,r9a06g032-reboot" },
> +       { .compatible = "renesas,rzn1-reboot" },

Matching against the second (family-specific) compatible value should
be sufficient.

> +       {}
> +};
> +MODULE_DEVICE_TABLE(of, rzn1_reboot_of_match);

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 5/8] arm: rzn1: Add the RZ/N1 arch to the shmobile Kconfig

[Geert Uytterhoeven]

On Thu, Mar 22, 2018 at 12:44 PM, Michel Pollet
<michel.pollet@bp.renesas.com> wrote:
> Add the RZ/N1 Family (Part #R9A06G0xx) ARCH config to the rest of
> the Renesas SoC collection.
>
> Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>

Subject should be "arm: shmobile: ..."

Apart from that:
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 6/8] DT: arm: Add Renesas RZ/N1 SoC base device tree file

[Geert Uytterhoeven]

Hi Michel,

On Thu, Mar 22, 2018 at 12:44 PM, Michel Pollet
<michel.pollet@bp.renesas.com> wrote:
> This adds the Renesas RZ/N1 Family (Part #R9A06G0xx) SoC
> bare bone support.
>
> This currently only handles generic parts (gic, architected timer)
> and a UART.
> For simplicity sake, this also relies on the bootloader to set the
> pinctrl and clocks.
>
> Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>

Thanks for your patch!

> --- /dev/null
> +++ b/arch/arm/boot/dts/r9a06g0xx.dtsi
> @@ -0,0 +1,96 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Base Device Tree Source for the Renesas RZ/N1 SoC Family of devices
> + *
> + * Copyright (C) 2018 Renesas Electronics Europe Limited
> + *
> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +/ {
> +       compatible = "renesas,rzn1";

As per your binding, this should be "renesas,r9a06g032"

> +       soc {

> +               sysctrl: sysctrl@4000c000 {
> +                       compatible = "renesas,rzn1-sysctrl", "syscon",

Missing "renesas,r9a06g032-sysctrl".

> +                                       "simple-mfd";
> +                       reg = <0x4000c000 0x1000>;
> +
> +                       reboot {
> +                               compatible = "renesas,rzn1-reboot";

Missing "renesas,r9a06g032-reboot".

> +                       };
> +               };


Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 7/8] DT: arm: Add Renesas RZN1D-DB Board base file

[Geert Uytterhoeven]

Hi Michel,

On Thu, Mar 22, 2018 at 12:44 PM, Michel Pollet
<michel.pollet@bp.renesas.com> wrote:
> This adds a base device tree file for the RZN1-DB board, with only the
> basic support allowing the system to boot to a prompt. Only one UART is
> used, with only a single CPU running.
>
> Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>

Thanks for your patch!

> --- /dev/null
> +++ b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts
> @@ -0,0 +1,26 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for the RZN1D-DB Board
> + *
> + * Copyright (C) 2018 Renesas Electronics Europe Limited
> + *
> + */
> +
> +/dts-v1/;
> +
> +#include "r9a06g0xx.dtsi"
> +
> +/ {
> +       model = "RZN1D-DB Board";
> +       compatible = "renesas,rzn1d400-db", "renesas,r9a06g032", "renesas,rzn1";

"renesas,rzn1" is not documented.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 8/8] DT: arm: Add the RZN1D-DB Board to Renesas Makefile target

[Geert Uytterhoeven]

On Thu, Mar 22, 2018 at 12:44 PM, Michel Pollet
<michel.pollet@bp.renesas.com> wrote:
> This adds the newly added board to the Renesas built target
>
> Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

RE: [PATCH v2 3/8] DT: arm: renesas,r9a06g032: add the RZ/N1 bindings

[Michel Pollet]

Hi Geert,

Thanks for your review!

On  22 March 2018 12:37, Geert said:
> Hi Michel,
>
> On Thu, Mar 22, 2018 at 12:44 PM, Michel Pollet
> <michel.pollet@bp.renesas.com> wrote:
> > This documents the RZ/N1 bindings for both the RZ/N1 and the
> > RZN1D400-DB board.
> >
> > Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
>
> Thanks for your patch!
>
> > --- a/Documentation/devicetree/bindings/arm/shmobile.txt
> > +++ b/Documentation/devicetree/bindings/arm/shmobile.txt
> > @@ -47,7 +47,8 @@ SoCs:
> >      compatible = "renesas,r8a77980"
> >    - R-Car D3 (R8A77995)
> >      compatible = "renesas,r8a77995"
> > -
> > +  - RZ/N1D (R9A06G032)
> > +    compatible = "renesas,r9a06g032"
> >
> >  Boards:
> >
> > @@ -104,6 +105,8 @@ Boards:
> >      compatible = "renesas,porter", "renesas,r8a7791"
> >    - RSKRZA1 (YR0K77210C000BE)
> >      compatible = "renesas,rskrza1", "renesas,r7s72100"
> > +  - RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package)
>
> The official board part number (between parentheses) should be
> YCONNECT-IT-RZN1D?

I've checked this, and the YCONNECT is the /base board/ for this 'module', the module
is called RZN1D-DB.

>
> > +    compatible = "renesas,rzn1d400-db", "renesas,r9a06g032"
> >    - Salvator-X (RTP0RC7795SIPB0010S)
> >      compatible = "renesas,salvator-x", "renesas,r8a7795"
> >    - Salvator-X (RTP0RC7796SIPB0011S)
>
> Gr{oetje,eeting}s,
>
>                         Geert

Michel




Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.

RE: [PATCH v2 0/8] arm: Base support for Renesas RZN1D-DB Board

[Michel Pollet]

Replying to myself here, more or less to reflect further discussion on IRC related to where the
bindings goes. Also, to publicly acknowledge and thank Geert for tons of advice and comments
outside the email chain...

So, after further discussion on IRC, that's what I've been trying to do
[hope outlook doesn't mangle this]:
+---------------------------------+     +------------------------------------+     +--------------------------------+
|          r9a06g0xx.dtsi         |     |         r9a06g032.dtsi             |     |     r9a06g032-rzn1d-db.dts     |
|                                 |     |                                    |     |                                |
|   compatible=                   |     |  compatible=                       |     | compatible=                    |
|         "renesas,rzn1";         |     |        "renesas,r9a06g032",        |     |       "renesas,rzn1d-db",      |
|                                 +----->        "renesas,rzn1";             +----->       "renesas,r9a06g032",     |
|   ...                           |     |  ...                               |     |       "renesas,rzn1";          |
|   compatible=                   |     |  compatible=                       |     |                                |
|         "renesas,rzn1-reset";   |     |        "renesas,r9a06g032-reset",  |     |                                |
|                                 |     |        "renesas,rzn1-reset";       |     |                                |
|                                 |     |                                    |     |                                |
+---------------------------------+     +------------------------------------+     +--------------------------------+
      Family File, "rzn1" only                  Future, potential SoC                          Board File
                                                Specific override file

The idea is that the 1D and 1S share /everything/ apart from one extra QSPI, no DDR, one less CPU
and a few other bits and bobs. So the r9a06g0xx.dtsi will contain 98% of both SoC bindings. *Perhaps*
later I could add a r9a06g03[23].dtsi for SoC specific bindings, but currently that is not necessary, so we
Won't need that file.

If everyone happy with this? I've got a v3 simmering on the fire, but I'd really like everyone to be
happy with the proposed solution...

Cheers,
Michel

On 22 March 2018 11:45, I wrote:
> This series adds the plain basic support for booting a bare kernel on the
> RZ/N1D-DB Board. It's been trimmed to the strict minimum as a 'base',
> further patches that will add the rest of the support, pinctrl, clock
> architecture and quite a few others.
>
> Thanks for the comments on the previous version!
>
> v2:
>  + Fixes for suggestions by Simon Horman  + Fixes for suggestions by Rob
> Herring  + Fixes for suggestions by Geert Uytterhoeven  + Removed the
> mach file  + Added a MFD base for the sysctrl block  + Added a regmap based
> sub driver for the reboot handler  + Renamed the files to match shmobile
> conventions  + Adapted the compatible= strings to reflect 'family' vs 'part'
>    distinction.
>  + Removed the sysctrl.h file entirelly.
>  + Fixed every warnings from the DTC compiler on W=12 mode.
>  + Split the device-tree patches from the code.
>
> Michel Pollet (8):
>   DT: mfd: renesas,rzn1-sysctrl: document RZ/N1 sysctrl node
>   DT: reset: renesas,rzn1-reboot: document RZ/N1 reboot driver
>   DT: arm: renesas,r9a06g032: add the RZ/N1 bindings
>   reset: Renesas RZ/N1 reboot driver
>   arm: rzn1: Add the RZ/N1 arch to the shmobile Kconfig
>   DT: arm: Add Renesas RZ/N1 SoC base device tree file
>   DT: arm: Add Renesas RZN1D-DB Board base file
>   DT: arm: Add the RZN1D-DB Board to Renesas Makefile target
>
>  Documentation/devicetree/bindings/arm/shmobile.txt |   5 +-
>  .../bindings/mfd/renesas,rzn1-sysctrl.txt          |  22 +++++
>  .../bindings/power/renesas,rzn1-reboot.txt         |  22 +++++
>  arch/arm/boot/dts/Makefile                         |   1 +
>  arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts        |  26 +++++
>  arch/arm/boot/dts/r9a06g0xx.dtsi                   |  96 ++++++++++++++++++
>  arch/arm/mach-shmobile/Kconfig                     |   5 +
>  drivers/power/reset/Kconfig                        |   7 ++
>  drivers/power/reset/Makefile                       |   1 +
>  drivers/power/reset/rzn1-reboot.c                  | 109
> +++++++++++++++++++++
>  10 files changed, 293 insertions(+), 1 deletion(-)  create mode 100644
> Documentation/devicetree/bindings/mfd/renesas,rzn1-sysctrl.txt
>  create mode 100644
> Documentation/devicetree/bindings/power/renesas,rzn1-reboot.txt
>  create mode 100644 arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts
>  create mode 100644 arch/arm/boot/dts/r9a06g0xx.dtsi  create mode 100644
> drivers/power/reset/rzn1-reboot.c
>
> --
> 2.7.4




Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.