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From: Dmitry Osipenko <digetx@gmail.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Ulf Hansson" <ulf.hansson@linaro.org>,
	"Viresh Kumar" <vireshk@kernel.org>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Peter De Schrijver" <pdeschrijver@nvidia.com>,
	"Mikko Perttunen" <mperttunen@nvidia.com>,
	"Peter Chen" <peter.chen@kernel.org>,
	"Lee Jones" <lee.jones@linaro.org>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Nishanth Menon" <nm@ti.com>,
	"Adrian Hunter" <adrian.hunter@intel.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Michael Turquette" <mturquette@baylibre.com>
Cc: linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-usb@vger.kernel.org,
	linux-staging@lists.linux.dev, linux-pwm@vger.kernel.org,
	linux-mmc@vger.kernel.org, dri-devel@lists.freedesktop.org,
	devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
	Mark Brown <broonie@kernel.org>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Richard Weinberger <richard@nod.at>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Lucas Stach <dev@lynxeye.de>, Stefan Agner <stefan@agner.ch>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	David Heidelberg <david@ixit.cz>
Subject: [PATCH v12 19/35] mmc: sdhci-tegra: Add runtime PM and OPP support
Date: Mon, 20 Sep 2021 21:11:29 +0300	[thread overview]
Message-ID: <20210920181145.19543-20-digetx@gmail.com> (raw)
In-Reply-To: <20210920181145.19543-1-digetx@gmail.com>

The SDHCI on Tegra belongs to the core power domain and we're going to
enable GENPD support for the core domain. Now SDHCI must be resumed using
runtime PM API in order to initialize the SDHCI power state. The SDHCI
clock rate must be changed using OPP API that will reconfigure the power
domain performance state in accordance to the rate. Add runtime PM and OPP
support to the SDHCI driver.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 drivers/mmc/host/sdhci-tegra.c | 80 +++++++++++++++++++++++++++-------
 1 file changed, 64 insertions(+), 16 deletions(-)

diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index a5001875876b..71955150dc43 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -15,6 +15,8 @@
 #include <linux/of.h>
 #include <linux/of_device.h>
 #include <linux/pinctrl/consumer.h>
+#include <linux/pm_opp.h>
+#include <linux/pm_runtime.h>
 #include <linux/regulator/consumer.h>
 #include <linux/reset.h>
 #include <linux/mmc/card.h>
@@ -24,6 +26,8 @@
 #include <linux/gpio/consumer.h>
 #include <linux/ktime.h>
 
+#include <soc/tegra/common.h>
+
 #include "sdhci-pltfm.h"
 #include "cqhci.h"
 
@@ -760,7 +764,9 @@ static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 {
 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);
+	struct device *dev = mmc_dev(host->mmc);
 	unsigned long host_clk;
+	int err;
 
 	if (!clock)
 		return sdhci_set_clock(host, clock);
@@ -778,7 +784,12 @@ static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 	 * from clk_get_rate() is used.
 	 */
 	host_clk = tegra_host->ddr_signaling ? clock * 2 : clock;
-	clk_set_rate(pltfm_host->clk, host_clk);
+
+	err = dev_pm_opp_set_rate(dev, host_clk);
+	if (err)
+		dev_err(dev, "failed to set clk rate to %luHz: %d\n",
+			host_clk, err);
+
 	tegra_host->curr_clk_rate = host_clk;
 	if (tegra_host->ddr_signaling)
 		host->max_clk = host_clk;
@@ -1705,7 +1716,6 @@ static int sdhci_tegra_probe(struct platform_device *pdev)
 				   "failed to get clock\n");
 		goto err_clk_get;
 	}
-	clk_prepare_enable(clk);
 	pltfm_host->clk = clk;
 
 	tegra_host->rst = devm_reset_control_get_exclusive(&pdev->dev,
@@ -1716,15 +1726,25 @@ static int sdhci_tegra_probe(struct platform_device *pdev)
 		goto err_rst_get;
 	}
 
+	pm_runtime_enable(&pdev->dev);
+
+	rc = devm_tegra_core_dev_init_opp_table_common(&pdev->dev);
+	if (rc)
+		goto err_pm_get;
+
+	rc = pm_runtime_resume_and_get(&pdev->dev);
+	if (rc)
+		goto err_pm_get;
+
 	rc = reset_control_assert(tegra_host->rst);
 	if (rc)
-		goto err_rst_get;
+		goto err_rst_assert;
 
 	usleep_range(2000, 4000);
 
 	rc = reset_control_deassert(tegra_host->rst);
 	if (rc)
-		goto err_rst_get;
+		goto err_rst_assert;
 
 	usleep_range(2000, 4000);
 
@@ -1736,8 +1756,11 @@ static int sdhci_tegra_probe(struct platform_device *pdev)
 
 err_add_host:
 	reset_control_assert(tegra_host->rst);
+err_rst_assert:
+	pm_runtime_put(&pdev->dev);
+err_pm_get:
+	pm_runtime_disable(&pdev->dev);
 err_rst_get:
-	clk_disable_unprepare(pltfm_host->clk);
 err_clk_get:
 	clk_disable_unprepare(tegra_host->tmclk);
 err_power_req:
@@ -1756,19 +1779,37 @@ static int sdhci_tegra_remove(struct platform_device *pdev)
 
 	reset_control_assert(tegra_host->rst);
 	usleep_range(2000, 4000);
-	clk_disable_unprepare(pltfm_host->clk);
-	clk_disable_unprepare(tegra_host->tmclk);
 
+	pm_runtime_put(&pdev->dev);
+	pm_runtime_disable(&pdev->dev);
+
+	clk_disable_unprepare(tegra_host->tmclk);
 	sdhci_pltfm_free(pdev);
 
 	return 0;
 }
 
-#ifdef CONFIG_PM_SLEEP
-static int __maybe_unused sdhci_tegra_suspend(struct device *dev)
+static int __maybe_unused sdhci_tegra_runtime_suspend(struct device *dev)
 {
 	struct sdhci_host *host = dev_get_drvdata(dev);
 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+
+	clk_disable_unprepare(pltfm_host->clk);
+
+	return 0;
+}
+
+static int __maybe_unused sdhci_tegra_runtime_resume(struct device *dev)
+{
+	struct sdhci_host *host = dev_get_drvdata(dev);
+	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+
+	return clk_prepare_enable(pltfm_host->clk);
+}
+
+static int __maybe_unused sdhci_tegra_suspend(struct device *dev)
+{
+	struct sdhci_host *host = dev_get_drvdata(dev);
 	int ret;
 
 	if (host->mmc->caps2 & MMC_CAP2_CQE) {
@@ -1783,17 +1824,22 @@ static int __maybe_unused sdhci_tegra_suspend(struct device *dev)
 		return ret;
 	}
 
-	clk_disable_unprepare(pltfm_host->clk);
+	ret = pm_runtime_force_suspend(dev);
+	if (ret) {
+		sdhci_resume_host(host);
+		cqhci_resume(host->mmc);
+		return ret;
+	}
+
 	return 0;
 }
 
 static int __maybe_unused sdhci_tegra_resume(struct device *dev)
 {
 	struct sdhci_host *host = dev_get_drvdata(dev);
-	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 	int ret;
 
-	ret = clk_prepare_enable(pltfm_host->clk);
+	ret = pm_runtime_force_resume(dev);
 	if (ret)
 		return ret;
 
@@ -1812,13 +1858,15 @@ static int __maybe_unused sdhci_tegra_resume(struct device *dev)
 suspend_host:
 	sdhci_suspend_host(host);
 disable_clk:
-	clk_disable_unprepare(pltfm_host->clk);
+	pm_runtime_force_suspend(dev);
 	return ret;
 }
-#endif
 
-static SIMPLE_DEV_PM_OPS(sdhci_tegra_dev_pm_ops, sdhci_tegra_suspend,
-			 sdhci_tegra_resume);
+static const struct dev_pm_ops sdhci_tegra_dev_pm_ops = {
+	SET_RUNTIME_PM_OPS(sdhci_tegra_runtime_suspend, sdhci_tegra_runtime_resume,
+			   NULL)
+	SET_SYSTEM_SLEEP_PM_OPS(sdhci_tegra_suspend, sdhci_tegra_resume)
+};
 
 static struct platform_driver sdhci_tegra_driver = {
 	.driver		= {
-- 
2.32.0


  parent reply	other threads:[~2021-09-21  2:44 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-20 18:11 [PATCH v12 00/35] NVIDIA Tegra power management patches for 5.16 Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 01/35] opp: Change type of dev_pm_opp_attach_genpd(names) argument Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 02/35] soc/tegra: Add devm_tegra_core_dev_init_opp_table_common() Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 03/35] soc/tegra: pmc: Disable PMC state syncing Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 04/35] soc/tegra: Don't print error message when OPPs not available Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 05/35] dt-bindings: clock: tegra-car: Document new clock sub-nodes Dmitry Osipenko
2021-09-23 21:09   ` Rob Herring
2021-10-15  0:16   ` Stephen Boyd
2021-10-15  0:43     ` Dmitry Osipenko
2021-10-15  0:45       ` Stephen Boyd
2021-10-15  1:02         ` Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 06/35] clk: tegra: Support runtime PM and power domain Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 07/35] dt-bindings: host1x: Document OPP and power domain properties Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 08/35] dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 09/35] gpu: host1x: Add runtime PM and OPP support Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 10/35] gpu: host1x: Add host1x_channel_stop() Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 11/35] drm/tegra: dc: Support OPP and SoC core voltage scaling Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 12/35] drm/tegra: hdmi: Add OPP support Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 13/35] drm/tegra: gr2d: Support generic power domain and runtime PM Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 14/35] drm/tegra: gr3d: " Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 15/35] drm/tegra: vic: Support system suspend Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 16/35] usb: chipidea: tegra: Add runtime PM and OPP support Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 17/35] bus: tegra-gmi: " Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 18/35] pwm: tegra: " Dmitry Osipenko
2021-09-20 18:11 ` Dmitry Osipenko [this message]
2021-09-20 18:11 ` [PATCH v12 20/35] mtd: rawnand: " Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 21/35] spi: tegra20-slink: Add " Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 22/35] media: dt: bindings: tegra-vde: Convert to schema Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 23/35] media: dt: bindings: tegra-vde: Document OPP and power domain Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 24/35] media: staging: tegra-vde: Support generic " Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 25/35] soc/tegra: fuse: Reset hardware Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 26/35] soc/tegra: fuse: Use resource-managed helpers Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 27/35] soc/tegra: regulators: Prepare for suspend Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 28/35] soc/tegra: pmc: Rename 3d power domains Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 29/35] soc/tegra: pmc: Rename core power domain Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 30/35] soc/tegra: pmc: Enable core domain support for Tegra20 and Tegra30 Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 31/35] ARM: tegra: Add OPP tables and power domains to Tegra20 device-trees Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 32/35] ARM: tegra: Add OPP tables and power domains to Tegra30 device-trees Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 33/35] ARM: tegra: Add Memory Client resets to Tegra20 GR2D, GR3D and Host1x Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 34/35] ARM: tegra: Add Memory Client resets to Tegra30 " Dmitry Osipenko
2021-09-20 18:11 ` [PATCH v12 35/35] ARM: tegra20/30: Disable unused host1x hardware Dmitry Osipenko

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