[PATCH v2 1/2] dt-bindings: pwm: imx: add i.MX8QXP compatible

[PATCH v2 1/2] dt-bindings: pwm: imx: add i.MX8QXP compatible

[Alexander Stein]

i.MX8QXP compatible is missing in the list, add it.

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
---
Changes in v2:
* Add power-domains property

 Documentation/devicetree/bindings/pwm/imx-pwm.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/pwm/imx-pwm.yaml b/Documentation/devicetree/bindings/pwm/imx-pwm.yaml
index b3da4e629341..c01dff3b7f84 100644
--- a/Documentation/devicetree/bindings/pwm/imx-pwm.yaml
+++ b/Documentation/devicetree/bindings/pwm/imx-pwm.yaml
@@ -43,6 +43,7 @@ properties:
               - fsl,imx8mn-pwm
               - fsl,imx8mp-pwm
               - fsl,imx8mq-pwm
+              - fsl,imx8qxp-pwm
           - const: fsl,imx27-pwm
 
   reg:
@@ -61,6 +62,9 @@ properties:
   interrupts:
     maxItems: 1
 
+  power-domains:
+    maxItems: 1
+
 required:
   - compatible
   - reg
-- 
2.34.1

[PATCH v2 2/2] arm64: dts: imx8qxp: add adma_pwm in adma

[Alexander Stein]

Add PWM device and the corresponding clock gating device in adma subsystem.

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
---
* New in v2

 .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 25 +++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index 2dce8f2ee3ea..7d5f96c99020 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -124,6 +124,19 @@ lpuart3: serial@5a090000 {
 		status = "disabled";
 	};
 
+	adma_pwm: pwm@5a190000 {
+		compatible = "fsl,imx8qxp-pwm", "fsl,imx27-pwm";
+		reg = <0x5a190000 0x1000>;
+		interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&adma_pwm_lpcg 1>,
+			 <&adma_pwm_lpcg 0>;
+		clock-names = "ipg", "per";
+		assigned-clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>;
+		assigned-clock-rates = <24000000>;
+		#pwm-cells = <2>;
+		power-domains = <&pd IMX_SC_R_LCD_0_PWM_0>;
+	};
+
 	spi0_lpcg: clock-controller@5a400000 {
 		compatible = "fsl,imx8qxp-lpcg";
 		reg = <0x5a400000 0x10000>;
@@ -220,6 +233,18 @@ uart3_lpcg: clock-controller@5a490000 {
 		power-domains = <&pd IMX_SC_R_UART_3>;
 	};
 
+	adma_pwm_lpcg: clock-controller@5a590000 {
+		compatible = "fsl,imx8qxp-lpcg";
+		reg = <0x5a590000 0x10000>;
+		#clock-cells = <1>;
+		clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>,
+			 <&dma_ipg_clk>;
+		clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>;
+		clock-output-names = "adma_pwm_lpcg_clk",
+				     "adma_pwm_lpcg_ipg_clk";
+		power-domains = <&pd IMX_SC_R_LCD_0_PWM_0>;
+	};
+
 	i2c0: i2c@5a800000 {
 		reg = <0x5a800000 0x4000>;
 		interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
-- 
2.34.1

Re: [PATCH v2 1/2] dt-bindings: pwm: imx: add i.MX8QXP compatible

[Krzysztof Kozlowski]

On 24/04/2023 10:21, Alexander Stein wrote:
> i.MX8QXP compatible is missing in the list, add it.
> 
> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> ---
> Changes in v2:
> * Add power-domains property


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: [PATCH v2 2/2] arm64: dts: imx8qxp: add adma_pwm in adma

[Alexander Stein]

Hi,

Am Montag, 24. April 2023, 10:21:08 CEST schrieb Alexander Stein:
> Add PWM device and the corresponding clock gating device in adma subsystem.

Gentle ping.

Best regards,
Alexander

> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> ---
> * New in v2
> 
>  .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 25 +++++++++++++++++++
>  1 file changed, 25 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index
> 2dce8f2ee3ea..7d5f96c99020 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> @@ -124,6 +124,19 @@ lpuart3: serial@5a090000 {
>  		status = "disabled";
>  	};
> 
> +	adma_pwm: pwm@5a190000 {
> +		compatible = "fsl,imx8qxp-pwm", "fsl,imx27-pwm";
> +		reg = <0x5a190000 0x1000>;
> +		interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&adma_pwm_lpcg 1>,
> +			 <&adma_pwm_lpcg 0>;
> +		clock-names = "ipg", "per";
> +		assigned-clocks = <&clk IMX_SC_R_LCD_0_PWM_0 
IMX_SC_PM_CLK_PER>;
> +		assigned-clock-rates = <24000000>;
> +		#pwm-cells = <2>;
> +		power-domains = <&pd IMX_SC_R_LCD_0_PWM_0>;
> +	};
> +
>  	spi0_lpcg: clock-controller@5a400000 {
>  		compatible = "fsl,imx8qxp-lpcg";
>  		reg = <0x5a400000 0x10000>;
> @@ -220,6 +233,18 @@ uart3_lpcg: clock-controller@5a490000 {
>  		power-domains = <&pd IMX_SC_R_UART_3>;
>  	};
> 
> +	adma_pwm_lpcg: clock-controller@5a590000 {
> +		compatible = "fsl,imx8qxp-lpcg";
> +		reg = <0x5a590000 0x10000>;
> +		#clock-cells = <1>;
> +		clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>,
> +			 <&dma_ipg_clk>;
> +		clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>;
> +		clock-output-names = "adma_pwm_lpcg_clk",
> +				     "adma_pwm_lpcg_ipg_clk";
> +		power-domains = <&pd IMX_SC_R_LCD_0_PWM_0>;
> +	};
> +
>  	i2c0: i2c@5a800000 {
>  		reg = <0x5a800000 0x4000>;
>  		interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;


-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/

Re: [PATCH v2 1/2] dt-bindings: pwm: imx: add i.MX8QXP compatible

[Uwe Kleine-König]

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On Mon, Apr 24, 2023 at 10:21:07AM +0200, Alexander Stein wrote:
> i.MX8QXP compatible is missing in the list, add it.
> 
> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>

Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

Thanks
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

Re: [PATCH v2 2/2] arm64: dts: imx8qxp: add adma_pwm in adma

[Shawn Guo]

On Mon, Apr 24, 2023 at 10:21:08AM +0200, Alexander Stein wrote:
> Add PWM device and the corresponding clock gating device in adma subsystem.
> 
> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>

Looks good to me.  I will pick it up after dt-bindings one gets
accepted/picked first.

Shawn

> ---
> * New in v2
> 
>  .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 25 +++++++++++++++++++
>  1 file changed, 25 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> index 2dce8f2ee3ea..7d5f96c99020 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> @@ -124,6 +124,19 @@ lpuart3: serial@5a090000 {
>  		status = "disabled";
>  	};
>  
> +	adma_pwm: pwm@5a190000 {
> +		compatible = "fsl,imx8qxp-pwm", "fsl,imx27-pwm";
> +		reg = <0x5a190000 0x1000>;
> +		interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&adma_pwm_lpcg 1>,
> +			 <&adma_pwm_lpcg 0>;
> +		clock-names = "ipg", "per";
> +		assigned-clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>;
> +		assigned-clock-rates = <24000000>;
> +		#pwm-cells = <2>;
> +		power-domains = <&pd IMX_SC_R_LCD_0_PWM_0>;
> +	};
> +
>  	spi0_lpcg: clock-controller@5a400000 {
>  		compatible = "fsl,imx8qxp-lpcg";
>  		reg = <0x5a400000 0x10000>;
> @@ -220,6 +233,18 @@ uart3_lpcg: clock-controller@5a490000 {
>  		power-domains = <&pd IMX_SC_R_UART_3>;
>  	};
>  
> +	adma_pwm_lpcg: clock-controller@5a590000 {
> +		compatible = "fsl,imx8qxp-lpcg";
> +		reg = <0x5a590000 0x10000>;
> +		#clock-cells = <1>;
> +		clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>,
> +			 <&dma_ipg_clk>;
> +		clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>;
> +		clock-output-names = "adma_pwm_lpcg_clk",
> +				     "adma_pwm_lpcg_ipg_clk";
> +		power-domains = <&pd IMX_SC_R_LCD_0_PWM_0>;
> +	};
> +
>  	i2c0: i2c@5a800000 {
>  		reg = <0x5a800000 0x4000>;
>  		interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
> -- 
> 2.34.1
> 

Re: (subset) [PATCH v2 1/2] dt-bindings: pwm: imx: add i.MX8QXP compatible

[Thierry Reding]

On Mon, 24 Apr 2023 10:21:07 +0200, Alexander Stein wrote:
> i.MX8QXP compatible is missing in the list, add it.
> 
> 

Applied, thanks!

[1/2] dt-bindings: pwm: imx: add i.MX8QXP compatible
      commit: c799ad062a75858e10a7626e20233e6e94dbf554

Best regards,
-- 
Thierry Reding <thierry.reding@gmail.com>

Re: [PATCH v2 2/2] arm64: dts: imx8qxp: add adma_pwm in adma

[Alexander Stein]

Hi Shawn,

Am Sonntag, 4. Juni 2023, 11:50:38 CEST schrieb Shawn Guo:
> On Mon, Apr 24, 2023 at 10:21:08AM +0200, Alexander Stein wrote:
> > Add PWM device and the corresponding clock gating device in adma
> > subsystem.
> > 
> > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> 
> Looks good to me.  I will pick it up after dt-bindings one gets
> accepted/picked first.

Did this get missed accidentally? Patch 1 was picked by Thierry already.

Best regards,
Alexander

> Shawn
> 
> > ---
> > * New in v2
> > 
> >  .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 25 +++++++++++++++++++
> >  1 file changed, 25 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index
> > 2dce8f2ee3ea..7d5f96c99020 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> > @@ -124,6 +124,19 @@ lpuart3: serial@5a090000 {
> > 
> >  		status = "disabled";
> >  	
> >  	};
> > 
> > +	adma_pwm: pwm@5a190000 {
> > +		compatible = "fsl,imx8qxp-pwm", "fsl,imx27-pwm";
> > +		reg = <0x5a190000 0x1000>;
> > +		interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> > +		clocks = <&adma_pwm_lpcg 1>,
> > +			 <&adma_pwm_lpcg 0>;
> > +		clock-names = "ipg", "per";
> > +		assigned-clocks = <&clk IMX_SC_R_LCD_0_PWM_0 
IMX_SC_PM_CLK_PER>;
> > +		assigned-clock-rates = <24000000>;
> > +		#pwm-cells = <2>;
> > +		power-domains = <&pd IMX_SC_R_LCD_0_PWM_0>;
> > +	};
> > +
> > 
> >  	spi0_lpcg: clock-controller@5a400000 {
> >  	
> >  		compatible = "fsl,imx8qxp-lpcg";
> >  		reg = <0x5a400000 0x10000>;
> > 
> > @@ -220,6 +233,18 @@ uart3_lpcg: clock-controller@5a490000 {
> > 
> >  		power-domains = <&pd IMX_SC_R_UART_3>;
> >  	
> >  	};
> > 
> > +	adma_pwm_lpcg: clock-controller@5a590000 {
> > +		compatible = "fsl,imx8qxp-lpcg";
> > +		reg = <0x5a590000 0x10000>;
> > +		#clock-cells = <1>;
> > +		clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>,
> > +			 <&dma_ipg_clk>;
> > +		clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>;
> > +		clock-output-names = "adma_pwm_lpcg_clk",
> > +				     "adma_pwm_lpcg_ipg_clk";
> > +		power-domains = <&pd IMX_SC_R_LCD_0_PWM_0>;
> > +	};
> > +
> > 
> >  	i2c0: i2c@5a800000 {
> >  	
> >  		reg = <0x5a800000 0x4000>;
> >  		interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;


-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/

Re: [PATCH v2 2/2] arm64: dts: imx8qxp: add adma_pwm in adma

[Shawn Guo]

On Thu, Aug 17, 2023 at 10:03:20AM +0200, Alexander Stein wrote:
> Hi Shawn,
> 
> Am Sonntag, 4. Juni 2023, 11:50:38 CEST schrieb Shawn Guo:
> > On Mon, Apr 24, 2023 at 10:21:08AM +0200, Alexander Stein wrote:
> > > Add PWM device and the corresponding clock gating device in adma
> > > subsystem.
> > > 
> > > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> > 
> > Looks good to me.  I will pick it up after dt-bindings one gets
> > accepted/picked first.
> 
> Did this get missed accidentally? Patch 1 was picked by Thierry already.

Sorry, indeed!

Applied, thanks!

Shawn