From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Mason Yang <masonccyang@mxic.com.tw>,
broonie@kernel.org, marek.vasut@gmail.com,
linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
bbrezillon@kernel.org, linux-renesas-soc@vger.kernel.org,
Geert Uytterhoeven <geert+renesas@glider.be>
Cc: juliensu@mxic.com.tw, Simon Horman <horms@verge.net.au>,
zhengxunli@mxic.com.tw
Subject: Re: [PATCH v8 1/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI controller driver
Date: Thu, 7 Mar 2019 20:50:37 +0300 [thread overview]
Message-ID: <0c54ee2c-016a-bc8e-33ae-fbd04191cc49@cogentembedded.com> (raw)
In-Reply-To: <1548658158-5460-2-git-send-email-masonccyang@mxic.com.tw>
Hello!
On 01/28/2019 09:49 AM, Mason Yang wrote:
> Add a driver for Renesas R-Car Gen3 RPC-IF SPI controller.
>
> Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
[...]
> diff --git a/drivers/spi/spi-renesas-rpc.c b/drivers/spi/spi-renesas-rpc.c
> new file mode 100644
> index 0000000..ea12017
> --- /dev/null
> +++ b/drivers/spi/spi-renesas-rpc.c
> @@ -0,0 +1,804 @@
[...]
> +static void rpc_spi_hw_init(struct rpc_spi *rpc)
> +{
> + //
> + // NOTE: The 0x260 are undocumented bits, but they must be set.
> + // RPC_PHYCNT_STRTIM is strobe timing adjustment bit,
> + // 0x0 : the delay is biggest,
> + // 0x1 : the delay is 2nd biggest,
> + // On H3 ES1.x, the value should be 0, while on others,
> + // the value should be 6.
> + //
> + regmap_write(rpc->regmap, RPC_PHYCNT, RPC_PHYCNT_CAL |
> + RPC_PHYCNT_STRTIM(6) | 0x260);
> +
> + //
> + // NOTE: The 0x1511144 are undocumented bits, but they must be set
> + // for RPC_PHYOFFSET1.
> + // The 0x31 are undocumented bits, but they must be set
> + // for RPC_PHYOFFSET2.
> + //
> + regmap_write(rpc->regmap, RPC_PHYOFFSET1, RPC_PHYOFFSET1_DDRTMG(3) |
> + 0x1511144);
> + regmap_write(rpc->regmap, RPC_PHYOFFSET2, 0x31 |
> + RPC_PHYOFFSET2_OCTTMG(4));
> + regmap_write(rpc->regmap, RPC_SSLDR, RPC_SSLDR_SPNDL(7) |
> + RPC_SSLDR_SLNDL(7) | RPC_SSLDR_SCKDL(7));
> + regmap_write(rpc->regmap, RPC_CMNCR, RPC_CMNCR_MD | RPC_CMNCR_SFDE |
> + RPC_CMNCR_MOIIO_HIZ | RPC_CMNCR_IOFV_HIZ |
> + RPC_CMNCR_BSZ(0));
> +}
We clearly need runtime PM get/put() calls around this code. Otherwise,
we're dependant on U-Boot leaving the clocks enabled...
[...]
MBR, Sergei
next prev parent reply other threads:[~2019-03-07 17:50 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-28 6:49 [PATCH v8 0/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI driver Mason Yang
2019-01-28 6:49 ` [PATCH v8 1/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI controller driver Mason Yang
2019-02-12 14:22 ` Applied "spi: Add Renesas R-Car Gen3 RPC-IF SPI controller driver" to the spi tree Mark Brown
2019-02-12 14:33 ` Marek Vasut
2019-02-12 14:43 ` Mark Brown
2019-02-12 16:49 ` Mark Brown
[not found] ` <OF9C8DA179.15D69C0A-ON482583A0.00283EB5-482583A0.002E45C8@mxic.com.tw>
2019-02-13 12:16 ` Mark Brown
2019-02-13 12:37 ` Marek Vasut
[not found] ` <OF9B3A3A20.C0BF34B8-ON482583A1.002D5F3B-482583A1.00329653@mxic.com.tw>
2019-02-14 10:52 ` Marek Vasut
2019-03-07 17:50 ` Sergei Shtylyov [this message]
2019-03-08 9:14 ` [PATCH v8 1/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI controller driver Geert Uytterhoeven
2019-03-08 17:32 ` Sergei Shtylyov
2019-03-22 17:43 ` Sergei Shtylyov
[not found] ` <OF7C1EB3FC.1ABCD2C2-ON482583C8.002D7A69-482583C8.002E899C@mxic.com.tw>
2019-03-25 19:12 ` Sergei Shtylyov
2019-03-26 16:42 ` Sergei Shtylyov
[not found] ` <OF5BDFBDAB.B66A1ADE-ON482583CA.0006C5C2-482583CA.0008788E@mxic.com.tw>
2019-03-27 10:20 ` Sergei Shtylyov
2019-01-28 6:49 ` [PATCH v8 2/2] dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings Mason Yang
2019-02-12 14:22 ` Applied "dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings" to the spi tree Mark Brown
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