* [PATCH 0/3] Add PCIe support for HiHope RZ/G2M platform
@ 2019-06-07 7:13 Biju Das
2019-06-07 7:13 ` [PATCH 1/3] arm64: dts: renesas: r8a774a1: Add PCIe device nodes Biju Das
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Biju Das @ 2019-06-07 7:13 UTC (permalink / raw)
To: Rob Herring, Mark Rutland
Cc: Biju Das, Simon Horman, Magnus Damm, linux-renesas-soc,
devicetree, Geert Uytterhoeven, Chris Paterson, Fabrizio Castro
This patch series adds PCIe[01] support for HiHope RZ/G2M with sub board.
This patchset is based on renesas-dev branch.
Biju Das (3):
arm64: dts: renesas: r8a774a1: Add PCIe device nodes
arm64: dts: renesas: hihope-common: Declare pcie bus clock
arm64: dts: renesas: hihope-rzg2-ex: Enable PCIe support
arch/arm64/boot/dts/renesas/hihope-common.dtsi | 4 ++
arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi | 8 ++++
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 54 +++++++++++++++++++++++++
3 files changed, 66 insertions(+)
--
2.7.4
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/3] arm64: dts: renesas: r8a774a1: Add PCIe device nodes
2019-06-07 7:13 [PATCH 0/3] Add PCIe support for HiHope RZ/G2M platform Biju Das
@ 2019-06-07 7:13 ` Biju Das
2019-06-12 7:56 ` Geert Uytterhoeven
2019-06-07 7:13 ` [PATCH 2/3] arm64: dts: renesas: hihope-common: Declare pcie bus clock Biju Das
2019-06-07 7:13 ` [PATCH 3/3] arm64: dts: renesas: hihope-rzg2-ex: Enable PCIe support Biju Das
2 siblings, 1 reply; 10+ messages in thread
From: Biju Das @ 2019-06-07 7:13 UTC (permalink / raw)
To: Rob Herring, Mark Rutland
Cc: Biju Das, Simon Horman, Magnus Damm, linux-renesas-soc,
devicetree, Geert Uytterhoeven, Chris Paterson, Fabrizio Castro
This patch adds PCIe{0,1} device nodes for R8A774A1 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 54 +++++++++++++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index 4b1332f..eb9f299 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -1914,6 +1914,60 @@
resets = <&cpg 408>;
};
+ pciec0: pcie@fe000000 {
+ compatible = "renesas,pcie-r8a774a1",
+ "renesas,pcie-rcar-gen3";
+ reg = <0 0xfe000000 0 0x80000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
+ 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
+ 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
+ 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
+ resets = <&cpg 319>;
+ status = "disabled";
+ };
+
+ pciec1: pcie@ee800000 {
+ compatible = "renesas,pcie-r8a774a1",
+ "renesas,pcie-rcar-gen3";
+ reg = <0 0xee800000 0 0x80000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
+ 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
+ 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
+ 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
+ status = "disabled";
+ };
+
fdp1@fe940000 {
compatible = "renesas,fdp1";
reg = <0 0xfe940000 0 0x2400>;
--
2.7.4
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/3] arm64: dts: renesas: hihope-common: Declare pcie bus clock
2019-06-07 7:13 [PATCH 0/3] Add PCIe support for HiHope RZ/G2M platform Biju Das
2019-06-07 7:13 ` [PATCH 1/3] arm64: dts: renesas: r8a774a1: Add PCIe device nodes Biju Das
@ 2019-06-07 7:13 ` Biju Das
2019-06-12 8:01 ` Geert Uytterhoeven
2019-06-12 11:50 ` Simon Horman
2019-06-07 7:13 ` [PATCH 3/3] arm64: dts: renesas: hihope-rzg2-ex: Enable PCIe support Biju Das
2 siblings, 2 replies; 10+ messages in thread
From: Biju Das @ 2019-06-07 7:13 UTC (permalink / raw)
To: Rob Herring, Mark Rutland
Cc: Biju Das, Simon Horman, Magnus Damm, linux-renesas-soc,
devicetree, Geert Uytterhoeven, Chris Paterson, Fabrizio Castro
Declare pcie bus clock, since it is generated on the HiHope RZ/G2M main
board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/hihope-common.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/hihope-common.dtsi b/arch/arm64/boot/dts/renesas/hihope-common.dtsi
index 4cc924d..95ac6fa 100644
--- a/arch/arm64/boot/dts/renesas/hihope-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/hihope-common.dtsi
@@ -26,6 +26,10 @@
clock-frequency = <32768>;
};
+&pcie_bus_clk {
+ clock-frequency = <100000000>;
+};
+
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
--
2.7.4
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/3] arm64: dts: renesas: hihope-rzg2-ex: Enable PCIe support
2019-06-07 7:13 [PATCH 0/3] Add PCIe support for HiHope RZ/G2M platform Biju Das
2019-06-07 7:13 ` [PATCH 1/3] arm64: dts: renesas: r8a774a1: Add PCIe device nodes Biju Das
2019-06-07 7:13 ` [PATCH 2/3] arm64: dts: renesas: hihope-common: Declare pcie bus clock Biju Das
@ 2019-06-07 7:13 ` Biju Das
2019-06-12 8:01 ` Geert Uytterhoeven
2019-06-12 11:50 ` Simon Horman
2 siblings, 2 replies; 10+ messages in thread
From: Biju Das @ 2019-06-07 7:13 UTC (permalink / raw)
To: Rob Herring, Mark Rutland
Cc: Biju Das, Simon Horman, Magnus Damm, linux-renesas-soc,
devicetree, Geert Uytterhoeven, Chris Paterson, Fabrizio Castro
This patch enables PCIEC[01] PCI express controller on the sub board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
index b1e45944..07a6eea 100644
--- a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
+++ b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
@@ -31,6 +31,14 @@
};
};
+&pciec0 {
+ status = "okay";
+};
+
+&pciec1 {
+ status = "okay";
+};
+
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
--
2.7.4
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 1/3] arm64: dts: renesas: r8a774a1: Add PCIe device nodes
2019-06-07 7:13 ` [PATCH 1/3] arm64: dts: renesas: r8a774a1: Add PCIe device nodes Biju Das
@ 2019-06-12 7:56 ` Geert Uytterhoeven
2019-06-12 11:48 ` Simon Horman
0 siblings, 1 reply; 10+ messages in thread
From: Geert Uytterhoeven @ 2019-06-12 7:56 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Mark Rutland, Simon Horman, Magnus Damm,
Linux-Renesas,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Chris Paterson, Fabrizio Castro
On Fri, Jun 7, 2019 at 9:18 AM Biju Das <biju.das@bp.renesas.com> wrote:
> This patch adds PCIe{0,1} device nodes for R8A774A1 SoC.
>
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] arm64: dts: renesas: hihope-rzg2-ex: Enable PCIe support
2019-06-07 7:13 ` [PATCH 3/3] arm64: dts: renesas: hihope-rzg2-ex: Enable PCIe support Biju Das
@ 2019-06-12 8:01 ` Geert Uytterhoeven
2019-06-12 11:50 ` Simon Horman
1 sibling, 0 replies; 10+ messages in thread
From: Geert Uytterhoeven @ 2019-06-12 8:01 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Mark Rutland, Simon Horman, Magnus Damm,
Linux-Renesas,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Geert Uytterhoeven, Chris Paterson, Fabrizio Castro
On Fri, Jun 7, 2019 at 9:18 AM Biju Das <biju.das@bp.renesas.com> wrote:
> This patch enables PCIEC[01] PCI express controller on the sub board.
>
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/3] arm64: dts: renesas: hihope-common: Declare pcie bus clock
2019-06-07 7:13 ` [PATCH 2/3] arm64: dts: renesas: hihope-common: Declare pcie bus clock Biju Das
@ 2019-06-12 8:01 ` Geert Uytterhoeven
2019-06-12 11:50 ` Simon Horman
1 sibling, 0 replies; 10+ messages in thread
From: Geert Uytterhoeven @ 2019-06-12 8:01 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Mark Rutland, Simon Horman, Magnus Damm,
Linux-Renesas,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Geert Uytterhoeven, Chris Paterson, Fabrizio Castro
On Fri, Jun 7, 2019 at 9:18 AM Biju Das <biju.das@bp.renesas.com> wrote:
> Declare pcie bus clock, since it is generated on the HiHope RZ/G2M main
> board.
>
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/3] arm64: dts: renesas: r8a774a1: Add PCIe device nodes
2019-06-12 7:56 ` Geert Uytterhoeven
@ 2019-06-12 11:48 ` Simon Horman
0 siblings, 0 replies; 10+ messages in thread
From: Simon Horman @ 2019-06-12 11:48 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Biju Das, Rob Herring, Mark Rutland, Magnus Damm, Linux-Renesas,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Chris Paterson, Fabrizio Castro
On Wed, Jun 12, 2019 at 09:56:00AM +0200, Geert Uytterhoeven wrote:
> On Fri, Jun 7, 2019 at 9:18 AM Biju Das <biju.das@bp.renesas.com> wrote:
> > This patch adds PCIe{0,1} device nodes for R8A774A1 SoC.
> >
> > Signed-off-by: Biju Das <biju.das@bp.renesas.com>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Thanks, applied for inclusion in v5.3.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/3] arm64: dts: renesas: hihope-common: Declare pcie bus clock
2019-06-07 7:13 ` [PATCH 2/3] arm64: dts: renesas: hihope-common: Declare pcie bus clock Biju Das
2019-06-12 8:01 ` Geert Uytterhoeven
@ 2019-06-12 11:50 ` Simon Horman
1 sibling, 0 replies; 10+ messages in thread
From: Simon Horman @ 2019-06-12 11:50 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Mark Rutland, Magnus Damm, linux-renesas-soc,
devicetree, Geert Uytterhoeven, Chris Paterson, Fabrizio Castro
On Fri, Jun 07, 2019 at 08:13:58AM +0100, Biju Das wrote:
> Declare pcie bus clock, since it is generated on the HiHope RZ/G2M main
> board.
>
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Thanks, applied for inclusion in v5.3.
> ---
> arch/arm64/boot/dts/renesas/hihope-common.dtsi | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/hihope-common.dtsi b/arch/arm64/boot/dts/renesas/hihope-common.dtsi
> index 4cc924d..95ac6fa 100644
> --- a/arch/arm64/boot/dts/renesas/hihope-common.dtsi
> +++ b/arch/arm64/boot/dts/renesas/hihope-common.dtsi
> @@ -26,6 +26,10 @@
> clock-frequency = <32768>;
> };
>
> +&pcie_bus_clk {
> + clock-frequency = <100000000>;
> +};
> +
> &pfc {
> pinctrl-0 = <&scif_clk_pins>;
> pinctrl-names = "default";
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] arm64: dts: renesas: hihope-rzg2-ex: Enable PCIe support
2019-06-07 7:13 ` [PATCH 3/3] arm64: dts: renesas: hihope-rzg2-ex: Enable PCIe support Biju Das
2019-06-12 8:01 ` Geert Uytterhoeven
@ 2019-06-12 11:50 ` Simon Horman
1 sibling, 0 replies; 10+ messages in thread
From: Simon Horman @ 2019-06-12 11:50 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Mark Rutland, Magnus Damm, linux-renesas-soc,
devicetree, Geert Uytterhoeven, Chris Paterson, Fabrizio Castro
On Fri, Jun 07, 2019 at 08:13:59AM +0100, Biju Das wrote:
> This patch enables PCIEC[01] PCI express controller on the sub board.
>
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Thanks, applied for inclusion in v5.3.
> ---
> arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
> index b1e45944..07a6eea 100644
> --- a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
> +++ b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
> @@ -31,6 +31,14 @@
> };
> };
>
> +&pciec0 {
> + status = "okay";
> +};
> +
> +&pciec1 {
> + status = "okay";
> +};
> +
> &pfc {
> pinctrl-0 = <&scif_clk_pins>;
> pinctrl-names = "default";
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2019-06-12 11:50 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
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2019-06-07 7:13 [PATCH 0/3] Add PCIe support for HiHope RZ/G2M platform Biju Das
2019-06-07 7:13 ` [PATCH 1/3] arm64: dts: renesas: r8a774a1: Add PCIe device nodes Biju Das
2019-06-12 7:56 ` Geert Uytterhoeven
2019-06-12 11:48 ` Simon Horman
2019-06-07 7:13 ` [PATCH 2/3] arm64: dts: renesas: hihope-common: Declare pcie bus clock Biju Das
2019-06-12 8:01 ` Geert Uytterhoeven
2019-06-12 11:50 ` Simon Horman
2019-06-07 7:13 ` [PATCH 3/3] arm64: dts: renesas: hihope-rzg2-ex: Enable PCIe support Biju Das
2019-06-12 8:01 ` Geert Uytterhoeven
2019-06-12 11:50 ` Simon Horman
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