From: Biju Das <biju.das@bp.renesas.com>
To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>
Cc: Biju Das <biju.das@bp.renesas.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Simon Horman <horms@verge.net.au>,
Magnus Damm <magnus.damm@gmail.com>,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
Chris Paterson <Chris.Paterson2@renesas.com>,
Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Subject: [PATCH 4/4] arm64: dts: renesas: r8a774b1: Add TMU device nodes
Date: Mon, 23 Sep 2019 15:57:28 +0100 [thread overview]
Message-ID: <1569250648-33857-5-git-send-email-biju.das@bp.renesas.com> (raw)
In-Reply-To: <1569250648-33857-1-git-send-email-biju.das@bp.renesas.com>
This patch adds TMU[01234] device tree nodes to the
r8a774b1 SoC specific DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 65 +++++++++++++++++++++++++++++++
1 file changed, 65 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
index c99672f..ed4a57f 100644
--- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
@@ -385,6 +385,71 @@
#thermal-sensor-cells = <1>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 125>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+ resets = <&cpg 125>;
+ status = "disabled";
+ };
+
+ tmu1: timer@e6fc0000 {
+ compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
+ reg = <0 0xe6fc0000 0 0x30>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+ status = "disabled";
+ };
+
+ tmu2: timer@e6fd0000 {
+ compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
+ reg = <0 0xe6fd0000 0 0x30>;
+ interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 123>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+ resets = <&cpg 123>;
+ status = "disabled";
+ };
+
+ tmu3: timer@e6fe0000 {
+ compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
+ reg = <0 0xe6fe0000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+ resets = <&cpg 122>;
+ status = "disabled";
+ };
+
+ tmu4: timer@ffc00000 {
+ compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
+ reg = <0 0xffc00000 0 0x30>;
+ interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 121>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+ resets = <&cpg 121>;
+ status = "disabled";
+ };
+
i2c4: i2c@e66d8000 {
#address-cells = <1>;
#size-cells = <0>;
--
2.7.4
next prev parent reply other threads:[~2019-09-23 14:57 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-23 14:57 [PATCH 0/4] Add RZ/G2N OPP/Thermal/CMT/TMU support Biju Das
2019-09-23 14:57 ` [PATCH 1/4] arm64: dts: renesas: r8a774b1: Add OPPs table for cpu devices Biju Das
2019-10-09 12:05 ` Geert Uytterhoeven
2019-09-23 14:57 ` [PATCH 2/4] arm64: dts: renesas: r8a774b1: Add RZ/G2N thermal support Biju Das
2019-10-09 12:07 ` Geert Uytterhoeven
2019-09-23 14:57 ` [PATCH 3/4] arm64: dts: renesas: r8a774b1: Add CMT device nodes Biju Das
2019-10-09 12:08 ` Geert Uytterhoeven
2019-09-23 14:57 ` Biju Das [this message]
2019-10-09 12:09 ` [PATCH 4/4] arm64: dts: renesas: r8a774b1: Add TMU " Geert Uytterhoeven
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1569250648-33857-5-git-send-email-biju.das@bp.renesas.com \
--to=biju.das@bp.renesas.com \
--cc=Chris.Paterson2@renesas.com \
--cc=devicetree@vger.kernel.org \
--cc=fabrizio.castro@bp.renesas.com \
--cc=geert+renesas@glider.be \
--cc=horms@verge.net.au \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=magnus.damm@gmail.com \
--cc=mark.rutland@arm.com \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).