* [PATCH 1/6] arm64: dts: renesas: cat874: Add USB-HOST support
2019-04-19 14:33 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v5.2 Simon Horman
@ 2019-04-19 14:33 ` Simon Horman
2019-04-19 14:33 ` [PATCH 2/6] arm64: dts: renesas: r8a7795: Add CMT device nodes Simon Horman
` (5 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Simon Horman @ 2019-04-19 14:33 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Fabrizio Castro, Simon Horman
From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
This patch adds USB 2.0 HOST support to the CAT874 board.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
index 42c66f9d8f96..013a48c01211 100644
--- a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
+++ b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
@@ -76,6 +76,11 @@
};
};
+&ehci0 {
+ dr_mode = "host";
+ status = "okay";
+};
+
&extal_clk {
clock-frequency = <48000000>;
};
@@ -93,6 +98,11 @@
};
};
+&ohci0 {
+ dr_mode = "host";
+ status = "okay";
+};
+
&pcie_bus_clk {
clock-frequency = <100000000>;
};
@@ -151,3 +161,8 @@
sd-uhs-sdr104;
status = "okay";
};
+
+&usb2_phy0 {
+ renesas,no-otg-pins;
+ status = "okay";
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 2/6] arm64: dts: renesas: r8a7795: Add CMT device nodes
2019-04-19 14:33 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v5.2 Simon Horman
2019-04-19 14:33 ` [PATCH 1/6] arm64: dts: renesas: cat874: Add USB-HOST support Simon Horman
@ 2019-04-19 14:33 ` Simon Horman
2019-04-19 14:33 ` [PATCH 3/6] arm64: dts: renesas: r8a77965: " Simon Horman
` (4 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Simon Horman @ 2019-04-19 14:33 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Cao Van Dong, Simon Horman
From: Cao Van Dong <cv-dong@jinso.co.jp>
This patch adds CMT{0|1|2|3} device nodes for r8a7795 SoC.
Tested-by: Cao Van Dong <cv-dong@jinso.co.jp>
Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 70 ++++++++++++++++++++++++++++++++
1 file changed, 70 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 55472b2b013e..097538cc4b1f 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -462,6 +462,76 @@
reg = <0 0xe6060000 0 0x50c>;
};
+ cmt0: timer@e60f0000 {
+ compatible = "renesas,r8a7795-cmt0",
+ "renesas,rcar-gen3-cmt0";
+ reg = <0 0xe60f0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 303>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 303>;
+ status = "disabled";
+ };
+
+ cmt1: timer@e6130000 {
+ compatible = "renesas,r8a7795-cmt1",
+ "renesas,rcar-gen3-cmt1";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 302>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 302>;
+ status = "disabled";
+ };
+
+ cmt2: timer@e6140000 {
+ compatible = "renesas,r8a7795-cmt1",
+ "renesas,rcar-gen3-cmt1";
+ reg = <0 0xe6140000 0 0x1004>;
+ interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 301>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 301>;
+ status = "disabled";
+ };
+
+ cmt3: timer@e6148000 {
+ compatible = "renesas,r8a7795-cmt1",
+ "renesas,rcar-gen3-cmt1";
+ reg = <0 0xe6148000 0 0x1004>;
+ interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 300>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 300>;
+ status = "disabled";
+ };
+
cpg: clock-controller@e6150000 {
compatible = "renesas,r8a7795-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
--
2.11.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 3/6] arm64: dts: renesas: r8a77965: Add CMT device nodes
2019-04-19 14:33 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v5.2 Simon Horman
2019-04-19 14:33 ` [PATCH 1/6] arm64: dts: renesas: cat874: Add USB-HOST support Simon Horman
2019-04-19 14:33 ` [PATCH 2/6] arm64: dts: renesas: r8a7795: Add CMT device nodes Simon Horman
@ 2019-04-19 14:33 ` Simon Horman
2019-04-19 14:33 ` [PATCH 4/6] arm64: dts: renesas: r8a77990: " Simon Horman
` (3 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Simon Horman @ 2019-04-19 14:33 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Cao Van Dong, Simon Horman
From: Cao Van Dong <cv-dong@jinso.co.jp>
This patch adds CMT{0|1|2|3} device nodes for r8a77965 SoC.
Tested-by: Cao Van Dong <cv-dong@jinso.co.jp>
Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 70 +++++++++++++++++++++++++++++++
1 file changed, 70 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index d8b81721eb89..4a6446305c18 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -317,6 +317,76 @@
reg = <0 0xe6060000 0 0x50c>;
};
+ cmt0: timer@e60f0000 {
+ compatible = "renesas,r8a77965-cmt0",
+ "renesas,rcar-gen3-cmt0";
+ reg = <0 0xe60f0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 303>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 303>;
+ status = "disabled";
+ };
+
+ cmt1: timer@e6130000 {
+ compatible = "renesas,r8a77965-cmt1",
+ "renesas,rcar-gen3-cmt1";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 302>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 302>;
+ status = "disabled";
+ };
+
+ cmt2: timer@e6140000 {
+ compatible = "renesas,r8a77965-cmt1",
+ "renesas,rcar-gen3-cmt1";
+ reg = <0 0xe6140000 0 0x1004>;
+ interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 301>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 301>;
+ status = "disabled";
+ };
+
+ cmt3: timer@e6148000 {
+ compatible = "renesas,r8a77965-cmt1",
+ "renesas,rcar-gen3-cmt1";
+ reg = <0 0xe6148000 0 0x1004>;
+ interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 300>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 300>;
+ status = "disabled";
+ };
+
cpg: clock-controller@e6150000 {
compatible = "renesas,r8a77965-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
--
2.11.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 4/6] arm64: dts: renesas: r8a77990: Add CMT device nodes
2019-04-19 14:33 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v5.2 Simon Horman
` (2 preceding siblings ...)
2019-04-19 14:33 ` [PATCH 3/6] arm64: dts: renesas: r8a77965: " Simon Horman
@ 2019-04-19 14:33 ` Simon Horman
2019-04-19 14:33 ` [PATCH 5/6] arm64: dts: renesas: r8a77965: Remove reg-names of display node Simon Horman
` (2 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Simon Horman @ 2019-04-19 14:33 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Cao Van Dong, Simon Horman
From: Cao Van Dong <cv-dong@jinso.co.jp>
This patch adds CMT{0|1|2|3} device nodes for r8a77990 SoC.
Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 70 +++++++++++++++++++++++++++++++
1 file changed, 70 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index 0ca7cb72bfa7..4233e1f71f31 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -284,6 +284,76 @@
status = "disabled";
};
+ cmt0: timer@e60f0000 {
+ compatible = "renesas,r8a77990-cmt0",
+ "renesas,rcar-gen3-cmt0";
+ reg = <0 0xe60f0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 303>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ resets = <&cpg 303>;
+ status = "disabled";
+ };
+
+ cmt1: timer@e6130000 {
+ compatible = "renesas,r8a77990-cmt1",
+ "renesas,rcar-gen3-cmt1";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 302>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ resets = <&cpg 302>;
+ status = "disabled";
+ };
+
+ cmt2: timer@e6140000 {
+ compatible = "renesas,r8a77990-cmt1",
+ "renesas,rcar-gen3-cmt1";
+ reg = <0 0xe6140000 0 0x1004>;
+ interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 301>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ resets = <&cpg 301>;
+ status = "disabled";
+ };
+
+ cmt3: timer@e6148000 {
+ compatible = "renesas,r8a77990-cmt1",
+ "renesas,rcar-gen3-cmt1";
+ reg = <0 0xe6148000 0 0x1004>;
+ interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 300>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ resets = <&cpg 300>;
+ status = "disabled";
+ };
+
cpg: clock-controller@e6150000 {
compatible = "renesas,r8a77990-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
--
2.11.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 5/6] arm64: dts: renesas: r8a77965: Remove reg-names of display node
2019-04-19 14:33 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v5.2 Simon Horman
` (3 preceding siblings ...)
2019-04-19 14:33 ` [PATCH 4/6] arm64: dts: renesas: r8a77990: " Simon Horman
@ 2019-04-19 14:33 ` Simon Horman
2019-04-19 14:33 ` [PATCH 6/6] arm64: dts: renesas: r8a77980: Add "renesas,id" to VIN Simon Horman
2019-04-28 19:45 ` [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v5.2 Olof Johansson
6 siblings, 0 replies; 8+ messages in thread
From: Simon Horman @ 2019-04-19 14:33 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Takeshi Kihara, Jacopo Mondi,
Simon Horman
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Remove the "reg-names" property from the display node of R-Car Gen3 R8A77965
device tree.
No other mainline R-Car Gen3 SoC has that property specified.
Fixes: 2f2c71bfc8c5 ("arm64: dts: renesas: r8a77965: Populate the DU instance placeholder")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[reworded commit message, sent upstream]
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 4a6446305c18..2554b1742dbf 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -2447,7 +2447,6 @@
du: display@feb00000 {
compatible = "renesas,du-r8a77965";
reg = <0 0xfeb00000 0 0x80000>;
- reg-names = "du";
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
--
2.11.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 6/6] arm64: dts: renesas: r8a77980: Add "renesas,id" to VIN
2019-04-19 14:33 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v5.2 Simon Horman
` (4 preceding siblings ...)
2019-04-19 14:33 ` [PATCH 5/6] arm64: dts: renesas: r8a77965: Remove reg-names of display node Simon Horman
@ 2019-04-19 14:33 ` Simon Horman
2019-04-28 19:45 ` [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v5.2 Olof Johansson
6 siblings, 0 replies; 8+ messages in thread
From: Simon Horman @ 2019-04-19 14:33 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Jacopo Mondi, Simon Horman
From: Jacopo Mondi <jacopo+renesas@jmondi.org>
Add the "renesas,id" property to VIN nodes in the R-Car V3H R8A77980
device tree.
Fixes: 3182aa4e0bf4 ("arm64: dts: renesas: r8a77980: add CSI2/VIN support")
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Niklas Söderlund <niklas.soderlund@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
index 4081622d548a..a901a341dcf7 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -865,6 +865,7 @@
clocks = <&cpg CPG_MOD 811>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 811>;
+ renesas,id = <0>;
status = "disabled";
ports {
@@ -892,6 +893,7 @@
clocks = <&cpg CPG_MOD 810>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
status = "disabled";
+ renesas,id = <1>;
resets = <&cpg 810>;
ports {
@@ -919,6 +921,7 @@
clocks = <&cpg CPG_MOD 809>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 809>;
+ renesas,id = <2>;
status = "disabled";
ports {
@@ -946,6 +949,7 @@
clocks = <&cpg CPG_MOD 808>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 808>;
+ renesas,id = <3>;
status = "disabled";
ports {
@@ -973,6 +977,7 @@
clocks = <&cpg CPG_MOD 807>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 807>;
+ renesas,id = <4>;
status = "disabled";
ports {
@@ -1000,6 +1005,7 @@
clocks = <&cpg CPG_MOD 806>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 806>;
+ renesas,id = <5>;
status = "disabled";
ports {
@@ -1027,6 +1033,7 @@
clocks = <&cpg CPG_MOD 805>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 805>;
+ renesas,id = <6>;
status = "disabled";
ports {
@@ -1054,6 +1061,7 @@
clocks = <&cpg CPG_MOD 804>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 804>;
+ renesas,id = <7>;
status = "disabled";
ports {
@@ -1081,6 +1089,7 @@
clocks = <&cpg CPG_MOD 628>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 628>;
+ renesas,id = <8>;
status = "disabled";
};
@@ -1091,6 +1100,7 @@
clocks = <&cpg CPG_MOD 627>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 627>;
+ renesas,id = <9>;
status = "disabled";
};
@@ -1101,6 +1111,7 @@
clocks = <&cpg CPG_MOD 625>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 625>;
+ renesas,id = <10>;
status = "disabled";
};
@@ -1111,6 +1122,7 @@
clocks = <&cpg CPG_MOD 618>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 618>;
+ renesas,id = <11>;
status = "disabled";
};
@@ -1121,6 +1133,7 @@
clocks = <&cpg CPG_MOD 612>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 612>;
+ renesas,id = <12>;
status = "disabled";
};
@@ -1131,6 +1144,7 @@
clocks = <&cpg CPG_MOD 608>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 608>;
+ renesas,id = <13>;
status = "disabled";
};
@@ -1141,6 +1155,7 @@
clocks = <&cpg CPG_MOD 605>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 605>;
+ renesas,id = <14>;
status = "disabled";
};
@@ -1151,6 +1166,7 @@
clocks = <&cpg CPG_MOD 604>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 604>;
+ renesas,id = <15>;
status = "disabled";
};
--
2.11.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v5.2
2019-04-19 14:33 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v5.2 Simon Horman
` (5 preceding siblings ...)
2019-04-19 14:33 ` [PATCH 6/6] arm64: dts: renesas: r8a77980: Add "renesas,id" to VIN Simon Horman
@ 2019-04-28 19:45 ` Olof Johansson
6 siblings, 0 replies; 8+ messages in thread
From: Olof Johansson @ 2019-04-28 19:45 UTC (permalink / raw)
To: Simon Horman
Cc: arm, linux-renesas-soc, Kevin Hilman, Arnd Bergmann,
linux-arm-kernel, Magnus Damm
On Fri, Apr 19, 2019 at 04:33:55PM +0200, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these second round of Renesas ARM64 based SoC DT updates
> for v5.2.
>
> This pull request is based on the previous round of
> such requests, tagged as renesas-arm64-dt-for-v5.2,
> which I have already sent a pull-request for.
>
>
> The following changes since commit e3414b8c45afa5cdfb1ffd10f5334da3458c4aa5:
>
> arm64: dts: renesas: salvator-common: Add GPIO keys support (2019-03-27 13:02:12 +0100)
>
> are available in the git repository at:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-dt2-for-v5.2
>
> for you to fetch changes up to b7f5a8e435ecc7198407f44a2a5a6cdae1056b0d:
>
> arm64: dts: renesas: r8a77980: Add "renesas,id" to VIN (2019-04-15 10:43:26 +0200)
Merged, thanks!
-Olof
^ permalink raw reply [flat|nested] 8+ messages in thread