[PATCH v2 0/4] sh-pfc: r8a7795/6/65: Add TPU pins, groups and functions

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* [PATCH v2 0/4] sh-pfc: r8a7795/6/65: Add TPU pins, groups and functions
@ 2019-05-08 13:40 Geert Uytterhoeven
  2019-05-08 13:40 ` [PATCH v2 1/4] pinctrl: sh-pfc: r8a7795-es1: " Geert Uytterhoeven
                   ` (4 more replies)
  0 siblings, 5 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2019-05-08 13:40 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Cao Van Dong, linux-renesas-soc, linux-gpio, Geert Uytterhoeven

	Hi Linus,

This patch series adds pins, groups and functions for the 16-Bit Timer
Pulse Unit (TPU) outputs on the R-Car H3/M3-W/M3-N and RZ/G2M SoCs.

This has been tested on the Salvator-XS development board with R-Car
M3-N.  As the TPU parts of the R-Car H3/M3-W and RZ/G2M SoCs are very
similar, I expect this to work on those SoCs, too.

Changes compared to v1:
  - Update .common[] array sizes in pfc-r8a7796.c.

I intend to queue this in sh-pfc-for-v5.3.

Test procedure:
  - Apply Cao Van Dong's series "[PATCH v2 0/5] Add TPU support for R-Car
    H3/M3-W/M3-N"
    (https://lore.kernel.org/linux-renesas-soc/1556155517-5054-1-git-send-email-cv-dong@jinso.co.jp/),
  - Make sure switches SW31-[1-4] are switched off,
  - Enable TPU and pin control in DTS:

	--- a/arch/arm64/boot/dts/renesas/salvator-xs.dtsi
	+++ b/arch/arm64/boot/dts/renesas/salvator-xs.dtsi
	@@ -27,3 +27,18 @@
			clock-names = "xin";
		};
	 };
	+
	+&tpu {
	+       // SW31-[1-4] OFF
	+       pinctrl-0 = <&tpu_pins>;
	+       pinctrl-names = "default";
	+
	+       status = "okay";
	+};
	+
	+&pfc {
	+       tpu_pins: tpu {
	+               groups = "tpu_to2", "tpu_to3";
	+               function = "tpu";
	+       };
	+};

  - Exercise userspace PWM control for pwm[23] of
    /sys/class/pwm/pwmchip1/,
  - Inspect PWM signals on the input side of SW31-[12] using an
    oscilloscope,
  - Disable TPU and pin control in DTS, and restore SW31 switch
    settings.

Thanks!

Geert Uytterhoeven (4):
  pinctrl: sh-pfc: r8a7795-es1: Add TPU pins, groups and functions
  pinctrl: sh-pfc: r8a7795: Add TPU pins, groups and functions
  pinctrl: sh-pfc: r8a7796: Add TPU pins, groups and functions
  pinctrl: sh-pfc: r8a77965: Add TPU pins, groups and functions

 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c | 42 ++++++++++++++++++++++
 drivers/pinctrl/sh-pfc/pfc-r8a7795.c     | 42 ++++++++++++++++++++++
 drivers/pinctrl/sh-pfc/pfc-r8a7796.c     | 46 ++++++++++++++++++++++--
 drivers/pinctrl/sh-pfc/pfc-r8a77965.c    | 42 ++++++++++++++++++++++
 4 files changed, 170 insertions(+), 2 deletions(-)

-- 
2.17.1

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH v2 1/4] pinctrl: sh-pfc: r8a7795-es1: Add TPU pins, groups and functions
  2019-05-08 13:40 [PATCH v2 0/4] sh-pfc: r8a7795/6/65: Add TPU pins, groups and functions Geert Uytterhoeven
@ 2019-05-08 13:40 ` Geert Uytterhoeven
  2019-05-08 13:40 ` [PATCH v2 2/4] pinctrl: sh-pfc: r8a7795: " Geert Uytterhoeven
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2019-05-08 13:40 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Cao Van Dong, linux-renesas-soc, linux-gpio, Geert Uytterhoeven

Add pins, groups and functions for the 16-Bit Timer Pulse Unit outputs
on revision ES1.x of the R-Car H3 SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - No changes.
---
 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c | 42 ++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
index 3f7d021367e90604..0d7b0dd21e15c05f 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
@@ -3809,6 +3809,36 @@ static const unsigned int tmu_tclk2_b_mux[] = {
 	TCLK2_B_MARK,
 };
 
+/* - TPU ------------------------------------------------------------------- */
+static const unsigned int tpu_to0_pins[] = {
+	/* TPU0TO0 */
+	RCAR_GP_PIN(6, 28),
+};
+static const unsigned int tpu_to0_mux[] = {
+	TPU0TO0_MARK,
+};
+static const unsigned int tpu_to1_pins[] = {
+	/* TPU0TO1 */
+	RCAR_GP_PIN(6, 29),
+};
+static const unsigned int tpu_to1_mux[] = {
+	TPU0TO1_MARK,
+};
+static const unsigned int tpu_to2_pins[] = {
+	/* TPU0TO2 */
+	RCAR_GP_PIN(6, 30),
+};
+static const unsigned int tpu_to2_mux[] = {
+	TPU0TO2_MARK,
+};
+static const unsigned int tpu_to3_pins[] = {
+	/* TPU0TO3 */
+	RCAR_GP_PIN(6, 31),
+};
+static const unsigned int tpu_to3_mux[] = {
+	TPU0TO3_MARK,
+};
+
 /* - USB0 ------------------------------------------------------------------- */
 static const unsigned int usb0_pins[] = {
 	/* PWEN, OVC */
@@ -4162,6 +4192,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(tmu_tclk1_b),
 	SH_PFC_PIN_GROUP(tmu_tclk2_a),
 	SH_PFC_PIN_GROUP(tmu_tclk2_b),
+	SH_PFC_PIN_GROUP(tpu_to0),
+	SH_PFC_PIN_GROUP(tpu_to1),
+	SH_PFC_PIN_GROUP(tpu_to2),
+	SH_PFC_PIN_GROUP(tpu_to3),
 	SH_PFC_PIN_GROUP(usb0),
 	SH_PFC_PIN_GROUP(usb1),
 	SH_PFC_PIN_GROUP(usb2),
@@ -4632,6 +4666,13 @@ static const char * const tmu_groups[] = {
 	"tmu_tclk2_b",
 };
 
+static const char * const tpu_groups[] = {
+	"tpu_to0",
+	"tpu_to1",
+	"tpu_to2",
+	"tpu_to3",
+};
+
 static const char * const usb0_groups[] = {
 	"usb0",
 };
@@ -4704,6 +4745,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(sdhi3),
 	SH_PFC_FUNCTION(ssi),
 	SH_PFC_FUNCTION(tmu),
+	SH_PFC_FUNCTION(tpu),
 	SH_PFC_FUNCTION(usb0),
 	SH_PFC_FUNCTION(usb1),
 	SH_PFC_FUNCTION(usb2),
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v2 2/4] pinctrl: sh-pfc: r8a7795: Add TPU pins, groups and functions
  2019-05-08 13:40 [PATCH v2 0/4] sh-pfc: r8a7795/6/65: Add TPU pins, groups and functions Geert Uytterhoeven
  2019-05-08 13:40 ` [PATCH v2 1/4] pinctrl: sh-pfc: r8a7795-es1: " Geert Uytterhoeven
@ 2019-05-08 13:40 ` Geert Uytterhoeven
  2019-05-08 13:40 ` [PATCH v2 3/4] pinctrl: sh-pfc: r8a7796: " Geert Uytterhoeven
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2019-05-08 13:40 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Cao Van Dong, linux-renesas-soc, linux-gpio, Geert Uytterhoeven

Add pins, groups and functions for the 16-Bit Timer Pulse Unit outputs
on revisions ES2.x and later of the R-Car H3 SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - No changes.
---
 drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 42 ++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
index 79073b2f1ae2c335..bfa19309d14c91c5 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
@@ -3898,6 +3898,36 @@ static const unsigned int tmu_tclk2_b_mux[] = {
 	TCLK2_B_MARK,
 };
 
+/* - TPU ------------------------------------------------------------------- */
+static const unsigned int tpu_to0_pins[] = {
+	/* TPU0TO0 */
+	RCAR_GP_PIN(6, 28),
+};
+static const unsigned int tpu_to0_mux[] = {
+	TPU0TO0_MARK,
+};
+static const unsigned int tpu_to1_pins[] = {
+	/* TPU0TO1 */
+	RCAR_GP_PIN(6, 29),
+};
+static const unsigned int tpu_to1_mux[] = {
+	TPU0TO1_MARK,
+};
+static const unsigned int tpu_to2_pins[] = {
+	/* TPU0TO2 */
+	RCAR_GP_PIN(6, 30),
+};
+static const unsigned int tpu_to2_mux[] = {
+	TPU0TO2_MARK,
+};
+static const unsigned int tpu_to3_pins[] = {
+	/* TPU0TO3 */
+	RCAR_GP_PIN(6, 31),
+};
+static const unsigned int tpu_to3_mux[] = {
+	TPU0TO3_MARK,
+};
+
 /* - USB0 ------------------------------------------------------------------- */
 static const unsigned int usb0_pins[] = {
 	/* PWEN, OVC */
@@ -4448,6 +4478,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(tmu_tclk1_b),
 	SH_PFC_PIN_GROUP(tmu_tclk2_a),
 	SH_PFC_PIN_GROUP(tmu_tclk2_b),
+	SH_PFC_PIN_GROUP(tpu_to0),
+	SH_PFC_PIN_GROUP(tpu_to1),
+	SH_PFC_PIN_GROUP(tpu_to2),
+	SH_PFC_PIN_GROUP(tpu_to3),
 	SH_PFC_PIN_GROUP(usb0),
 	SH_PFC_PIN_GROUP(usb1),
 	SH_PFC_PIN_GROUP(usb2),
@@ -4943,6 +4977,13 @@ static const char * const tmu_groups[] = {
 	"tmu_tclk2_b",
 };
 
+static const char * const tpu_groups[] = {
+	"tpu_to0",
+	"tpu_to1",
+	"tpu_to2",
+	"tpu_to3",
+};
+
 static const char * const usb0_groups[] = {
 	"usb0",
 };
@@ -5045,6 +5086,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(sdhi3),
 	SH_PFC_FUNCTION(ssi),
 	SH_PFC_FUNCTION(tmu),
+	SH_PFC_FUNCTION(tpu),
 	SH_PFC_FUNCTION(usb0),
 	SH_PFC_FUNCTION(usb1),
 	SH_PFC_FUNCTION(usb2),
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v2 3/4] pinctrl: sh-pfc: r8a7796: Add TPU pins, groups and functions
  2019-05-08 13:40 [PATCH v2 0/4] sh-pfc: r8a7795/6/65: Add TPU pins, groups and functions Geert Uytterhoeven
  2019-05-08 13:40 ` [PATCH v2 1/4] pinctrl: sh-pfc: r8a7795-es1: " Geert Uytterhoeven
  2019-05-08 13:40 ` [PATCH v2 2/4] pinctrl: sh-pfc: r8a7795: " Geert Uytterhoeven
@ 2019-05-08 13:40 ` Geert Uytterhoeven
  2019-05-08 13:40 ` [PATCH v2 4/4] pinctrl: sh-pfc: r8a77965: " Geert Uytterhoeven
  2019-05-09 12:01 ` [PATCH v2 0/4] sh-pfc: r8a7795/6/65: " Simon Horman
  4 siblings, 0 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2019-05-08 13:40 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Cao Van Dong, linux-renesas-soc, linux-gpio, Geert Uytterhoeven

Add pins, groups and functions for the 16-Bit Timer Pulse Unit outputs
on the R-Car M3-W and RZ/G2M SoCs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - Update .common[] array sizes.
---
 drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 46 ++++++++++++++++++++++++++--
 1 file changed, 44 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
index 33108f8886901a19..d7d7867753080c2e 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
@@ -3888,6 +3888,36 @@ static const unsigned int tmu_tclk2_b_mux[] = {
 	TCLK2_B_MARK,
 };
 
+/* - TPU ------------------------------------------------------------------- */
+static const unsigned int tpu_to0_pins[] = {
+	/* TPU0TO0 */
+	RCAR_GP_PIN(6, 28),
+};
+static const unsigned int tpu_to0_mux[] = {
+	TPU0TO0_MARK,
+};
+static const unsigned int tpu_to1_pins[] = {
+	/* TPU0TO1 */
+	RCAR_GP_PIN(6, 29),
+};
+static const unsigned int tpu_to1_mux[] = {
+	TPU0TO1_MARK,
+};
+static const unsigned int tpu_to2_pins[] = {
+	/* TPU0TO2 */
+	RCAR_GP_PIN(6, 30),
+};
+static const unsigned int tpu_to2_mux[] = {
+	TPU0TO2_MARK,
+};
+static const unsigned int tpu_to3_pins[] = {
+	/* TPU0TO3 */
+	RCAR_GP_PIN(6, 31),
+};
+static const unsigned int tpu_to3_mux[] = {
+	TPU0TO3_MARK,
+};
+
 /* - USB0 ------------------------------------------------------------------- */
 static const unsigned int usb0_pins[] = {
 	/* PWEN, OVC */
@@ -4107,7 +4137,7 @@ static const unsigned int vin5_clk_mux[] = {
 };
 
 static const struct {
-	struct sh_pfc_pin_group common[312];
+	struct sh_pfc_pin_group common[316];
 	struct sh_pfc_pin_group automotive[30];
 } pinmux_groups = {
 	.common = {
@@ -4394,6 +4424,10 @@ static const struct {
 		SH_PFC_PIN_GROUP(tmu_tclk1_b),
 		SH_PFC_PIN_GROUP(tmu_tclk2_a),
 		SH_PFC_PIN_GROUP(tmu_tclk2_b),
+		SH_PFC_PIN_GROUP(tpu_to0),
+		SH_PFC_PIN_GROUP(tpu_to1),
+		SH_PFC_PIN_GROUP(tpu_to2),
+		SH_PFC_PIN_GROUP(tpu_to3),
 		SH_PFC_PIN_GROUP(usb0),
 		SH_PFC_PIN_GROUP(usb1),
 		SH_PFC_PIN_GROUP(usb30),
@@ -4915,6 +4949,13 @@ static const char * const tmu_groups[] = {
 	"tmu_tclk2_b",
 };
 
+static const char * const tpu_groups[] = {
+	"tpu_to0",
+	"tpu_to1",
+	"tpu_to2",
+	"tpu_to3",
+};
+
 static const char * const usb0_groups[] = {
 	"usb0",
 };
@@ -4960,7 +5001,7 @@ static const char * const vin5_groups[] = {
 };
 
 static const struct {
-	struct sh_pfc_function common[49];
+	struct sh_pfc_function common[50];
 	struct sh_pfc_function automotive[4];
 } pinmux_functions = {
 	.common = {
@@ -5008,6 +5049,7 @@ static const struct {
 		SH_PFC_FUNCTION(sdhi3),
 		SH_PFC_FUNCTION(ssi),
 		SH_PFC_FUNCTION(tmu),
+		SH_PFC_FUNCTION(tpu),
 		SH_PFC_FUNCTION(usb0),
 		SH_PFC_FUNCTION(usb1),
 		SH_PFC_FUNCTION(usb30),
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v2 4/4] pinctrl: sh-pfc: r8a77965: Add TPU pins, groups and functions
  2019-05-08 13:40 [PATCH v2 0/4] sh-pfc: r8a7795/6/65: Add TPU pins, groups and functions Geert Uytterhoeven
                   ` (2 preceding siblings ...)
  2019-05-08 13:40 ` [PATCH v2 3/4] pinctrl: sh-pfc: r8a7796: " Geert Uytterhoeven
@ 2019-05-08 13:40 ` Geert Uytterhoeven
  2019-05-09 12:01 ` [PATCH v2 0/4] sh-pfc: r8a7795/6/65: " Simon Horman
  4 siblings, 0 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2019-05-08 13:40 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Cao Van Dong, linux-renesas-soc, linux-gpio, Geert Uytterhoeven

Add pins, groups and functions for the 16-Bit Timer Pulse Unit outputs
on the R-Car M3-N SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - No changes.
---
 drivers/pinctrl/sh-pfc/pfc-r8a77965.c | 42 +++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
index bddc6c038d8f233d..2c0c3480e45a8ab1 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
@@ -4113,6 +4113,36 @@ static const unsigned int tmu_tclk2_b_mux[] = {
 	TCLK2_B_MARK,
 };
 
+/* - TPU ------------------------------------------------------------------- */
+static const unsigned int tpu_to0_pins[] = {
+	/* TPU0TO0 */
+	RCAR_GP_PIN(6, 28),
+};
+static const unsigned int tpu_to0_mux[] = {
+	TPU0TO0_MARK,
+};
+static const unsigned int tpu_to1_pins[] = {
+	/* TPU0TO1 */
+	RCAR_GP_PIN(6, 29),
+};
+static const unsigned int tpu_to1_mux[] = {
+	TPU0TO1_MARK,
+};
+static const unsigned int tpu_to2_pins[] = {
+	/* TPU0TO2 */
+	RCAR_GP_PIN(6, 30),
+};
+static const unsigned int tpu_to2_mux[] = {
+	TPU0TO2_MARK,
+};
+static const unsigned int tpu_to3_pins[] = {
+	/* TPU0TO3 */
+	RCAR_GP_PIN(6, 31),
+};
+static const unsigned int tpu_to3_mux[] = {
+	TPU0TO3_MARK,
+};
+
 /* - USB0 ------------------------------------------------------------------- */
 static const unsigned int usb0_pins[] = {
 	/* PWEN, OVC */
@@ -4669,6 +4699,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(tmu_tclk1_b),
 	SH_PFC_PIN_GROUP(tmu_tclk2_a),
 	SH_PFC_PIN_GROUP(tmu_tclk2_b),
+	SH_PFC_PIN_GROUP(tpu_to0),
+	SH_PFC_PIN_GROUP(tpu_to1),
+	SH_PFC_PIN_GROUP(tpu_to2),
+	SH_PFC_PIN_GROUP(tpu_to3),
 	SH_PFC_PIN_GROUP(usb0),
 	SH_PFC_PIN_GROUP(usb1),
 	SH_PFC_PIN_GROUP(usb30),
@@ -5161,6 +5195,13 @@ static const char * const tmu_groups[] = {
 	"tmu_tclk2_b",
 };
 
+static const char * const tpu_groups[] = {
+	"tpu_to0",
+	"tpu_to1",
+	"tpu_to2",
+	"tpu_to3",
+};
+
 static const char * const usb0_groups[] = {
 	"usb0",
 };
@@ -5255,6 +5296,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(sdhi3),
 	SH_PFC_FUNCTION(ssi),
 	SH_PFC_FUNCTION(tmu),
+	SH_PFC_FUNCTION(tpu),
 	SH_PFC_FUNCTION(usb0),
 	SH_PFC_FUNCTION(usb1),
 	SH_PFC_FUNCTION(usb30),
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH v2 0/4] sh-pfc: r8a7795/6/65: Add TPU pins, groups and functions
  2019-05-08 13:40 [PATCH v2 0/4] sh-pfc: r8a7795/6/65: Add TPU pins, groups and functions Geert Uytterhoeven
                   ` (3 preceding siblings ...)
  2019-05-08 13:40 ` [PATCH v2 4/4] pinctrl: sh-pfc: r8a77965: " Geert Uytterhoeven
@ 2019-05-09 12:01 ` Simon Horman
  4 siblings, 0 replies; 6+ messages in thread
From: Simon Horman @ 2019-05-09 12:01 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Linus Walleij, Cao Van Dong, linux-renesas-soc, linux-gpio

On Wed, May 08, 2019 at 03:40:08PM +0200, Geert Uytterhoeven wrote:
> 	Hi Linus,
> 
> This patch series adds pins, groups and functions for the 16-Bit Timer
> Pulse Unit (TPU) outputs on the R-Car H3/M3-W/M3-N and RZ/G2M SoCs.
> 
> This has been tested on the Salvator-XS development board with R-Car
> M3-N.  As the TPU parts of the R-Car H3/M3-W and RZ/G2M SoCs are very
> similar, I expect this to work on those SoCs, too.
> 
> Changes compared to v1:
>   - Update .common[] array sizes in pfc-r8a7796.c.
> 
> I intend to queue this in sh-pfc-for-v5.3.
> 
> Test procedure:
>   - Apply Cao Van Dong's series "[PATCH v2 0/5] Add TPU support for R-Car
>     H3/M3-W/M3-N"
>     (https://lore.kernel.org/linux-renesas-soc/1556155517-5054-1-git-send-email-cv-dong@jinso.co.jp/),
>   - Make sure switches SW31-[1-4] are switched off,
>   - Enable TPU and pin control in DTS:
> 
> 	--- a/arch/arm64/boot/dts/renesas/salvator-xs.dtsi
> 	+++ b/arch/arm64/boot/dts/renesas/salvator-xs.dtsi
> 	@@ -27,3 +27,18 @@
> 			clock-names = "xin";
> 		};
> 	 };
> 	+
> 	+&tpu {
> 	+       // SW31-[1-4] OFF
> 	+       pinctrl-0 = <&tpu_pins>;
> 	+       pinctrl-names = "default";
> 	+
> 	+       status = "okay";
> 	+};
> 	+
> 	+&pfc {
> 	+       tpu_pins: tpu {
> 	+               groups = "tpu_to2", "tpu_to3";
> 	+               function = "tpu";
> 	+       };
> 	+};
> 
>   - Exercise userspace PWM control for pwm[23] of
>     /sys/class/pwm/pwmchip1/,
>   - Inspect PWM signals on the input side of SW31-[12] using an
>     oscilloscope,
>   - Disable TPU and pin control in DTS, and restore SW31 switch
>     settings.
> 
> Thanks!
> 
> Geert Uytterhoeven (4):
>   pinctrl: sh-pfc: r8a7795-es1: Add TPU pins, groups and functions
>   pinctrl: sh-pfc: r8a7795: Add TPU pins, groups and functions
>   pinctrl: sh-pfc: r8a7796: Add TPU pins, groups and functions
>   pinctrl: sh-pfc: r8a77965: Add TPU pins, groups and functions

Thanks Geert,

for all patches:

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>


^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2019-05-09 12:01 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-05-08 13:40 [PATCH v2 0/4] sh-pfc: r8a7795/6/65: Add TPU pins, groups and functions Geert Uytterhoeven
2019-05-08 13:40 ` [PATCH v2 1/4] pinctrl: sh-pfc: r8a7795-es1: " Geert Uytterhoeven
2019-05-08 13:40 ` [PATCH v2 2/4] pinctrl: sh-pfc: r8a7795: " Geert Uytterhoeven
2019-05-08 13:40 ` [PATCH v2 3/4] pinctrl: sh-pfc: r8a7796: " Geert Uytterhoeven
2019-05-08 13:40 ` [PATCH v2 4/4] pinctrl: sh-pfc: r8a77965: " Geert Uytterhoeven
2019-05-09 12:01 ` [PATCH v2 0/4] sh-pfc: r8a7795/6/65: " Simon Horman

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